KR100333660B1 - Method for forming ferroelectric capacitor - Google Patents

Abstract

The present invention relates to a method of forming a ferroelectric capacitor capable of further reducing process steps and reducing plasma damage. The present invention is characterized by exposing a lower electrode by simultaneously etching a platinum film and an SBT ferroelectric film to form an upper electrode. As such, the non-conductive ferroelectric fence covering the sidewalls of the platinum upper electrode is formed so that the platinum fence generated when the lower electrode is etched cannot short-circuit with the upper electrode.

Description

Ferroelectric capacitor formation method {METHOD FOR FORMING FERROELECTRIC CAPACITOR}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor memory device, and more particularly to a method of forming a ferroelectric capacitor.

By using a ferroelectric material in a capacitor in a semiconductor memory device, development of a device capable of using a large-capacity memory while overcoming the limitation of refresh required in a conventional dynamic random access memory (DRAM) device has been in progress. A ferroelectric random access memory (FeRAM) device is a nonvolatile memory device that not only stores stored information even when a power supply is cut off, but also has an operation speed comparable to that of a conventional DRAM.

SrBi ₂ Ta ₂ O ₉ (hereinafter referred to as SBT) and Pb (Zr, Ti) O ₃ (hereinafter referred to as PZT) thin films are mainly used as storage materials for ferroelectric memory devices. Ferroelectrics have dielectric constants ranging from hundreds to thousands at room temperature, and have two stable remnant polarization states, making them thinner and enabling their application to nonvolatile memory devices. Nonvolatile memory devices using a ferroelectric thin film use the principle of inputting a signal by adjusting the direction of polarization in the direction of an applied electric field and storing digital signals 1 and 0 by the direction of residual polarization remaining when the electric field is removed. .

The conventional ferroelectric capacitor forming process using the platinum electrode consists of an etching process for forming the upper electrode pattern, an etching process for forming the ferroelectric film and the lower electrode pattern. The reason why only the upper electrode is etched first is because the platinum material constituting the electrode is nonvolatile, so when the upper electrode and the ferroelectric are simultaneously etched, the platinum electrode constituting the lower electrode is exposed to the lower electrode and the platinum by redeposition in the transient etching step. This is because a short circuit of the upper electrode occurs.

A method of forming a conventional ferroelectric capacitor will be described with reference to FIG.

First, a first platinum film 11 to form a lower electrode on a substrate (not shown), a ferroelectric film 12 such as SBT, and a second platinum film 13 to form an upper electrode are sequentially formed, and then an upper electrode. To form a pattern, the second platinum film is dry-etched (primary etched), the ferroelectric film and the first platinum film are dry-etched (secondary etched) to form a ferroelectric film pattern and a lower electrode pattern, and a ferroelectric material is connected to the metal wiring. The first platinum film 11 forming the lower electrode is exposed by dry etching (third etching) the film.

Before and after each etching process, a photoresist pattern forming process, a photoresist pattern removing process, a cleaning process, and an inspection step are performed.

In the conventional ferroelectric capacitor formation method, due to the non-volatility of the platinum used as the lower electrode, in order to prevent the short circuit between the upper and lower electrodes inevitably must be carried out a three-step etching process, as well as the film damage by the plasma can not be avoided, For the third step etching process, in addition to forming, removing, and cleaning the photoresist pattern, a plurality of steps such as inspection using KLA, hard bake, and CD SEM measurement should be further performed. The possibility of a short circuit between electrodes is increased by the metallic polymer fence, which is a polymer in which a resist component, a reaction gas, and the like are combined.

On the other hand, chlorine is added to the etching gas in order to suppress the formation of the fence as an etching by-product that is redeposited during the etching of the platinum film, which has a disadvantage in that the slope of the pattern side becomes large.

In addition, the Ti film is formed in consideration of the adhesion between the platinum lower electrode and the interlayer insulating film, and thus, the adhesion of the platinum film and the Ti film is degraded in a plurality of cleaning processes, thereby causing the lifting of the thin film.

The present invention proposed to solve the above problems can further reduce the process steps and plasma damage, and a method of forming a ferroelectric capacitor capable of preventing the short-circuit between electrodes by the metal fence generated during the capacitor etching. The purpose is to provide.

1 is a cross-sectional view of a ferroelectric memory device manufacturing process according to the prior art;

Figure 2 is a cross-sectional view of the ferroelectric memory device manufacturing process according to an embodiment of the present invention.

3A and 3B are SEM images showing a state after the upper electrode forming process according to the present invention and the prior art, respectively.

* Description of reference numerals for the main parts of the drawings *

21: lower electrode 22: ferroelectric film

23: upper electrode

The present invention for achieving the above object is a first step of sequentially forming a first platinum film to form a lower electrode of the capacitor on the substrate, a ferroelectric film and a second platinum film to form the upper electrode of the capacitor; Selectively etching the second platinum film to form an upper electrode; Dry etching the ferroelectric layer to form a ferroelectric layer pattern while exposing the first platinum layer and forming a non-conductive ferroelectric fence covering sidewalls of the upper electrode and the ferroelectric layer; And a fourth step of selectively etching the first platinum film to form a lower electrode.

The present invention is characterized by exposing the lower electrode by simultaneously etching the platinum film and the SBT ferroelectric film to form the upper electrode. When the ferroelectric is etched, the potential difference is increased so as to cover the ferroelectric layer so as to physically etch the fence so that a fence of the ferroelectric film covering the side surface of the platinum upper electrode is formed. As such, the non-conductive ferroelectric fence covering the sidewalls of the platinum upper electrode is formed so that the platinum fence generated when the lower electrode is etched cannot short-circuit with the upper electrode.

Therefore, the film may not be exposed to the interface between the lower electrode and the titanium, which is the adhesive layer, and thus, the film may be prevented from occurring in the cleaning process. In addition, several process steps can be reduced compared to the conventional methods, thereby reducing costs and reducing damage to plasma.

Hereinafter, a method of forming a ferroelectric capacitor according to an embodiment of the present invention will be described in detail with reference to FIG. 2.

First, a first platinum film 21 to form a lower electrode on a substrate (not shown), a ferroelectric film 22 such as SrBi ₂ Ta ₂ O ₉ (SBT), and a second platinum film 23 to form an upper electrode. Form in turn.

Subsequently, the second platinum layer 23 and the ferroelectric layer 22 are dry etched to form the upper electrode pattern and the ferroelectric layer pattern to expose the first platinum layer 21 forming the lower electrode. At this time, by controlling the etching conditions, the non-volatile material is re-deposited to form a non-conductive ferroelectric fence (not shown) that intentionally connects the first platinum film 21 forming the upper electrode and the lower electrode.

In order to re-deposit a large amount of material during ferroelectric etching to form a fence, only argon (Ar) gas is used as an etching gas, and a bias power of 100 W to 400 W and a source power of 500 W to 900 W are applied. In addition, when the process pressure increases, energy loss of ions occurs in the plasma cover, so that the process pressure is 1 mTorr to 5 mTorr.

Next, the first platinum film 21 is etched to form the lower electrode pattern. In this case, in order to prevent the ferroelectric fence from being lost, the etching mask removal and cleaning process for forming the upper electrode pattern may be omitted, and the first platinum layer 21 may be formed after forming the etching mask covering the upper electrode and the ferroelectric fence. Etch it.

Since the second platinum film 23 and the first platinum film 21 forming the upper electrode are connected by a non-conductive ferroelectric fence, etching is performed to form the ferroelectric film pattern and the lower electrode pattern after forming the upper electrode pattern. There is a margin in etching conditions of the first platinum film 21 than in the prior art.

However, the etching process of the platinum film 21 uses as little halogen group gas as chlorine, fluorine, bromine or the like when selecting an etching gas in order to protect the ferroelectric fence as much as possible.

3A is a SEM photograph showing a cross section after an etching process for forming an upper electrode and a ferroelectric pattern according to the present invention, and FIG. 3B is a SEM photograph showing a cross section after an etching process for forming an upper electrode pattern according to the prior art. The arrow in FIG. 3A indicates the ferroelectric fence.

As described above, the present invention is characterized by generating a ferroelectric fence and exposing the lower electrode in the etching process for forming the upper electrode pattern and the ferroelectric pattern. These ferroelectric fences naturally occur when the ratio of argon gas is increased during etching. For reference, in the early ferroelectric capacitor formation, many methods have been proposed to suppress and eliminate the occurrence of unwanted ferroelectric fences. Therefore, the present invention has high reproducibility.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

The present invention made as described above can contribute to the simplification of the ferroelectric capacitor forming process, and since the lower electrode is exposed by the ferroelectric film etching, the plasma etching process can be reduced, so that damage by plasma can be reduced, and the upper electrode and the lower electrode Short circuit can be effectively prevented.

In addition, since the amount of argon gas can be added freely, there is an advantage that the anisotropic etching characteristics can be effectively obtained.

Claims (4)

In the method of forming a ferroelectric capacitor, A first step of sequentially forming a first platinum film forming a lower electrode of the capacitor, a ferroelectric film, and a second platinum film forming an upper electrode of the capacitor on the substrate; Selectively etching the second platinum film to form an upper electrode; Dry etching the ferroelectric layer to form a ferroelectric layer pattern while exposing the first platinum layer and forming a non-conductive ferroelectric fence covering sidewalls of the upper electrode and the ferroelectric layer; And A fourth step of selectively etching the first platinum film to form a lower electrode Ferroelectric capacitor formation method comprising a. The method of claim 1, The second and third steps, A method of forming a ferroelectric capacitor, using only argon (Ar) gas as an etching gas. The method of claim 2, The second and third steps, A method of forming a ferroelectric capacitor, comprising applying a bias power of 100 W to 400 W, a source power of 500 W to 900 W, and performing at a pressure of 1 mTorr to 5 mTorr. The method according to any one of claims 1 to 3, The ferroelectric capacitor forming method, characterized in that the ferroelectric film is formed of SrBi ₂ Ta ₂ O ₉ .