KR100331283B1 - 디슁 및 부식을 방지한 화학기계적연마법 - Google Patents
디슁 및 부식을 방지한 화학기계적연마법 Download PDFInfo
- Publication number
- KR100331283B1 KR100331283B1 KR1019990064632A KR19990064632A KR100331283B1 KR 100331283 B1 KR100331283 B1 KR 100331283B1 KR 1019990064632 A KR1019990064632 A KR 1019990064632A KR 19990064632 A KR19990064632 A KR 19990064632A KR 100331283 B1 KR100331283 B1 KR 100331283B1
- Authority
- KR
- South Korea
- Prior art keywords
- polishing
- tungsten
- chemical mechanical
- cmp
- wafer
- Prior art date
Links
- 238000005498 polishing Methods 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 37
- 239000000126 substance Substances 0.000 title claims abstract description 14
- 230000003628 erosive effect Effects 0.000 title description 2
- 238000007517 polishing process Methods 0.000 claims abstract description 26
- 238000005260 corrosion Methods 0.000 claims abstract description 17
- 230000007797 corrosion Effects 0.000 claims abstract description 17
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 22
- 229910052721 tungsten Inorganic materials 0.000 claims description 22
- 239000010937 tungsten Substances 0.000 claims description 22
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- 239000010410 layer Substances 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 6
- 239000011229 interlayer Substances 0.000 claims description 6
- 230000000873 masking effect Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims 1
- 238000001514 detection method Methods 0.000 abstract description 8
- 235000012431 wafers Nutrition 0.000 description 13
- 239000000463 material Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/005—Control means for lapping machines or devices
- B24B37/013—Devices or means for detecting lapping completion
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
Claims (5)
- 소자하부구조를 갖는 반도체기판 상에 층간절연막을 적층한 후에 마스킹식각으로 콘택홀을 형성하고, 텅스텐을 매립하여 CMP연마공정으로 텅스텐플러그를 형성하는 공정에 있어서,상기 웨이퍼에서 CMP연마를 진행할 부위에 MCM법으로 엔드포인트를 구하는 단계와;상기 엔드포인트를 Falling Signal로 지정하는 단계와;상기 엔드포인트 감지시, 콘택홀에 매립된 텅스텐을 제외한 웨이퍼 상에 적층된 텅스텐을 모두 제거하고, Ti막의 일부만을 잔류한 상태에서 연마를 종료하는 제1 CMP연마공정을 수행하는 단계와;상기 공정 후에 다운 포오스와 빽압을 가하여 웨이퍼 상에 잔류된 금속층을 제거하는 제2 CMP연마공정을 수행하는 단계를 포함하여 이루어진 것을 특징으로 하는 디슁 및 부식을 방지한 화학기계적연마법.
- 제 1 항에 있어서, 상기 제2 CMP연마공정은, 연마패드가 연마조건에 도달하기 위하여 다운포오스와 빽압을 조절하는 제1,제2단계와; 상기 단계 후에 잔류된 Ti막을 식각하는 제3단계와; 상기 단계 후에 오버-폴리싱을 최소화하기 위하여 상기 제3단계에 비하여 텅스텐연마속도가 25 ∼ 30% 정도가 되도록 연마를 진행하는제4단계를 포함하여 이루어진 것을 특징으로 하는 디슁 및 부식을 방지한 화학기계적연마법.
- 제 2 항에 있어서, 상기 제 3단계에서 Ti막을 80 ∼ 90% 정도 식각하는 것을 특징으로 하는 디슁 및 부식을 방지한 화학기계적연마법.
- 제 2 항에 있어서, 상기 제 4단계의 연마속도는, 상기 제3단계에 비하여 텅스텐연마속도가 25 ∼ 30% 정도가 되도록 하여 공정을 진행하는 것을 특징으로 하는 디슁 및 부식을 방지한 화학기계적연마법.
- 제 2 항에 있어서, 상기 제 4단계의 연마공정은, 15 초 내지 20초 동안 진행하는 것을 특징으로 하는 디슁 및 부식을 방지한 화학기계적연마법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019990064632A KR100331283B1 (ko) | 1999-12-29 | 1999-12-29 | 디슁 및 부식을 방지한 화학기계적연마법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019990064632A KR100331283B1 (ko) | 1999-12-29 | 1999-12-29 | 디슁 및 부식을 방지한 화학기계적연마법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20010064435A KR20010064435A (ko) | 2001-07-09 |
KR100331283B1 true KR100331283B1 (ko) | 2002-04-06 |
Family
ID=19631902
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019990064632A KR100331283B1 (ko) | 1999-12-29 | 1999-12-29 | 디슁 및 부식을 방지한 화학기계적연마법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100331283B1 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100444721B1 (ko) * | 2001-12-20 | 2004-08-16 | 동부전자 주식회사 | 금속배선 전 절연막의 평탄화 방법 |
KR100815949B1 (ko) * | 2006-12-29 | 2008-03-21 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
CN119237852A (zh) * | 2024-12-02 | 2025-01-03 | 宁海县第一注塑模具有限公司 | 一种模具火花纹加工的处理方法 |
-
1999
- 1999-12-29 KR KR1019990064632A patent/KR100331283B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR20010064435A (ko) | 2001-07-09 |
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