KR100217416B1 - Linear amplifier and method thereof - Google Patents

Abstract

A linear amplification device having a power amplifier generates harmonics corresponding to an input RF signal, generates a predistortion signal by combining the harmonics and the RF signal, and suppresses intermodulation signals generated when amplifying the RF signal in the power amplifier. The intermodulation signal component is canceled by canceling the input RF signal and the output of the power amplifier, error amplified, and the amplified intermodulation signal is combined with the output of the power amplifier to second suppress the intermodulation signal.

Description

LINEAR AMPLIFIER AND METHOD THEREOF}

The present invention relates to a linear amplification apparatus and method, and more particularly, to a linear amplification apparatus and method that can remove intermodulation components using a predistortion method and a feed forward method.

In general, a high power amplifier (HPA) operates near a saturation region having nonlinear characteristics to generate maximum output. However, when multi-carriers are input to the high output amplifiers, these multi-carriers generate inter-modulation distortion (IMD), so that the performance of the amplifiers is greatly degraded. Therefore, a problem arises in that the level of the input signal has to be back-off several dB to operate, or to be changed to a larger power transistor (Power TR).

In this case, a linear power amplifier (LPA) is not a large-capacity transistor, but uses a transistor of an appropriate capacity, and the generated intermodulation component can be removed by linearization. Therefore, the linear amplifier is an essential component in order to improve the quality of the RF signal transmitted from the communication device.

1 illustrates the configuration of a linear power amplifier (LPA) disclosed in US Pat. No. 5,130,663, which was invented in Tattersall et al. The linear amplifier having the configuration as shown in FIG. 1 generates a pilot signal, couples it to an input signal, and detects the pilot signal at the final output terminal to suppress the distortion component by controlling the phase and the gain of the error amplifier. That is, the linear amplifier uses a pilot signal to continuously suppress the phase and gain of the error amplifier regardless of various factors in order to suppress the intermodulation component, and determines the magnitude of the suppressed pilot signal to determine the distortion component. Will be suppressed.

However, as shown in FIG. 1, a linear amplifier using a pilot tone cannot consider various environmental factors, and thus it is difficult to set a condition for automatically adjusting linear amplification. In addition, circuits such as pilot generators and pilot detectors have been added to complicate the configuration and control of the linear amplifier.

As described above, the linearization method capable of removing intermodulation components produces a predistortion component in the input signal to improve the intermodulation suppression characteristics of the main amplifier, and feeds the distortion components back to the amplifier output. There are a negative feedback method for suppressing the included distortion component, and a feedforward method for suppressing the distortion component by creating an inverse phase by extracting only the distortion component.

It is therefore an object of the present invention to provide a linear amplification apparatus and method capable of dispersing and removing intermodulation components by using a predistortion method and a feedforward method.

Another object of the present invention is to provide an apparatus and method for suppressing intermodulation components generated in a main amplifier using a predistortion method and suppressing intermodulation components included in an amplified signal finally output using a feedforward method. Is in.

Another object of the present invention is to install a predistorter in front of the main amplifier of the linear amplifier and predict the intermodulation components to be generated in the main amplifier in advance to generate a predistortion signal to enter the main amplifier to be generated in the main amplifier The present invention provides a linear amplification apparatus and method capable of first suppressing intermodulation components.

Another object of the present invention is to extract the remaining intermodulation component included in the output of the main amplifier of the first suppressed intermodulation component in the linear amplification device and combine the final modulation signal to the final output amplification signal The present invention provides a device and a method capable of secondary suppression.

The linear amplification apparatus of the present invention for achieving the above object, generates a harmonic corresponding to the input RF signal and generates a predistortion signal by combining the harmonic and the RF signal to generate a horn when amplifying the RF signal in the power amplifier Suppressing the modulated signal first, canceling the modulated signal component by canceling the input RF signal and the output of the power amplifier, error amplifying, and combining the amplified intermodulated signal and the output of the power amplifier to combine the modulated signal It characterized in that the secondary suppression.

In the present invention for achieving the above object, in the method of removing the intermodulation signal of the linear amplifier, generating a harmonic corresponding to the input RF signal and combining the harmonic and the RF signal to generate a predistortion signal in the power amplifier Firstly suppresses the intermodulation signal generated during RF signal amplification, cancels the intermodulation signal component by canceling the input RF signal and the output of the power amplifier, and then amplifies the error, and outputs the amplified intermodulation signal and the power amplifier. By combining the second modulated signal to the intermodulation signal.

1 is a diagram showing the configuration of a conventional linear amplifier.

2 is a diagram showing the configuration of a linear amplifier according to a first embodiment of the present invention.

3 is a diagram illustrating a configuration of a predistorter in FIG. 2.

4 is a diagram illustrating a configuration of an automatic level controller in FIG. 3.

FIG. 5 is a diagram illustrating a configuration of a power detector in FIG. 4. FIG.

6A and 6B show characteristics of a signal spectrum for explaining the operation of the linear amplifier according to the embodiment of the present invention in FIG.

FIG. 7 is a diagram illustrating a configuration of a signal detector in FIG. 2. FIG.

FIG. 8 is a diagram illustrating a configuration of a controller in FIG. 2. FIG.

9 is a view for explaining a procedure of the control unit performs a signal attenuation and phase control function according to an embodiment of the present invention;

10A to 10G are flowcharts illustrating an operation process in which a controller controls the variable attenuator and the variable phase shifter of FIG. 2 according to an embodiment of the present invention.

FIG. 11 is a diagram for explaining a characteristic of setting a frequency for controlling attenuation and phase of a signal in FIGS. 10A to 10G;

12 is a diagram showing the configuration of a linear amplifier according to a second embodiment of the present invention.

13 is a diagram showing the configuration of a linear amplifying apparatus according to a third embodiment of the present invention.

2 shows a configuration of a linear amplifier according to a first embodiment of the present invention. In FIG. 2, the first variable attenator 211 controls the attenuation of the RF signal gain incident by the attenuation control signal ATT1. A first variable phase shifter 212 inputs the output of the first variable attenuator 211 and controls the phase of the RF signal incident by the phase control signal PIC1.

A predistortor 213 inputs the RF signal, and generates a distortion signal in advance by predicting harmonics, which are intermodulation components to be generated in the power amplifier 214 of the rear stage. The main power amplifier 214 power amplifies and outputs the RF signal output from the predistorter 213. The second delay unit 215 inputs an RF signal output from the power amplifier 214 and outputs the delayed signal for a time when the intermodulation signal is applied. Such a configuration becomes a main path of the linear amplifier according to the embodiment of the present invention.

A power divider 216 divides and outputs an RF signal incident on the main path. The distributor 216 may use a directional coupler. A first delay line 217 compensates for the delay time of the RF signal in the predistortion and amplification process of the main path. The divider 218 is located at the output terminal of the power amplifier 214 and distributes the output of the power amplifier 214 to output. The distributor 218 may use a directional coupler. The signal canceler 219 inputs an RF signal output from the first delay unit 217 and an amplified RF signal output from the power amplifier 214. The canceller 219 detects the intermodulation signal by canceling the RF signal component output by the first delayer 217 at the output of the power amplifier 214. The embodiment of the present invention shows an example in which the canceller 219 is implemented as a subtractor.

The second variable attenuator 220 inputs the intermodulation signal output from the canceller 219 and controls the gain of the intermodulation signal input by the attenuation control signal ATT2 output from the controller 237. The second variable displacement controller 221 inputs a mixed modulation signal output from the second variable attenuator 220 and controls a phase of the mixed modulation signal input by the phase control signal PIC2 output from the controller 237. An error amplifier 222 amplifies and outputs the intermodulation signal output from the second variable phase shifter 221. A combiner 223 couples the output of the error amplifier 222 to the output of the second delay 215. The coupler 223 may use a directional coupler.

Such a configuration corresponds to a sub-path for suppressing intermodulation signals of the main path in an embodiment of the present invention.

The divider 231 distributes the RF signal input at the input terminal and outputs the first signal SF1. The divider 232 is located at an output terminal of the power amplifier 214 to distribute the amplified RF signal to output a second signal SF2. The divider 233 is located at the output of the canceller 219 and distributes the intermodulation signal from which the RF signal is canceled to output the third signal SF3. The divider 234 is disposed at the output terminal and distributes the final RF signal to output the fourth signal SF4. The distributors 231-234 may use directional couplers. A selector 235 inputs the signals SF1-SF4 output from the distributors 231-234, and selects and outputs a corresponding signal SF controlled by a switch control signal SWC (switching control data) output from the controller 237. .

The signal detector 236 detects the strength of the signal SF output from the selector 235 by the control data PCD (PLL Control Data) output from the control unit 237 and outputs a RSSI (Received Signal Strength Indicator) converted into a DC voltage. do. The control unit 237 generates a switch control signal SWC for selecting the corresponding signal SF in the selector 235, and generates a control data PCD for determining a frequency for detecting the strength of the signal SF selected in the signal detector 236.

In addition, the controller 237 analyzes the value of the RSSI signal output from the signal detector 236, and attenuation control for controlling the corresponding variable attenuator and phase shifter to adjust the gain and phase of the corresponding signal SF according to the analyzed result. Generates signals ATT1-ATT3 and phase control signals PIC1-PIC3. First, when selecting the input signal output from the divider 231, the control unit 237 controls the detector 236 to detect the RSSIs of the input RF signal to determine the size thereof, and then determine the frequency component of the input RF signal. Accordingly, when the controller 237 selects the output of the power amplifier 214 output from the splitter 232, the control unit 235 controls the signal detector 236 to detect the RSSIs of the harmonic signals of the amplified RF signal, and then determines the magnitude. Generating an attenuation control signal ATT3 and a phase control signal PIC3 for adjusting the attenuation and phase of the intermodulation signal. Secondly, when the output of the canceller 219 is selected, the controller 237 controls the signal detector 236 to detect RSSIs of the RF signals included in the canceled intermodulation signal to determine the size, and then to the input terminal of the linear amplifier. Attenuation control signal ATT1 and phase control signal PIC1 for adjusting the attenuation and phase of the incident RF signal are generated. Third, when the amplified signal is finally output, the controller 237 controls the signal detector 236 to detect RSSIs of intermodulated signals included in the final output signal to determine a magnitude thereof, and then outputs the intermodulator. Attenuation control signal ATT2 and phase control signal PIC2 for attenuation and phase adjustment of the signal are generated.

The linear amplifier according to the embodiment of the present invention having the configuration as described above uses a predistortion method and a feedforward method to remove intermodulation signals that may be generated during the amplification process. In an embodiment of the present invention, the predistorter 213 primarily removes the intermodulation signal output from the power amplifier 214. To this end, the preamplifier 213 anticipates and generates harmonics that may be generated during amplification in the power amplifier 214, and may be generated in the power amplifier 214 at the time when the power amplifier 214 is applied to the power transistor of the power amplifier 214. Adjust the phase so that it is out of phase with the harmonics present.

In the case of using the predistortion method as described above, the intermodulation signal generated in the linear amplifier cannot be completely removed. Therefore, the linear amplifier according to the embodiment of the present invention applies a feedforward method to suppress the intermodulation signal after the first suppression of the intermodulation signal in the predistorter 213. The linear amplifier using the feed forward method cancels the pure RF signal component from the output of the power amplifier 214 to extract the intermodulation signal, and combines the extracted intermodulation signal to the combiner 223 to cancel the intermodulation component. Therefore, when the feedforward method is used, the intermodulated signal component included in the amplified signal at the final output terminal of the linear amplifier is suppressed to output only the amplified pure RF signal component.

As described above, according to the exemplary embodiment of the present invention, first, the intermodulation signal generated in the amplification process of the power amplifier 214 is first suppressed using the predistortion method, and the intermodulation signal included in the output of the first suppressed power amplifier 214 is used. Second suppression using a feedforward method. For convenience of explanation, the operation of suppressing the intermodulation signal by the predistortion method will be described first, and the operation of suppressing the intermodulation signal by the feed forward method will be described.

6A and 6B of FIG. 6A and 6B are diagrams illustrating characteristics of signals generated according to the respective sub-operations in FIG. 2, and assuming two tone cases. 6a is an input RF signal. 6b is a harmonic signal of the RF signal generated by the harmonic generator 314 in the predistorter 213. The 6c is a signal whose phase is adjusted so that the magnitude of the harmonics is adjusted by the variable attenuator 315 in the predistorter 213 and is incident to the power amplifier 214 in the reverse phase by the variable phase 316. The 6d is an amplified RF signal including an intermodulation signal by amplifying the predistorted signal incident as shown in 6c in the power amplifier 214. 6e is a mixed modulated signal extracted by canceling the signal component of 6a from the amplified RF signal of 6d in canceller 219. The 6f is a signal adjusted by adjusting the magnitude of the intermodulation signal such as the 6e and out of phase with the output of the power amplifier 214 on the main path. The 6g is a final output signal that suppresses the intermodulation signal by combining an amplified RF signal such as 6d and an extracted intermodulation signal such as 6f out of phase.

FIG. 3 is a diagram illustrating an internal configuration of the predistorter 213 in FIG. 2. Referring to FIG. 3, the divider 312 is located at the input terminal to distribute and output an RF signal. The Automatic Level Control (ALC) 313 maintains a constant level of the RF signal incident on the harmonic generator 314 to generate a constant harmonic regardless of the level change of the incident RF signal. The harmonics generator 314 inputs an RF signal adjusted in the automatic level controller 313 to generate third, fifth, seventh, and higher harmonics of the RF signal. The variable attenuator 315 inputs a harmonic signal output from the harmonic generator 314 and controls the gain of the harmonic component by the attenuation control signal ATT3 output from the controller 237. The variable phase 316 inputs a harmonic signal output from the harmonic generator 314 and adjusts the phase of the harmonic component by the phase control signal PIC3 output from the controller 237. The delay unit 311 delays the RF signal incident to the main path during the time period during which the predistortion signal is generated. A combiner 317 is located between the output of the delayer 311 and the input of the power amplifier 214 and couples the predistortion signal to the delayed RF signal.

Referring to FIG. 3, the harmonic generator 314 may include a coupler and a shottkey diode. Then, when the RF signal is incident on the Schottky diode, the Schottky diode generates higher harmonics according to the level of the incident RF signal. Therefore, the level of the RF signal incident on the Schottky diode should be set to a level capable of best suppressing the intermodulation signal included in the output of the power amplifier 214. To this end, an automatic level controller 313 is positioned at the front of the harmonic generator 314 so that an RF signal of a constant level is always incident.

The automatic level controller 313 controls and outputs an RF signal having a predetermined level regardless of the level change of the RF signal incident on the linear amplifier. 4 is a diagram showing the configuration of the automatic level controller 313, which is connected between the distributor 312 and the harmonic generator 314. FIG. A divider 414 is positioned at an input of the harmonic generator 314 to distribute and output a level-adjusted RF signal applied to the harmonic generator 314. The power detector 415 then converts the RF signal into a DC voltage and outputs it to a level controller 416. Then, the level controller 416 controls the variable attenuator 412 according to the DC voltage output to the power detector 415 so that an RF signal of a constant level is always input to the harmonic generator 314.

In this case, the power detector 415 of FIG. 4 should be able to detect a multi-carrier. That is, the power detector 415 should be able to input the RF signal of the multi-carrier and convert it to a DC voltage. FIG. 5 is a diagram illustrating the configuration of the power detector 415. An RF transformer 451 inputs an RF signal to generate two signals having a 180 ° phase difference. The two signals output from the transformer 451 are transmission lines. It is converted to DC level through Schottky diodes 454 and 455 through 452 and 453, and then composite rectified through capacitor 456 and resistor 457 and output as DC voltage.

Referring to FIGS. 3 and 4, the operation of controlling the level of the incident RF signal is performed. The 180 ° transformer 451 of the power detector 415 generates two signals that are separated and output in half-cycle units of the incident RF signal. Schottky diodes 454 and 455 convert two signals incident through transmission lines 452 and 453 to DC levels, respectively. Therefore, the average power of the multi-carrier can be sensed without error, thereby accurately converting the level of the RF signal incident on the harmonic generator 314 to a DC voltage.

Then, the level controller 416 generates a control signal according to the DC voltage level of the RF signal output from the power detector 415 and applies it to the variable attenuator 412. The level controller 313 may be implemented using an operational amplifier or the like. At this time, the control signal output from the level controller 313 generates a control signal to increase the attenuation control when the voltage value is large according to the DC voltage of the detected RF signal, and to reduce the attenuation control when the voltage value is small. Then, the variable attenuator 412 variably attenuates the RF signal to have a constant level irrespective of the level of the incident RF signal and enters the harmonic generator 314.

At this time, if the variation level of the incident RF signal is 10dB, the operating area of the automatic level controller 313 should be designed to control the level to at least 10dB or more. In addition, the RF output level of the automatic level controller 313 must be set such that the harmonic generator 314 can be generated as a predistortion signal capable of maximally suppressing the intermodulation signal generated by the power amplifier 214. Therefore, the harmonic generator 314 inputting the output of the automatic level controller 313 always enters an RF signal of a constant level, thereby stably generating harmonics. Since the harmonics output from the harmonic generator 314 are combined with the RF signal and incident on the power amplifier 214, the power amplifier 214 can suppress the generation of the intermodulation signal in the process of amplifying the RF signal.

In addition, the harmonics generated as described above should be adjusted to the magnitude and antiphase of harmonics that may be generated in the amplification operation when incident on the power amplifier 214. The variable attenuator 315 and the variable phase 316 shown in FIG. 3 adjust the magnitude of the harmonics generated by the magnitude of the intermodulation signal that the power amplifier 214 may generate in the amplification operation, and enter the adjusted harmonics in reverse phase. Adjust the phase so that it can be.

The control unit 237 controls the selector 235 to select the output of the power amplifier 214 output from the divider 232, and controls the detector 236 to determine the signal strength RSSI of the intermodulation signal at the output of the power amplifier 214 such as 6d. To be detected. Attenuation control signal ATT3 and phase control for controlling the power amplifier 214 to smoothly suppress the intermodulation signal by comparing and analyzing the RSSI value of the intermodulation signal output from the detector 236 and the RSSI value in the previous state. Generate signal PIC3.

Then, the variable attenuator 315 adjusts the magnitude of the predistortion signal generated by the harmonic generator 314 by the attenuation control signal ATT3, and the variable phase 316 is a power amplifier 214 by the phase control signal PIC3. Adjust the phase so that it can be incident in antiphase. As described above, the harmonic signal generated by the harmonic generator 314 is adjusted in magnitude and phase, and the combiner 317 couples the intermodulation signal to the input terminal of the power amplifier 314. In this case, as shown in FIG. 6A, the delayer 311 delaying the incident RF signal delays the RF signal until the predistortion signal is coupled to the input terminal of the power amplifier 214. Then, it can be seen that the predistortion signal is combined with the RF signal at the input of the power amplifier 214. In this case, as shown in 6c of FIG. 6, the position where the intermodulation signal coupled to the RF signal is adjusted in reverse phase is preferably the input terminal of the power transistor of the power amplifier 214.

As described above, the predistorter 213 generates a predistortion signal in advance by predicting the intermodulation signal to be generated by the power amplifier 214, and attenuation and phase of harmonics so that the intermodulation signal can be suppressed to the maximum in the power amplifier 214. Control to enter the power amplifier 214. At this time, the predistorter 213 mainly removes the third harmonic generated at the highest level among the harmonics that may be generated by the power amplifier 214. The pre-distortion intermodulation signal elimination effect can significantly reduce the burden of suppressing the intermodulation signal by applying a feed forward method. This has the advantage that the feedforward scheme can be improved by a few dB with predistortion because the adjustment is very precise and difficult.

Secondly, after the first suppression of the intermodulation signal that may be generated by the power amplifier 214 by the predistortion method as described above, the second operation to suppress the intermodulation signal that was not suppressed by the feedforward method will be described. . The process of removing the intermodulation signal of the power amplifier 214 in the feedforward method can be largely divided into two steps. One is to extract the pure intermodulation signal component by canceling the RF signal component incident to the output of the power amplifier 214, and the other is intermodulation included in the signal finally output from the power amplifier 214 After correcting the magnitude and phase to completely remove the signal, cancel the intermodulation signal components at the output of the power amplifier 214.

First, the first step operation of the feedforward method will be described. The splitter 216 on the auxiliary path distributes the incident RF signal as shown in 6A of FIG. 6A, and the first delayer 217 delays the RF signal distributed by the splitter 216 for the predistortion and RF amplification time, and then Applied to offset 219. Then, the RF signal components such as 6a of FIG. 6A output from the first delay unit 217 and the amplified signals of 6d of FIG. 6B distributed by the divider 218 cancel each other, thereby canceling the pure horn such as 6e of FIG. 6B. The modulated signal component is extracted and output.

As described above, the canceller 219 is a core configuration of the feedforward method, and its function is to detect only the intermodulated signal component at the output of the power amplifier 214. The canceller 219 may be configured in the form of a subtractor or an adder. When the canceller 219 is configured as a subtractor, the two RF signals to be input should be adjusted to have a phase so that they are in phase. When the adder is configured as an adder, the two RF signals to be input should be adjusted so as to have an inverse phase. The embodiment of the present invention shows an example in which the canceller 219 is configured as a subtractor. In this case, the subtractor has a coupler therein, and an input signal of two input signals is incident to the combiner in phase and the other signal is converted to an antiphase to enter the combiner. When the RF signal as shown in 6a of FIG. 6A and the amplified RF signal as shown in 6d of FIG. 6B are incident on the subtractor type canceller 219, two RF signal components of the in-phase are converted into an out-phase in the canceller 219. After passing through a post-combiner (you can use a Wilkinson combiner here), the RF signal cancels out, leaving only intermodulation signal components.

At this time, the level and phase of two RF signals incident on the canceller 219 must be exactly matched. To this end, the group delay of the amplified RF signal output from the power amplifier 214 of the main path and the RF signal input through the auxiliary path must be exactly matched in the band, and the characteristics of the flatness of the delay are improved. Should be good. That is, the phase distortion of the RF signal to be canceled should be suppressed as much as possible.

As described above, if the level and the phase of the output of the power amplifier 214 and the RF signal component output from the first delay unit 217 do not exactly match, the RF signal component is not canceled out correctly in the canceller 219. To solve this problem, the first variable attenuator 211 of FIG. 2 adjusts the level of the RF signal incident by the attenuation control signal ATT1 output from the controller 237, and the second variable displacement unit 212 outputs the controller 237. The phase of the RF signal incident by the phase control signal PIC1 is adjusted. Therefore, the first variable attenuator 211 and the first variable displacement unit 212 perform a function of adjusting the RF signal of the main path and the RF signal of the auxiliary path to the same level and phase. The canceller 219 cancels the two RF signal components that are input at the same level and in phase.

In order to control the level and phase of the two RF signals as described above, the controller 237 outputs a switch control signal SWC for selecting the third signal SF3 to the selector 235, and the detector 236 outputs an RF signal to the third signal SF3. The control data PCD for detecting the RSSI of the signal component is output. The selector 235 selects and inputs a third signal SF3 which is an output of the canceller 219 distributed by the divider 233, and the detector 236 generates an RSSI obtained by converting an RF signal component of the third signal SF3 into a DC voltage. . Then, the controller 237 compares the RSSI of the RF signal component with the previous RF signal RSSI, and then generates an attenuation control signal ATT1 and a phase control signal PIC1 for canceling the RF signal component in the canceller 233.

Then, the first variable attenuator 211 attenuates the RF signal incident by the decay rate determined by the attenuation control signal ATT1, and the first phase variable 212 adjusts the phase of the RF signal incident by the phase control signal PIC1. . At this time, the attenuation control signal ATT1 and the phase control signal PIC1 are generated by comparing and analyzing the RSSI of the RF signal outputting the canceller 219 and the RSSI of the previous RF signal, and thus, the first variable attenuator 211 and the first variable shifter 212. FIG. 6B controls two RF signals such as 6d of FIG. 6B and two RF signals of 6a of FIG. 6A to have the same level and the same phase.

The reason for canceling the RF signal component in the canceller 219 is to suppress the RF signal greatly and extract only the intermodulated signal component, so as not to affect the error amplifier 222 at the rear stage. That is, if the output of the canceller 219 fluctuates and the RF signal is not effectively removed, the RF amplifier of a relatively large level is incident on the error amplifier 222, thereby causing the error amplifier 222 to be damaged.

Secondly, the operation of the second step in the feedforward method will be described. Here, as described above, the intermodulation signal output from the canceller 219 is adjusted through the second variable attenuator 220, the second variable phase shifter 221, and the error amplifier 222, and is incident on the main path to output the power amplifier 214. The intermodulation signal component included in is removed. In this case, the intermodulation signal coupled by the combiner 223 should be out of phase with the amplified output signal.

Here, in order to correct the intermodulation signal detected by the canceller 219 to be equal to the level of the intermodulation signal included in the signal output on the main path and to be out of phase, the control unit 237 outputs the final output distributed by the distributor 234. A switch control signal SWC is generated for selecting the fourth signal SF4, which is a signal, and a control data PCD for detecting RSSI of harmonics, which are intermodulation signals, is output from the fourth signal SF4. Then, the selector 235 selects and outputs the fourth signal SF4 output from the divider 234 by the switch control signal SWC, and the detector 236 detects the RSSI of the harmonics of the fourth signal SF4 by the control data PCD and controls the controller. Applies to 237. The controller 237 compares the RSSI of the intermodulated signal included in the final output signal with the RSSI of the pre-modulated signal, and then suppresses the mixed modulated signal included in the final output signal according to the analysis result. And a phase control signal PIC2.

Accordingly, the second variable attenuator 220 inputting the output of the canceller 219 adjusts the level of the intermodulation signal incident by the attenuation control signal ATT2, and the second phase adder inputs the signal output from the second variable attenuator 220. The toilet 221 adjusts the phase of the intermodulation signal incident by the phase control signal PIC2. In this case, the second phase variable transformer 221 controls the phase of the mixed modulated signal to be out of phase in the combiner 223 by the phase control signal PIC2. Then, the error amplifier 222 connected between the second variable phase shifter 221 and the combiner 223 amplifies and outputs the mixed modulated signal whose level and phase are adjusted as described above.

As described above, the linear amplification apparatus uses a predistortion method and a feedforward method to suppress intermodulation signals included in an amplified signal. The procedure for suppressing the intermodulation signal first suppresses the intermodulation signal that may be generated in the power amplifier 214 by predistortion, and then detects the intermodulation signal included in the output of the power amplifier 214 by the feedforward method. The intermodulation signal is then combined with the final output signal to remove the intermodulation signal. It is difficult to design and manufacture the power amplifier 214 and the error amplifier 222, and it is difficult to accurately tune the power amplifier 214 and the error amplifier 222 to remove the intermodulation signal by the feedforward method alone. After suppression, the feedforward method removes the remaining intermodulation signals, which facilitates the design and manufacture of the linear amplifier.

Next, the process of suppressing the intermodulation signal using the predistortion method and the feedforward method as described above with reference to the control unit 237 will be described in detail.

7 is a diagram illustrating an internal configuration of the detector 236 according to the embodiment of the present invention. The attenuator 711 attenuates and outputs the signal SF output from the selector 235. Filter 712 is a wideband pass filter that filters signals in a transmission band. The phase lock loop (PLL) 713 and the oscillator 714 generate a corresponding local frequency LF1 by the control data PCD output from the controller 237. The local frequency LF1 determines a frequency for detecting the RSSI of the selected signal SF. A mixer 715 generates an intermediate frequency (IF) by mixing the signal output from the filter 712 and the local frequency LF1. The filter 716 is an intermediate frequency filter, and filters the difference signal (?? SF-LF1 ??) of two frequencies at the output of the mixer 715 and outputs it to IF1. The intermediate frequency amplifier 717 amplifies and outputs the intermediate frequency IF1. Oscillator 719 generates a fixed local frequency LF2. A mixer 718 generates an intermediate frequency IF2 by mixing the IF1 signal output from the intermediate frequency amplifier 717 and the local frequency LF2. The filter 720 filters the difference signals ?? IF1-LF2 ?? of two frequencies at the output of the mixer 718 and outputs them to IF2. A log amplifier 721 converts the intermediate frequency IF2 output from the filter 720 into a DC voltage and outputs the RSSI signal.

Referring to the operation of FIG. 7, the selector 235 selects and outputs a corresponding signal SF among the first signals SF1 to fourth signal SF4 by the switch control signal SWC of the controller 237. Filter 712 of detector 236 then filters and applies the signal SF to mixer 715. The PLL713 and the oscillator 714 generate a local frequency LF1 for selecting harmonics or RF signals of a signal selected by the control data PCD of the controller 237. The mixer 715 mixes and outputs the two signals SF and LF1, and the filter 716 filters the frequency corresponding to the difference between the two signals and outputs the result to IF1. The above configuration determines the frequency for detecting the RSSI in the selected signal SF and performs the frequency down conversion function of the first step.

The mixer 718 then mixes the local frequency LF2 output from the oscillator 718 and the IF1, and the filter 720 filters the frequencies corresponding to the difference between the two signals IF1 and LF2 in the mixed signal and outputs them to IF2. The above configuration performs the frequency down conversion function of the second step. The log amplifier 721 receives the IF2 and converts the DC voltage into a DC voltage. The signal becomes RSSI.

8 is a diagram illustrating an internal configuration of the control unit 237 according to the embodiment of the present invention. The analog-to-digital converter (ADC) 814 converts the RSSI output from the selector 236 into digital data and outputs the digital data. ROM812 stores a program for controlling attenuation and phase in accordance with an embodiment of the present invention. The CPU811 generates a switch control signal SWC for selecting a signal SF and a control data PCD for selecting a frequency for selecting a desired RSSI from the selected signal SF according to the program of the ROM812. The CPU811 outputs the RSSI value output to the ADC814. Comparative analysis generates the attenuation control signal ATT and the phase control signal PIC. The RAM 813 temporarily stores various data generated while the program is being executed. The DAC815 converts the attenuation control and phase control data output from the controller 811 into analog and outputs the analog attenuation control signal ATT and the phase control signal PIC. The communication unit 816 performs a function of notifying the state information of the linear amplifier to the outside under the control of the CPU816.

FIG. 9 is a diagram for describing an operation of controlling, by the controller 237, the variable attenuators and the variable phases to adjust the level and phase of a signal according to an embodiment of the present invention. In FIG. 9, the X axis represents the attenuation value and the Y axis represents the phase change value. Referring to FIG. 9, when the value of the variable attenuator is changed from P _A to P _B at the time when the RSSI is input, when the size of the detected signal decreases, it moves from P _B to P _C. Thereafter, when the value of the variable attenuator is moved from P _C to P _D at the time when the next RSSI is input, when the detected signal is increased again, the variable attenuator moves to the opposite direction P _C. This is a temporary point of attenuation value P _C size. In this manner, the variable phase shifter also moves to P _F when the size of the RSSI detected when the value of P _E changes from P _C.

By repeatedly controlling the attenuation and phase in the same manner as above, the values of the variable attenuator and the variable phase that minimize the magnitude of the detected signal SF can be determined. 10A to 10G are flowcharts illustrating a control process of the variable attenuator and the variable phase of the present invention performed as described above. 10A to 10G illustrate an example in which a signal attenuation function is performed after controlling the phase of the detected signal first, the phase may be controlled after controlling the attenuation of the signal.

10A to 10B, the intermodulation component is removed in a large four step process. Referring to this, first, the RSSI of the first signal SF1 is detected to set a channel in which an RF signal is detected in a transmission band to determine service channels, and secondly, the RSSI of the second signal SF1 is detected so that the power amplifier 214 intermixes a modulated signal. The predistortion signal is controlled to amplify the received RF signal while suppressing the signal. Third, the RSSI of the third signal SF3 is detected to detect the intermodulation signal canceling the RF signal component in the canceller 219. By detecting the RSSI of the fourth signal SF4 to control the intermodulation signal included in the final output signal output from the power amplifier 214 on the main path.

FIG. 11 is a signal SF selected from FIG. 10, where 11a is the second signal SF2 which is the output of the power amplifier 214 distributed in the divider 232, and 11b is the third signal which is the output of the canceller 233 distributed in the divider 233. FIG. SF3, and 11c is the fourth signal SF4 which is the final output signal distributed by the divider 234.

10A to 10G and 11, in operation 1000, the controller 237 performs an initialization operation of the linear amplifier in operation 1000. When performing initialization, the CPU811 reads the attenuation control signal ATT1-attenuation control signal ATT3 and the phase control signal PIC1-phase control signal PIC3 at a specific frequency and a specific power in a corresponding region of the RAM 813, and stores the number of transmission channels. Initialize the corresponding areas of the RAM 813 for storing the RSSI value and the service channel information corresponding to the. If the initialization operation is performed only when the linear amplifier is first started, the initialization operation is not performed once the linear amplifier is operated.

When the initialization process is finished, the CPU outputs a switch control signal SWC for selecting the first signal SF1 output from the distributor 231 to determine a service channel in step 1011, and the first channel of the transmission band in step 1013. Output control data PCD to select. The selector 235 selects and outputs the first signal SF1 by the switch control signal SWC, and the detector 236 detects the RSSI for the first channel frequency by the control data PCD. Thereafter, the controller 237 stores the RSSI received in the channel set in step 1015 in the corresponding channel region of the RAM813 and increases the channel number to detect the RSSI of the next channel in step 1017. The channel scan operation is performed until the last channel of the transmission band while repeating steps 1011-1019.

As described above, the controller 237 detects and stores the signal strength RSSI detected in each channel while sequentially increasing the channel number from the first channel to the last channel for all channels of the transmission band. If the mobile communication system is Code Division Multiplex Access (CDMA), the transmission band is 869.640 MHz to 893.19 MHz. The channel spacing is 1.23 MHz. Accordingly, in the CDMA system, the band of the first signal SF1 is 869.640 MHz to 893.19 MHz, and the control data PCD of the last 20th channel is spaced at 1.23 MHz at 869.640 MHz, which is the first channel frequency of the first signal SF1. The data is sequentially assigned up to the frequency of 893.19MHz. In the CDMA system as described above, the controller 237 sequentially designates each channel frequency of the transmission band (869.640MHz-893.19MHz) in the channel scan process and detects the RSSI of the designated channel and stores the RSSI in the internal RAM813.

When the channel scan operation is completed, the controller 237 adds RSSIs of all channels stored in the RAM 813 in step 1021, and calculates an average value by dividing the RSSI sum of all channels by the number of channels in step 1023. Thereafter, steps 1015 to 1035 are performed to determine service channels. Referring to the process of determining the service channel, the controller 237 sequentially accesses RSSI values of respective channels stored in the RAM 823 and compares them with the average value. At this time, if the RSSI value of the channel is larger than the average value, it is checked whether the RSSI value of the channel is larger than the reference value + α. It is assumed here that α is 30 dB. Therefore, in steps 1027 and 1029, the current channel RSSI value is larger than the average value, and if the current channel RSSI value is larger than the average value, it is determined whether the corresponding RSSI value is greater than or equal to 30 dB. This is because even if the RSSI value of the channel is larger than the average value, it may be larger than the average value due to noise, and so on, even if the detected RSSI value is larger than the average value, channels having certain signal components are set as service channels. If the current channel RSSI value is larger than the average value and is equal to or greater than the reference value + α as described above, the controller 237 sets the corresponding channel as the service channel in step 1031. By repeating steps 1025 to 1035 as described above, the service channels are set by checking the RSSI value of all channels.

After selecting the first signal SF1 as described above, the controller 237 detects and analyzes all channel RSSI values of the band of the first signal SF1, sets and stores a channel for transmission service. Thereafter, the control unit 237 controls to amplify and output the RF signals of the set service channels. In the embodiment of the present invention, for example, two consecutive channels are serviced for convenience of explanation, and at this time, the frequency of the RF signal of each channel. Is assumed to be f1 and f2, and the intermodulation signal is assumed to be IM1-IM4.

10B to 10C illustrate an operation of controlling the variable attenuator 315 and the variable phase 316 of the predistorter 213 by examining the intermodulation signal included in the output of the power amplifier 214. The predistorter 213 generates a predistortion signal for suppressing the intermodulation signal that may be generated when the power amplifier 214 is amplified as described above, and the control unit 237 includes the intermodulation signal included in the output of the power amplifier 214. The power amplifier 214 variably controls the level and phase of the predistortion signal to detect the strength of the power amplifier 214 so as to suppress the intermodulation signal well. In the embodiment of the present invention, after detecting the intensity of the intermodulation signal output from the power amplifier 214, and compares the detected value with the intensity of the intermodulation signal of the previous state, and according to the comparison difference, three steps of control operation Suppose we do In this case, it is assumed that the A / D converter 814 and the D / A converter 815 are 16-bit converters, and the first step is set to 3 steps, the second step is 10 steps, and the third step is set to 20 steps. Quantization step of. At the initial level and phase control time, the phase and attenuation control signals from the previous state are increased by one step, and from the second and subsequent control processes to the X th control process, the RSSI of the IM signal is detected and then compared with the previous RSSI value. If the difference is 10 steps or less, the control is performed in one step. If the difference is 20 steps or less, the control is performed in two steps. As described above, the level and phase control operations of the predistortion signal are continuously performed for X times.

Referring to the above process, the controller 237 outputs a switch control signal SWC for selecting the second signal SF2 in step 1111. Then, the selector 235 selects a signal as shown in FIG. 11A output from the power amplifier 214 and outputs the signal to the detector 236. To this end, the controller 237 checks whether the value of the HG counter is 0 in step 1113. The HG counter is a counter that counts the number of times the intermodulation signal included in the power amplifier 214 is suppressed. At this time, if the HG counter is 0, the control unit 237 outputs the phase control signal PIC3 as the phase control signal PPIC3 + 1 level value stored in step 1115 and the phase control signal PIC3 is the D / A. The DAC6 of the converter 815 is converted into an analog signal and applied to the variable phase 316. Then, the variable phase 316 of the predistorter 213 adjusts the phase of the predistortion signal output from the harmonic generator 314 by the phase control signal PIC3 and couples it to the input terminal of the power amplifier 214. The controller 237 stores the phase control signal PIC3 as a full phase control signal PPIC3 in step 1117 in preparation for the next state. In addition, the control unit 237 outputs the attenuation control signal ATT3 as the attenuation control signal PATT3 + 1 in the previous state in step 1119, and the attenuation control signal ATT3 is converted into an analog signal by the DAC5 and applied to the variable attenuator 315. Then, the variable attenuator 315 of the predistorter 213 adjusts the level of the predistortion signal output from the harmonic generator 314 by the attenuation control signal ATT3 and couples it to the input terminal of the power amplifier 214. In step 1121, the control unit 237 stores the attenuation control signal ATT3 as the entire attenuation control signal PATT3.

As described above, it can be seen that the first phase and level control of the predistortion signal adjusts the level and phase by adding one step to the control signal of the entire state. However, a corresponding control signal may be generated by comparing the difference between the control signal of the previous state and the control signal currently detected. After controlling the phase and level of the predistortion signal as described above, the controller 237 updates the HG count in step 11161.

After adjusting the phase and level of the predistortion signal as described above, the controller 237 performs steps 1123-1135 again to detect RSSIs of the intermodulation signals IM1-IM4 included in the output of the power amplifier 214, and 1139. In step, the intermodulation signal having the largest RSSI value is selected. To this end, the control unit 237 sequentially outputs a control data PCD for designating the IM1-IM4, which is the intermodulation signal, from the output of the power amplifier 214 output by the detector 236 as shown in 11a of FIG. IM4 receives and stores RSSI value of intermodulation signal IM. The IM signal having the largest RSSI value is selected from the detected intermodulation signals IM1-IM4.

Thereafter, the controller 237 compares the strength of the IM signal selected in step 1141 with the value of the phase control signal PPIC3 in the previous state. At this time, if the intermodulation signal IM is greater than the phase control signal PPIC3, the control unit 237 sets the phase control value to be smaller in step 1143. If the intermodulation signal IM is smaller than the phase control signal PPIC3, the control unit 237 sets the phase control value in step 1145. Set the direction to increase. After setting the direction of phase control as described above, in step 1147, the difference between the value of the intermodulation signal IM and the phase control signal PPIC3 in the previous state is obtained, and then the phase control signal PIC3 corresponding to the difference is generated. The phase control signal PIC3 is applied to the variable phase 316 through the D / A converter 815. Thereafter, the controller 237 stores the phase control signal PIC3 as a full phase control signal PPIC3 for use in the next state.

After generating the phase control signal PIC3 as described above, the controller 237 compares the strength of the intermodulation signal IM selected in step 1151 with the value of the attenuation control signal PATT3 in the previous state. In this case, if the intermodulation signal IM is greater than the attenuation control signal PATT3, the controller 237 sets the attenuation control value to be smaller in step 1153. If the IM signal is smaller than the attenuation control signal PATT3, the control unit 237 increases the attenuation control value in step 1155. Set the direction to After setting the direction of the attenuation control as described above, in step 1157, the difference between the value of the intermodulation signal IM and the attenuation control signal PATT3 in the previous state is obtained, and then the attenuation control signal ATT3 is generated according to the difference. The attenuation control signal ATT3 is applied to the variable attenuator 315 via the D / A converter 815. In step 1159, the control unit 237 stores the attenuation control signal ATT3 as the entire attenuation control signal PATT3.

Thereafter, the controller 237 increases the HG count by one in step 1161 and checks whether the HG count becomes X. In this case, if the HG count does not become an X value, the process returns to step 1123 and repeats the above process. After repeating the above process, the strength of the intermodulation signal included in the output of the power amplifier 214 is detected, and then the control direction and the control magnitude are determined by comparing with the previous phase and the attenuation control signal ATT. Adjust the level. In this case, the predistortion signal is applied as an inverse phase of the intermodulation signal that may occur in the power amplifier 214. As described above, the generation of the intermodulation signal of the power amplifier 214 is suppressed while the phase and level of the predistortion signal are adjusted. When the HG count reaches X, the adjustment operation of the predistortion signal is terminated.

After adjusting the phase and level of the predistortion signal, the controller 237 performs an operation for suppressing an RF signal component included in the output of the canceller 219.

10D to 1255 of FIG. 10D illustrate an operation of controlling the first variable attenuator 211 and the second variable displacement unit 212 by inspecting an RF signal component included in the output of the canceller 219. As described above, the canceller 219 cancels only the intermodulation signal generated when amplifying by canceling the RF signal inputted from the output of the power amplifier 214 as shown in 11a of FIG. 11, and the control unit 237 as shown in FIG. 11b of FIG. 11. The level and phase of the RF signal are variably controlled to detect the strength of the RF signal included in the output of the canceller 219 and to suppress the RF signal in the canceller 219. In the embodiment of the present invention, after detecting the strength of the RF signal output from the canceller 219, and compares the detected value with the strength of the RF signal of the previous state, and performs a three-step control operation according to the comparison difference Assume that In this case, it is assumed that the A / D converter 814 is a 16-bit converter. The first step is set to 3 steps, the second step is set to 10 steps, and the third step is set to 20 steps. The step becomes a quantization step during A / D conversion. In the initial level and phase control time, the control is performed in one step regardless of the detected RSSI. In the process after the second control, the control is controlled in one step if the comparison difference is 10 steps or less, and in two steps if it is 20 steps or less, and 20 steps or more. If it is set to control in 3 steps. The level and phase control operations of the predistortion signal as described above are continuously performed M times.

Referring to the above process, the controller 237 outputs a switch control signal SWC for selecting the third signal SF3 in step 1211. Then, the selector 235 selects a signal such as 11b of FIG. 11 output from the canceller 219 and outputs the signal to the detector 236. Thereafter, the controller 237 detects and analyzes the intensity of the intermodulation signal included in the canceller 219, and then controls the first variable attenuator 211 and the first variable shifter 212 to adjust the level and phase of the RF signal.

To this end, the control unit 237 checks whether the SUB counter is 0 in step 1213. Here, the SUB counter is a counter that counts the number of cancellations of the RF signal included in the canceller 219. If the value of the SUB counter is 0, the control unit 237 outputs the phase control signal PIC1 as the phase control signal PPIC1 + 1 level value stored in step 1215 and outputs the phase control signal PIC1 to the D / D. The DAC2 of the A converter 815 is converted into an analog signal and applied to the first variable displacement circuit 212. Then, the first variable phase shifter 212 adjusts the phase of the RF signal input by the phase control signal PIC1 and outputs it to the power amplifier 214. In operation 1217, the controller 235 stores the phase control signal PIC1 as a full phase control signal PPIC1 in preparation for the next state. In addition, in step 1219, the control unit 237 outputs the attenuation control signal ATT1 as the attenuation control signal PATT1 + 1 in the previous state. The attenuation control signal ATT1 is converted into an analog signal by the DAC1 and applied to the variable attenuator 315. Then, the first variable attenuator 211 adjusts the level of the RF signal input by the attenuation control signal ATT1 and inputs it to the power amplifier 214. The controller 239 stores the ATT1 as PATT1 in step 1221.

As described above, it can be seen that the first phase and level control of the input RF signal adjusts the level and phase by adding one step to the control signal of all states. However, a corresponding control signal may be generated by comparing the difference between the control signal of the previous state and the control signal currently detected. After controlling the phase and level of the predistortion signal as described above, the control unit 237 increases the SUB count in step 1253.

However, if the SUB counter value is not 0 in step 1211, the control unit 237 selects f1 and f2, which are RF signals, from the output of the canceller 219 outputted by the detector 236 as shown in FIG. 11B in steps 1223-1229. The control data PCD to be specified is sequentially output, and the RSSI values of the corresponding f1 and f2 signals are received and stored. In step 1231, the controller 237 selects the f signal having the largest RSSI value among the f1 and f2 signals.

Thereafter, the controller 237 compares the strength of the f signal selected in step 1233 with the value of the phase control signal PPIC1 in the previous state. In this case, when the f signal is greater than the phase control signal PPIC1, the controller 237 sets the direction of the phase control value in step 1235. If the f signal is smaller than the phase control signal PPIC1, the control unit 237 increases the phase control value in step 1237. Set. After setting the direction of the phase control as described above, in step 1239, the difference between the value of the f signal and the phase control signal PPIC1 in the previous state is obtained, and then the phase control signal PIC1 corresponding to the difference is generated. The phase control signal PIC1 is applied to the first variable displacement circuit 212 through the D / A converter 815. In step 1241, the control unit 237 stores the phase control signal PIC1 as the phase control signal PPIC1 in the previous state for use in the next state.

After the phase control signal PIC1 is generated as described above, the controller 237 compares the intensity of the f signal selected in step 1243 with the value of the attenuation control signal PATT1 in the previous state. In this case, the control unit 237 sets the attenuation control value to be smaller in step 1245 when the f signal is greater than the attenuation control signal PATT1, and increases the attenuation control value in step 1247 if the f signal is smaller than the attenuation control signal PATT1. Set. After setting the direction of the attenuation control as described above, in step 1249, the difference between the value of the f signal and the attenuation control signal PATT1 in the previous state is obtained, and then the attenuation control signal ATT1 is generated according to the difference. The attenuation control signal ATT1 is applied to the first variable attenuator 211 through the D / A converter 815. In step 1251, the control unit 237 stores the attenuation control signal ATT1 as the entire attenuation control signal PATT1.

In step 1253, the control unit 237 increases the SUB count by one and checks whether the SUB count has reached a Y value. If the SUB count is not Y, the process returns to step 1223 and repeats the above process. After repeating the above process, the strength of the RF signal included in the canceller 219 is detected, and the control direction and the control size are determined by comparing the strength of the RF signal outputted from the canceller 219 in all states. Adjust the phase and level of the RF signal. While suppressing the generation of the RF signal included in the canceller 219 while adjusting the phase and level of the RF signal input as described above, when the SUB count reaches Y, the suppression operation of the RF signal included in the canceller 219 is terminated. do.

10F to 13G illustrate an operation of controlling the second variable attenuator 220 and the second variable shifter 221 by examining the intermodulation signal IM included in the final RF signal output from the power amplifier 214. Doing. The RF signal outputting the power amplifier 214 is compensated through the second delay unit 215 while the intermodulation signal component detected in the subpath is processed, and is reversed from the intermodulation component processed in the subpath by the combiner 223. The intermodulated signal components included in the RF signal output in the final phase combination are suppressed. In this case, the final output RF signal may include a intermodulation signal component, and such intermodulation signal component should be suppressed. At this time, the control unit 237 detects the intensity of the intermodulation signal IM1-IM4 included in the output of the power amplifier 214 as shown in 11c of FIG. 11, and corrects the intermodulation signal component included in the RF signal finally output by the combiner 223. The level and phase of the intermodulation signals IM1-IM4 are variably controlled so as to be suppressed. In the embodiment of the present invention, after detecting the intensity of the intermodulated signal component IM1-IM4 included in the final amplified RF signal, the detected value is compared with the intensity of the intermodulated signal component IM1-IM4 in the previous state. It is assumed that the control operation of three steps is largely performed according to the comparison difference. In this case, it is assumed that the A / D converter 814 is a 16-bit converter. The first step is set to 3 steps, the second step is set to 10 steps, and the third step is set to 20 steps. The step becomes a quantization step during A / D conversion. In the initial level and phase control time, the control is performed in one step regardless of the detected RSSI. In the process after the second control, the control is controlled in one step if the comparison difference is 10 steps or less, and in two steps if it is 20 steps or less, and 20 steps or more. If it is set to control in 3 steps. In addition, the level and phase control operations of the predistortion signal are continuously performed Z times.

10F to 13G, the operations of steps 1311 to 1363 are performed in the same procedure as steps 1111 to 1163 for adjusting the level and phase adjustment of the predistortion signal. That is, the controller 237 selects the fourth signal SF4 by controlling the selector 235 and sequentially selects the intermodulation signal IM1-IM4 by controlling the detector 236, and the controller 237 subsequently selects the intermodulation signal detected by the detector 236. RSSIs of IM1-IM4 are received sequentially. Thereafter, the intermodulation signal IM of the largest RSSI is selected from the received intermodulation signals IM1-IM4, and then the strengths of the intermodulation signal IM in the previous state and the currently detected intermodulation signal IM are compared. The controller 237 controls the second variable displacement phase 221 and the second variable damper 220 by obtaining a phase control signal PIC2 and an attenuation control signal ATT2 corresponding to the difference between the two intermodulation signal components. At this time, the second variable attenuator 220 and the internal displacement control unit 221 as described above are performed N times.

10A to 10G, the linear amplifier according to the embodiment of the present invention first sets service channels, and then sequentially converts the predistortion signal for suppressing the intermodulation signal included in the power amplifier 214. Adjusts the level and phase, adjusts the level and phase of the RF signal input to the main path to suppress the RF signal components included in the canceller 219, and the intermodulated signal components included in the final amplified RF signal. The level and phase of the intermodulation signal component outputted from the canceller 219 are adjusted to suppress.

In the embodiment of the present invention, the service channel is first selected as described above, the second phase and level control of the predistortion signal, the third phase and level of the RF signal inputted, and the fourth cancellation. An example of controlling the phase and level of the intermodulation signal component output from the device 219 will be described. However, as another control method, the operation of selecting the service channel may be performed at a predetermined time interval by a timer interrupt. When using this control method, the control unit 237 generates a timer interrupt every time. The service channel discovery operation is performed, and the remaining periods control the variable attenuators and the variable phases as described above. At this time, if a timer interrupt occurs in the state of controlling the random variable attenuator and the variable phase, the control unit 237 stops the current operation, performs the timer interrupt service routine, returns to the main routine, and re-executes the operation. .

10A to 10G, the number of times of controlling the variable attenuators and the variable phases X, Y, and Z is the number of times to effectively control the level and phase of a signal input from the corresponding variable attenuator and the variable phase. In the embodiment of the present invention, the same number of times may be set, and the number of times is assumed to be five times.

12 shows the configuration of a linear amplifier according to a second embodiment of the present invention. The linear amplifier of FIG. 12 is a linear amplifier according to the first embodiment of FIG. 2 except for the configuration in which the first variable attenuator 211 and the first variable displacement unit 212 are located in a sub-path. Has the same configuration as

Referring to FIG. 12, the predistorter 213 on the main path has the configuration as shown in FIGS. 3 to 5, generates harmonics corresponding to the input RF signal, and the attenuation control signal ATT3 and the phase control signal PIC3 of the controller 237. In accordance with the control, the level and phase of the harmonics are combined. The signal is combined with the input RF signal and converted into a predistorted RF signal and output to the power amplifier 214. The power amplifier 214 inputs an output from the predistorter 213 and outputs an RF signal in which intermodulation components are suppressed by amplifying the predistorted RF signal.

The first delay unit 217 on the subpath inputs the RF signal distributed in the main path by the divider 216, and delays the RF signal during the processing time in the predistorter 213 and the power amplifier 214. The first variable attenuator 211 and the first variable displacement unit 212 are connected between the first delay unit 217 and the offset unit 219, and are configured to control the RF signal input by the attenuation control signal ATT1 and the phase control signal PIC1 output from the control unit 237. The level and phase are respectively controlled and output to the canceller 219.

In addition to the above structure, the rest of the linear amplifier device is the same as the linear amplifier device of the first embodiment as shown in FIG. The controller 237 selects and inputs the first signals SF1-SF4 in the same process as that of FIGS. 10A to 10G, detects the RSSI of the intermodulated signal or the RF signal from the selected signal SF, and controls the attenuation control signals ATT1 -ATT3 and phase control. Generates signals PIC1-PIC3. The control unit 237 first sets service channels, sequentially adjusts the level and phase of the predistortion signal for suppressing the intermodulation signal included in the power amplifier 214, and adjusts an RF signal component included in the canceller 219. The level of the modulated signal component output from the canceller 29 is adjusted so that the level and phase of the RF signal input to the auxiliary path are suppressed to suppress the intermodulated signal component included in the final amplified RF signal. And adjust the phase.

Fig. 13 shows the construction of a linear amplifier according to a third embodiment of the present invention. The linear amplifier of FIG. 13 includes a linear amplifier according to the first embodiment of FIG. 2 except for a configuration in which the first variable attenuator 211 and the first variable displacement unit 212 are located between a main path and an auxiliary path. Have the same configuration.

Referring to FIG. 13, the predistorter 213 on the main path has the configuration as shown in FIGS. 3 to 5, generates harmonics corresponding to the input RF signal, and the attenuation control signal ATT3 and the phase control signal PIC3 of the controller 237. In accordance with the control, the level and phase of the harmonics are combined. The signal is combined with the input RF signal and converted into a predistorted RF signal and output to the power amplifier 214. The power amplifier 214 inputs an output from the predistorter 213 and outputs an RF signal in which a mixed component is suppressed while amplifying the predistorted RF signal.

The first delay unit 217 on the subpath inputs the RF signal distributed in the main path by the divider 216, and delays the RF signal during the processing time in the predistorter 213 and the power amplifier 214 to the canceller 219. Output

The first variable attenuator 211 and the first variable shifter 212 are connected between the divider 218 and the canceller 219, and the level of the RF signal input by the attenuation control signal ATT1 and the phase control signal PIC1 output from the controller 237. Phases are respectively controlled and output to the canceller 219. That is, the first variable attenuator 211 and the first variable displacement unit 212 are located between the main path and the auxiliary path, and control the phase and level of the amplified RF signal output from the power amplifier 214 on the main path. Output to canceler 219 on path.

In addition to the above structure, the rest of the linear amplifier device is the same as the linear amplifier device of the first embodiment as shown in FIG.

The controller 237 selects and inputs the first signals SF1-SF4 in the same process as that of FIGS. 10A to 10G, detects the RSSI of the intermodulated signal or the RF signal from the selected signal SF, and controls the attenuation control signals ATT1 -ATT3 and phase control. Generates signals PIC1-PIC3. The control unit 237 first sets service channels, sequentially adjusts the level and phase of the predistortion signal for suppressing the intermodulation signal included in the power amplifier 214, and adjusts an RF signal component included in the canceller 219. Adjust the level and phase of the RF signal output from the power amplifier 214 to suppress, and to suppress the intermodulation signal component included in the final amplified RF signal output of the intermodulation signal component output from the canceller 219 Adjust the level and phase.

The linear amplifier of the second embodiment having the configuration as shown in FIG. 12 and the linear amplifier of the third embodiment having the configuration as shown in FIG. 13 are first serviced in the same manner as the linear amplifier according to the first embodiment. Select the channel, secondly control the phase and level of the pre-distortion signal, thirdly control the phase and level of the RF signal input, and fourthly, phase and phase of the intermodulation signal component output from the canceller 219. Control the level. However, as described above, the operation of selecting the service channel as another control method may be performed at a predetermined time interval by a timer interrupt. When using this control method, the control unit 237 generates a timer interrupt every time. The service channel discovery operation is performed, and the remaining periods control the variable attenuators and the variable phases as described above. At this time, if a timer interrupt occurs in the state of controlling the random variable attenuator and the variable phase, the control unit 237 stops the current operation, performs the timer interrupt service routine, returns to the main routine, and re-executes the operation. .

Also, as in the linear amplifier according to the first embodiment, the number L, M, and N of controlling the variable attenuators and the variable phases effectively control the level and phase of the signal input from the corresponding variable attenuator and the variable phase. It can be set to a number that can be controlled, and in the embodiment of the present invention, the same number is set, and the number is assumed to be five times.

As described above, the linear amplifier according to the embodiment of the present invention can effectively control the intermodulation signal components by using the predistortion method and the feedforward method. In other words, the pre-distortion method first suppresses the intermodulation signal that may occur in the power amplifier, and the feed-forward method suppresses the intermodulation signal component included in the output of the power amplifier. By using this method, it is easy to design and manufacture the power amplifier 214 or the error amplifier 222. In addition, the variable attenuators and variable phase shifters that perform the linearization function have a wide bandwidth in frequency characteristics, have a relatively good flatness, and have good variable characteristics, and thus may be used for other purposes.

Claims (12)

Linear amplifier, A predistorter for generating harmonics corresponding to the input RF signal and generating a predistortion signal by combining the harmonics with the RF signal; A power amplifier for power amplifying the predistorted RF signal and first suppressing the intermodulation signal generated when the RF signal is amplified; Comprising the input RF signal and the output of the power amplifier to extract the intermodulation signal components, error amplification, and combines the amplified intermodulation signal and the output of the power amplifier consists of a feed forward to suppress the second modulation signal Linear amplifier, characterized in that. In a linear amplifier, A first variable attenuation and phaser for adjusting the level and phase of the RF signal input on the main path; A predistorter generating a mixed modulated signal corresponding to an output signal of the first variable attenuation and phase shifter, and combining the first modulated attenuation and the phase shifter to generate a predistorted RF signal; A power amplifier for amplifying and outputting the predistorted RF signal; An offsetter for canceling the output of the power amplifier and the input signal and extracting the intermodulation signal included in the amplified RF signal; A second variable attenuation and phaser for adjusting the level and phase of the intermodulation signal output from the canceller; An error amplifier for amplifying the intermodulation signal output from the second variable attenuation and phase shifter; And a combiner configured to combine the intermodulated signal output from the error amplifier with the output of the power amplifier to suppress the intermodulated signal included in the final RF signal. The method according to claim 2, wherein the predistorter, A divider for distributing power to the input RF signal; An automatic level controller for controlling and outputting the distributed RF signal to a predetermined level; A harmonic generator for generating harmonics corresponding to the level controlled RF signal; A third variable attenuation and phaser for adjusting the level and phase of harmonics output from the harmonic generator; And a combiner for generating a predistorted RF signal by combining the harmonics output from the third variable attenuation and phase shifter and the input RF signal. In a linear amplifier, A predistorter for generating harmonics corresponding to an input RF signal located on a main path and combining the same with the RF signal to generate a predistorted RF signal; A power amplifier for amplifying and outputting the predistorted RF signal; A first variable attenuation and phaser positioned on an auxiliary path to adjust the level and phase of the RF signal distributed in the main path; An offset device positioned on the auxiliary path to cancel an output of the power amplifier distributed on the main path and an output of the first variable attenuation and phaser to extract a mixed modulation signal included in an amplified RF signal; A second variable attenuation and phaser for adjusting the level and phase of the intermodulation signal output from the canceller; An error amplifier for amplifying the intermodulation signal output from the second variable attenuation and phase shifter; And a combiner configured to combine the intermodulated signal output from the error amplifier and the output of the power amplifier to suppress the intermodulated signal included in the final RF signal. The method according to claim 4, wherein the predistorter, A divider for distributing power to the input RF signal; An automatic level controller for controlling and outputting the distributed RF signal to a predetermined level; A harmonic generator for generating harmonics corresponding to the level controlled RF signal; A third variable attenuation and phaser for adjusting the level and phase of harmonics output from the harmonic generator; And a combiner for generating a predistorted RF signal by combining the harmonics output from the third variable attenuation and phase shifter and the input RF signal. In a linear amplifier, A predistorter for generating harmonics corresponding to an input RF signal located on a main path and combining the same with the RF signal to generate a predistorted RF signal; A power amplifier for amplifying and outputting the predistorted RF signal; A first variable attenuator and phaser positioned between the main path and the auxiliary path to adjust the output level and phase of the power divider distributed in the main path; An canceller positioned on the auxiliary path to cancel an RF signal output from the first variable attenuation and phase shifter and an RF signal distributed from the main path to extract a mixed modulation signal included in an amplified RF signal; A second variable attenuation and phaser for adjusting the level and phase of the intermodulation signal output from the canceller; An error amplifier for amplifying the intermodulation signal output from the second variable attenuation and phase shifter; And a combiner configured to combine the intermodulated signal output from the error amplifier and the output of the power amplifier to suppress the intermodulated signal included in the final RF signal. According to claim 6, The predistorter, A divider for distributing power to the input RF signal; An automatic level controller for controlling and outputting the distributed RF signal to a predetermined level; A harmonic generator for generating harmonics corresponding to the level controlled RF signal; A third variable attenuation and phaser for adjusting the level and phase of harmonics output from the harmonic generator; And a combiner for combining the harmonics output from the third variable attenuation and phase shifter with the RF signal to generate a predistorted RF signal. In a linear amplifier, A first variable attenuator and phaser positioned on the main path, the first variable attenuator and phaser for adjusting the level and phase of the RF signal input by the first attenuation control signal and the phase control signal; A third variable attenuation and phase shifter, generating a harmonic corresponding to the RF signal output to the first variable attenuation and phase shifter, and adjusting the level and phase of the harmonic by the third attenuation control signal and the phase control signal; A predistorter coupled to the RF signal to generate a predistorted RF signal; A power amplifier for amplifying and outputting the predistorted RF signal; An canceller positioned on the auxiliary path to cancel the intermodulated signal included in the amplified RF signal by canceling the output of the power amplifier and the input RF signal distributed on the main path; A second variable attenuation and phaser for inputting the intermodulation signal output from the canceller and adjusting the level and phase of the intermodulation signal by a second attenuation control signal and a phase control signal; An error amplifier for amplifying the intermodulation signal output from the second variable attenuation and phase shifter; A combiner for combining the intermodulated signal output from the error amplifier and the output of the power amplifier to suppress the intermodulated signal included in the final RF signal; A selector for inputting an output of the power amplifier, an output of the canceller, and the final output signal, and selecting an output corresponding to the switch control signal; A detector which inputs an output of the selector and detects signal strength by synchronizing a frequency of an RF signal or intermodulated signals by control data; Generating the switch control signals, outputting control data for synchronizing the intermodulation signals included in the power amplifier when the output of the power amplifier is selected, and the intermodulation signal strength of the previous state and the intensity of the intermodulation signal output from the detector; And generating the third attenuation control signal and the phase control signal corresponding to the difference, and outputting control data for synchronizing the RF signals included in the output of the canceller when the output of the canceller is selected. The first attenuation control signal and the phase control signal corresponding to the difference are generated by comparing the strengths of the output RF signals with the RF signal strength of the previous state, and the horn included in the RF signal when selecting the final output RF signal. Intermodulation signals outputted from the detector and outputting control data for synchronizing modulation signals Compared to the strength and the state before the cross-modulation signal strength of the second attenuation control signal and a linear amplifier according to claim 2 consisting of a control unit for generating a phase control signal corresponding to the difference. The method of claim 8, wherein the predistorter, A divider for distributing power to the input RF signal; An automatic level controller for controlling and outputting the distributed RF signal to a predetermined level; A harmonic generator for generating harmonics corresponding to the level controlled RF signal; A third variable attenuation and phaser for adjusting the level and phase of harmonics output from the harmonic generator; And a combiner for combining the harmonics output from the third variable attenuation and phase shifter and the input RF signal to generate a predistorted RF signal. The method according to claim 9 or 11, wherein the detector, A PLL for inputting the control data to generate a corresponding local frequency; A mixer for mixing the signal output from the selector with the output of the PLL; A filter for converting the frequency drop output from the mixer; And a log amplifier configured to convert the output of the filter into a DC voltage and output the signal strength. In the method of removing the intermodulation signal of the linear amplifier, Generating harmonics corresponding to the input RF signal, and generating a predistortion signal by combining the harmonics and the RF signal, A power amplifying process for firstly suppressing intermodulation signals generated during power amplification by amplifying the predistorted RF signal; Extracting a mixed modulated signal component by canceling the input RF signal and the output of the power amplifier; Comprising the second step of suppressing the intermodulation signal included in the power-amplified RF signal by combining the intermodulation signal and the power-amplified RF signal. The method of claim 11, wherein the process of first suppressing the intermodulation signal comprises: Distributing the input RF signal and maintaining a constant level of the distributed RF signal; Generating a harmonic signal corresponding to the RF signal; Combining the harmonic signal with the RF signal to generate a predistorted RF signal; And a first step of suppressing the intermodulated signal generated during amplification by power amplifying the predistorted signal.