FI116339B - Linear power amplifier and method - Google Patents

Description

116339

BACKGROUND OF THE INVENTION Field of the Invention

The present invention relates to a linear power amplifying device and method, and in particular to a linear power amplifying device and method, for eliminating intermodulation distortion (intermodulation distortion) through a pre-distortion system and a feed-in system.

Description of Related Art

Typically, high power amplifiers (hereinafter referred to as HPA, high power amplifiers) operate in the vicinity of the saturation area with a non-linear characteristic to generate maximum power. However, in the case where the multicarrier is fed to a high power amplifier, the multicarrier generates intermodulation distortion (hereinafter referred to as IMD, Intermodulation Distortion). As a result, the performance of the above amplifier may be severely impaired. Thus, a problem has arisen in which the input signal level must be dropped by several decibels or a power transistor having more capacity than a conventional transistor must be used in order to prevent degradation of the power amplifier described above.

In this case, since a high-capacity transistor 20 is not used, but a transistor of suitable capacity, the linear power amplifier can eliminate advanced intermodulation distortion by its linearity. A digital power amplifier is necessary to improve the quality of the :: RF signal transmitted from the communication equipment.

Figure 1 is a block diagram of a prior art linear power amplifier structure disclosed in U.S. Patent No. 5,130,663, Tattersall, 14, 7, 1992. Since a linear power amplifier of the same structure as Figure 1 generates a control signal, the to the signal input signal, indicates the control signal at the last output terminal, and * · »controls the phase and gain of the differential amplifier, can thus be suppressed by the intermodulation distortion; In other words, the linear power amplifier takes advantage

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· 1. v a control signal for continuously attenuating the phase and gain of the difference amplifier, regardless of changing condition factors, with the aim of eliminating the distortion modulation.

• 1 * 1 »116339 2

But now that the linear power amplifier using the control signal shown in Fig. 1 has no knowledge of changing conditions, it is difficult for the amplifier described above to determine the state for automatically adjusting the linear gain. Further, since the linear power amplifier also includes a control generator and a control detector or the like, the structure and control operation of the linear power amplifier can be complicated.

As described above, esivääristymäjärjestelmä the development of a pre-distortion ottosignaaiiin and power amplifier intermodulation improve the damping properties of the part, the negative feedback system 10 of the distortion to feedback and attenuating the output distortion of the amplifier, and the switching system just to separate the distortion to form the antibody phase and the extracted distortion attenuating are exemplary linear tehonvahvistusmenetelmälle keskeismodulaa-tiovääristymän eliminate the control system unused.

15 Summary of the Invention

Therefore, it is an object of the present invention to provide a linear power amplification device and method for dividing and eliminating intermodulation distortion by means of a pre-distortion system and a feed-in system.

It is another object of the present invention to provide a linear power amplifying device and method of advanced power amplification. . to attenuate intermodulation distortion with the pre-distortion system, and lastly, to include in the amplified signal output; 'To attenuate the kink modulation distortion.

It is a further object of the present invention to provide a linear power amplifying device and method that places a preamplifier at the front I '·· terminal, anticipates intermodulation distortion to develop in a terminal: T: amplifies a precursor signal, and provides a pre-distortion signal to the amplifier, thereby first attenuating the amplifier; mese developed intermodulation distortion.

. It is a further object of the present invention to provide a * * I linear power amplification device and method for discriminating between the remainder of the main modulation distortion included in the output of the power amplifier, attenuating the primary modulation distortion to the first, and the separated intermodulation distortion. thus, the second · · · ·, 35 attenuating the intermodulation distortion that occurs as the last output

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in the amplified signal.

3, 116539

In order to achieve the above object of the present invention, the present invention may be implemented by a linear power amplifier having a power terminal amplifier for eliminating intermodulation distortion, comprising: pre-distortion signal by connecting the RF signal to a harmonic; and a second switch for attenuating the intermodulation signal by suppressing the supplied RF signal and output of the power amplifier, discriminating the intermodulation signal distortion, differential-amplifying the intermodulated signal distortion, and connecting the amplified intermodulation power output.

Further, the present invention may be implemented by a method of eliminating the intermodulation signal of a linear power amplifier including a power amplifier, comprising the steps of: (a) first amplifying an advanced intermodulation signal, RF signal harmonic; and (b) attenuating the intermodulation signal by secondly canceling the supplied RF signal and output of the power amplifier, discriminating the distortion of the intermodulation signal, and differentially amplifying the intermodulated signal distortion, and coupling the amplified intermodulation signal to the power amplifier amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS *; ·· 'A more complete evaluation of the invention and many of its advantages are:; easily apparent and will be better understood by referring to the following one-

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25, the accompanying drawings in which like reference numerals indicate like or similar components, and in which:

Fig. 1 is a block diagram illustrating a structure of a prior art linear power amplifier; Fig. 2 is a block diagram showing a structure of a linear power amplifier according to a first embodiment of the present invention; Fig. 3 shows the structure of the precursor of Fig. 2;

Figure 4 shows the structure of the automatic level controller of Figure 3; v. Figure 5 illustrates the structure of the signal detector of Figure 4; 116339 4

Figures 6A to 6G illustrate signal spectrum characteristics for explaining the operation of a linear power amplifier according to the first embodiment of the present invention shown in Figure 2;

Figure 7 shows the structure of the signal detector of Figure 2; Figure 8 shows the structure of the guide of Figure 2;

Figure 9 is a flowchart illustrating the operation of the controller damping and phase control functions of an embodiment of the present invention;

Fig. 10 is a flowchart illustrating the operation of the variable attenuator and variable phase shifter control of Fig. 2 with a controller according to an embodiment of the present invention;

Figures 11A-11C are flow charts of frequency setting properties for controlling the signal attenuation and phase of Figure 10;

Fig. 12 is a block diagram illustrating a structure of a linear power amplifier according to another embodiment of the present invention; and FIG. 13 is a block diagram illustrating a structure of a linear power amplifier according to a third embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In the following description, numerical details such as the components and frequencies of the concrete circuit are provided for a more thorough understanding of the present invention. However, it is obvious to a person skilled in the art,. . that the present invention may be practiced without these details. Known- · * ;; A description of the functions and structures of these devices which unnecessarily confuses the actual subject matter of the present invention is avoided in the present invention.

Figure 2 is a block diagram illustrating a structure of a linear power amplifier according to a first embodiment of the present invention. Referring to FIG. 2, the first variable attenuator 211 controls the gain of the RF signal gain as supplied by the attenuation control signal ATT1. The first variable phase shifter 212 is supplied with a first variable attenuator: 211 output and controls the phase of the RF signal to supply the phase control signal PCI1.

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The preamplifier 213 receives an RF signal as input, anticipates a plurality of intermodulation distortions to develop at the power terminal 214 of the terminal, and generates a distortion signal. Power Amplifier 214! ·, Amplifies the RF signal provided by the preamp 213 and outputs a power amplified signal. The second delay unit 215 inputs the RF signal provided by the power terminal amplifier 214, delays and outputs the input RF signal at a time when the intermodulation signal is provided. As mentioned above, the structure is considered to be the main path of the linear power amplifier according to the preferred embodiment of the present invention.

Power splitter 216 distributes the RF signal applied to the main path and outputs a fractional 5 RF signal. It is also possible to use a directional switch as a power divider 216. The first delay unit 217 compensates for the RF signal delay time in the main path pre-distortion and amplification process. The power splitter 218 is located at the output terminal of the power terminal amplifier 214 and distributes the output of the power terminal amplifier 214, which should then be output. As with power divider 216, the directional switch 10 may be used as power divider 218. Signal suppressor 219 supplies an RF signal from a first delay unit 217 and an amplified RF signal from power amplifier 214. Signal canceler 219 cancels the RF signal provided by the first delay element 217 from the output of the power amplifier 214, thereby detecting the intermodulation signal. In the embodiment of the present invention, the signal canceler 219 is used as a subtractor.

The second variable suppressor 220 receives an input intermodulation signal from output signal 219 and controls the intermodulation signal gain provided by the attenuation control signal ATT2 output from controller 237. The second variable phase shifter 221 receives input input signal from step 23 and a second variable suppressor output step 2. which is output from the controller 237. The difference amplifier 222 amplifies the intermodulation signal received by the second variable phase shifter 221 and outputs the intermodulation amplified signal. Signal Switch «* *: The 25 223 switches the output of the differential amplifier 222 to the output terminal of the second delay unit 215.

: it The directional switch can be used as a signal switch 223.

* ... The above structure corresponds to a side path for attenuating the intermodulation signal of the main road in a preferred embodiment of the present invention.

The power divider 231 divides the input RF signal placed at the input terminal and outputs the first signal SF1. The power divider 232 is positioned. '. ·. to the output terminal of the power amplifier 214, and distributes the amplified RF signal. · and outputs another signal SF2. The power divider 233 is positioned at the output of the signal generator 219, and distributes the intermodulation signal with the RF signal! 35 canceled, and outputs a third signal SF3. The power divider 234 is positioned at the output terminal and distributes the last output RF signal, and outputs 116339 6 outputs a fourth signal SF4. Power dividers 231-234 can be replaced by a directional switch. Signal selector 235 inputs the previous signals SF1-SF4 produced as output in power splitters 231-234 and selectively outputs signal SF which is respectively controlled by the switch control data SWC which is output from controller 237.

Signal detector 236 detects a received signal strength indicator (hereinafter referred to as RSSI, signal received by signal SF) which is output from signal selector 235, control data PCD (PLL control data) output from controller 237, and then outputs 10 RSSI signals which are modified DC power. Controller 237 generates a coupling control signal SWC to select a sine SF aiming at signal selector 235 and further determines control data PCD frequency in signal detector 236 for detecting the SF RSSI of the selected signal.

In addition, controller 237 analyzes the value of 15 RSSI signals output from signal detector 236 and generates attenuation control signals ATT1 to ATT3 and phase control signals PIC1 to PIC3, the previous signals controlling variable attenuator and variable phase shift to adjust signal gain and gain. Above all, in the case of selecting an input signal output at power divider 231, controller 237 controls signal detector 236, detects the RSSI signal of the input RF signal and determines the size of the RSSI signal so that the frequency: component of the input RF signal can be identified. In the case where output from power divider 232 of power terminal amplifier 214 is selected, the signal detector f * is controlled by controller 237. 236, denotes the RSSI signal of the harmonic signal of the amplified RF signal, and, ·. : 25 determines the size of the RSSI signal, thereby generating the attenuation control signal ATT3 and the phase control signal PIC3, to adjust the attenuation and phase adjustment of the central modulation signal output from the preamp 213 of each signal 213. Second, when the output of signal canceler 219 is selected, controller 237 controls signal detector 236, detects the RSSI signal of the RF signal included in the mux intermodulation signal, and determines the size of the RSSI signal, thus * '.., generating the attenuation control signal ATT 1. and a phase control signal PIC1,. , to adjust the attenuation and phase of the RF signal for each signal, line, ·. AAR power amplifier fed to the input terminal. Third, when the last output gain signal is selected, the controller 237 controls the signal detector: V 35 ta 236, detects the RSSI signals of the intermodulation signals contained in the last output signal, and determines the size of the RSSI signals, thereby reducing the attenuation control signal. a phase control signal PIC2, for controlling the attenuation and phase control of the intermodulation signal produced by the signal canceller 219 of each signal.

In accordance with a preferred embodiment of the present invention, as described above, the linear power amplifier eliminates the intermodulation signal that may occur in the amplification step by using a pre-distortion system and a feed-in system. In the above embodiment of the present invention, the preamplifier 213 first performs the intermodulation signal output function provided as output to the power amplifier 214. The above function 10 is implemented by pre-amplifier 213 generating a pre-expected harmonic which may develop upon amplification in step 214, that it is in counter-phase with the harmonic that can be generated in the power amplifier 214 and is output at the moment when the harmonic is supplied to the power transistor of the power amplifier 214. With the pre-distortion system, it is impossible to completely eliminate the intermodulation signal provided by the linear power amplifier. Consequently, the linear power amplifier according to the embodiment of the present invention first suppresses the intermodulation signal in the preamplifier 213, and lastly attenuates the intermodulation signal using 20 feed-in systems. The linear power amplifier using the bypass system reverses the distortion of the pure RF signal in the power terminal amplifier: 214, outputs the intermodulation signal, and couples the interrupted central modulation signal to the signal switch 223, thereby canceling the intermodulation. Therefore, when using a feed-in system, the distortion of the • · »intermodulation signal contained in the amplified signal at the last output terminal of the linear power amplifier can be attenuated, so that a pure amplified RF signal can be output.

'' In the embodiment of the present invention, as described above, the intermodulation signal generated in amplification of the power amplifier 214 is first suppressed using a precistor system, and: the intermodulation signal output from the power amplifier 214 is suppressed. for the second time using a feed-in system. Herein, for ease of description, after detecting the operation of the pre-distortion system for attenuating the intermodulation signal, next observe the operation of the switching system for attenuating the intermodulation signal.

116339 8

FIGS. 6A to 6G illustrate signal spectrum characteristics for explaining the operation of a linear power amplifier according to the first embodiment of the present invention shown in FIG. 2, FIGS. In other words, Fig. 6A shows the input RF-5 signal, Fig. 6B shows the harmonics of the RF signal generated in the harmonic generator 314, the harmonics in the signal shown in Fig. 6C are adjusted by the variable attenuator 315 in the preamplifier 213 and the phase is adjusted by the variable phase shifter 316. 6D illustrates an amplified RF signal including 10 intermodulation signals by amplifying the pre-distortion signal supplied to the power terminal amplifier 214 shown in FIG. 6C. FIG. 6E illustrates a separated intermodulation signal by undoing a signal distortion in the amplified RF signal in the signal suppressor as shown in FIG. 6A, FIG. 6F illustrating a signal that adjusts the magnitude of the intermodulation signal shown in FIG. 6E 15 and adjusts the output power of FIG. and Fig. 6G shows the last output signal produced, wherein the intermodulation signal is attenuated by coupling the separated intermodulation signal shown in Fig. 6D and the amplified RF signal shown in Fig. 6D in reverse phase.

Figure 3 shows the structure of the pre-shaker 213 of Figure 2. Referring to Figure 3, power divider 312 distributes an RF signal placed at the input terminal and outputs an output RF signal. The automatic level controller (henceforth ALC, automatic level controller) continuously maintains a constant level of the RF signal input. **. for producing harmonics regardless of the variation in the level of the supplied RF signal. The harmonic generator 314 supplies an RF signal that adjusts the level in the automatic level controller 313 and generates a third, • I *, fifth, seventh and higher harmonics of the RF signal. The variable attenuator 315> i · '·' * feeds the harmonic output from the harmonic generator 314 and controls the amplification of the harmonics by the attenuation control signal ATT3, already -:.! : 30 ka is output from controller 237. Variable phase shifter 316 supplies the harmonic obtained from the harmonic distortion with the phase control signal PIC3, which is output by the controller 237. The second delay unit 311 delays the RF signal applied over the main road during the period in which the pre-distortion signal occurs. The signal switch 317 is disposed between the output terminal 214 of the second delay unit 311 and the input terminal 214 of the power amplifier 214, thereby coupling the pre-,.: Distortion signal to the delayed RF signal.

1 1 6339 9

Referring to Figure 3, the harmonic generator 314 is constructed as a signal switch and a Schottky diode. When an RF signal is applied to a Schottky diode, the Schottky diode generates high harmonics according to the level of the RF signal input. Thus, the level of the RF signal supplied to the Schottky diode should be set to the level 5 that is best able to attenuate the intermodulation signal included in the output of the power amplifier 214. To accomplish this, the automatic level controller 313 is located at the front terminal of the harmonic generator 314 such that the RF signal can always be supplied at the desired level.

The automatic level controller 313 controls a specific level of RF signal output-10 and which level is set despite a varying level of the RF signal supplied to the linear power amplifier. Figure 4 illustrates the structure of the automatic level controller 313 of Figure 3, wherein the variable attenuator 412 is coupled between a power divider 312 and a harmonic generator 314. Here, the power divider 414 is disposed at the input terminal of the harmonic generator 314 which finally distributes and outputs a regulated RF signal 15 which is applied to the harmonic generator 314. In this case, the power detector 415 converts the RF signal to DC and thus outputs Thus, the level controller 416 controls the variable attenuator 412 according to the DC voltage output from the power detector 415, whereby a RF signal 20 of a given level can always be supplied to a harmonic generator 314.

Here, the power detector 415 of Figure 4 should detect a multi-carrier. Namely, the power detector 415 should supply an RF signal to a multicarrier and convert the supplied RF signal to a DC voltage. Fig. 5 shows the powerl. The structure of the scanner 415, where the RF transformer 451 supplies an RF signal and generates two signals having a phase difference of 180 ° with each other, converting the two signals output from the RF transformer 451 from the transmitting lines 452 and 453 through Schottky diodes 454 and 455 to the DC level, thus synthesizing * · '' the converted signal through capacitor 456 and resistor 457, and outputting the filtered signal as DC voltage.

With reference to Figures 3 and 4, taking into account the operation of controlling the level of the input RF signal, an RF converter 451 generating a power detector 415, ·. signals having a phase difference of 180 °, generates two signals by separating the input RF signal by a beam unit. Further, Schottky diodes 454 and 455 convert the two signals supplied through the transmission lines 452 and 453 to DC levels. i '.: 35 Thus, the average power of the multi-carrier can be detected without error, by which the level of the RF signal supplied to the harmonic generator 314 can be accurately converted to a DC voltage.

Here, the level controller 416 generates a control signal output from the power detector 415 depending on the DC voltage level and supplies the generated control signal to a variable attenuated 412. The level controller 314 can be implemented using an operational amplifier. Here, a control signal output from the level controller 416 is generated to perform more attenuation control as the voltage increases with the DC voltage of the detected RF signal and less to perform attenuation control as the voltage decreases. Thus, the variable attenuator 412 will vary the attenuation of the RF signal to have a certain level regardless of the level of the input RF signal, and supply the attenuated signal to a harmonic generator 314.

When the level of the RF signal input is fluctuated by 10 dB, the operating range of the automatic level controller 313 should be designed to control its level by at least 15 above 10 dB. In addition, the RF level output level of the automatic level controller 313 should be set optimally to suppress the intermodulation signal generated by the harmonic generator 314 in the power terminal amplifier 214, such as the preamp signal. Because the harmonics generator 314, which supplies the output of the automatic level controller 313, supplies a certain level RF signal, the harmonics can occur continuously. When the harmonics output from the harmonic signal generator 314 are fed to a power terminal amplifier 214 to which the RF signal is coupled, the power terminal amplifier 214 can prevent the development of the intermodulation signal during the amplification of the RF signal.

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Likewise, when feeding harmonics developed as described above: 25 to the power amplifier 214, the size and * phase of the harmonics generated in the gain must be adjusted. The variable attenuator 315 and variable phase shifter 316 shown in Figure 3 adjust the phase and size of the developed harmonics to supply the size of the intermodulation signal to be generated in the gain to adjust the size and counter-phase harmonics.

!. The controller 237 controls the signal selector 235 and selects the output of the power amplifier 214, which is output from the power divider 232, and the signal detector, v. 236 detects the intermodulation signal at the output of the RSSI signal power terminal amplifier, ···, 214 as shown in Figure 6D. After comparing and analyzing the RSSI value of the intermodulation signal output from the signal detector 236 with the previous RSSI value of its state, the attenuation control signal ATT3 and 116339 develop a 11-phase control signal PIC3 for controlling the intermodulation signal of the intermodulation signal.

Thereafter, the variable attenuator 315 adjusts the magnitude of the pre-distortion signal generated by the harmonics generator 314 by the control signal ATT3, and the variable phase shifter 316 adjusts its phase so that the pre-distortion signal can be supplied to the in the generator 314, adjusts its size and phase, and the signal switch 317 couples the intermodulation signal to the input terminal of the power amplifier 214. At this point 10, as shown in FIG. 6A, the second delay unit 311 delays the RF signal being input until the pre-distortion signal is coupled to the input terminal of the power amplifier 214. Thereafter, it will be appreciated that the pre-distortion signal is coupled to the input terminal of the power amplifier 214. Here, it is preferable to use a position in which the mid-modulation signal coupled to the RF signal, as shown in FIG.

As noted above, the preamplifier 213 pre-supposes the intermodulation signal in the power terminal amplifier 214, thereby generating the pre-distortion signal, and controls the harmonics phase and attenuation to prevent the intermodulation signal from evolving to maximum, thus harmonic that is ke- * *? ·: ***; shrink from advanced harmonics in the power amplifier 214 to the highest level * I ». * ·,. The miniaturization effect of the prime distortion system on the central modulation signal can greatly reduce the signal prime modulation load • · ·.! * using a feed-in system. When the control of the feed-through system is very sophisticated, the improvement achieved by the pre-distortion system is preferably several decibels.

Second, after first suppressing the intermodulation signal generated in the power terminal amplifier 214 by the pre-distortion system 30, as mentioned above, the second intermodulation signal, which is impossible to suppress, is provided by the feed-forward system. In the " I " feedforward system described above, the steps for reducing the center modulation signal of the power amplifier 214 are divided into two main phases, i ',: The first step is to distinguish pure intermodulation signal distortion by canceling the supplied RF signal and power output amplifier 21. The step of step 33339 12 is to reverse the distortion of the intermodulation signal after the output and power correction of the intermodulated signal at the output of the power terminal amplifier 214 to reduce the intermodulation signal in the signal last brought to the output of the power terminal amplifier.

5 Above all, the explanation of the first step of the feed-in system is given below. The side path power divider 216 divides the input RF signal shown in FIG. 6A, and the first delay unit 217 delays the RF signal distributed in the power divider 216 during the pre-distortion and RF amplification, thereby supplying the delayed signal to the signal canceller 219. Thus, the RF signal shown in FIG. outputted from the first delay unit 217, mutually canceled with the RF signal distortion of the gain signal shown in FIG. 6D divided by power divider 218 to discriminate and output the pure intermodulation signal.

As mentioned above, the function of the signal suppressor as the core structure of the feed-in-15 field system is to detect only the distortion of the intermodulation signal in the power terminal amplifier 214. The signal suppressor 219 can be constructed as a reducer or adder. In the event that the signal canceler 219 is constructed as a subtractor, the two RF signals to be supplied must be adjusted so that they are in phase with one another. In the case where the signal suppressor 219 is constructed as an adder, the two supplied RF signals must be adjusted so that they are in phase with each other. In a preferred embodiment of the present invention, the signal canceler 219 is not implemented as a reducer but as an adder. In this case, the subtractor must include a signal switch, supply one of the two RF signals to be supplied to the signal switch 25, the phase being the same with the other signal, and convert the second signal to be in phase with the other signal, thereby supplying the converted signal to the signal switch. When the RF signal shown in Figure 6A and the amplified RF signal shown in Figure 6D are supplied as a subtractor; to the implemented signal canceler 219, the two RF signal distortions, '!!.' 30 whose phases are the same with respect to each other, are converted such that their phases * are opposite within the subtractor. The RF signal is then canceled as it passes through the signal switch (a Wilkinson coupler can be used here): '' ': leaving only the intermodulation signal distortion.

; . '.T Then, the · · _'.,; 35 all levels and stages can be exactly the same. To this end, the amplified RF signal output from the power tail amplifier 214 on the main road 214 and the 13 1 1 6 3 3 9 output via the side path must be exactly matched to the group delay and the smoothness of the delay characteristic must be positive. In other words, it is preferable that the development of phase distortion of the RF signal to be undone should be prevented to the greatest extent possible.

As discussed above, when the level and phase of the RF signal output from the first delay unit 217 and the output of the power amplifier 214 are not exactly matched, the RF signal is not accurately canceled by the signal suppressor 219. To eliminate the above, the first variable attenuator 211 of FIG. the level of the RF signal supplied by the attenuation control signal 10 ATT1 from the controller 237 and the second variable phase shifter 212 adjusts the phase of the RF signal supplied by the controller 237 phase control signal PIC1. Thus, the first variable attenuator 211 and the second variable phase shifter 212 respectively adjust the phase and level of the sideways RF signal in agreement with the phase and level of the RF signal. Thus, the signal-15 canceller 219 cancels the two supplied RF signals with the same level and phase.

As mentioned above, to control the phases and levels of the two RF signals, controller 237 provides a switch control signal SWC for selecting a third signal SF3 to signal selector 235 and outputs control data PCD (control data) for a third signal SF3 RF signal distortion RSSI: to detect signal n in signal detector 236. As a result, the signal detector 235 selectively supplies a third signal SF3 as a signal output of * * * modem 219, the output of signal selector 235 being distributed in a power divider • * * · * ... · 233, and signal detector 236 generates an RSSI that converts a distortion signal of a third signal into a DC voltage of a 25in SF3 RF signal. In this case, the controller 237 generates an attenuation control signal ATT1 and a phase control signal PIC1 to attenuate the RF signal distortion in the signal equalizer 219.

Thereafter, the first variable attenuator 211 attenuates: the input RF signal by determining the training ratio attenuation control I »· '/ 30 by the ATT 1 signal and the first phase variable phase shifter 212 adjusts the phase of the input RF signal with the phase control signal PIC1. In this case, since the attenuation control signal ATT1 and the phase control signal PIC1 are generated after comparing and analyzing in the first signal canceler. 219 the RSSI of the output RF signal and the RSSI of the previous RSSI, the first * 35 variable attenuator 211 and the first variable phase shifter 14 116359 212 controls the two RF signals shown in Figures 6D and 6A such that the previous RF signals may eventually have the same phases and levels relative to each other.

The reason for canceling the RF signal distortion in the signal canceler 219, as discussed above, is to not affect the rear terminal difference amplifier 222 by damping much of the RF signal and merely discriminating the intermodulation signal distortion. Namely, if the output of the signal cancellation time 219 changes and the RF signal is not effectively eliminated, a relatively high level RF signal is supplied to the difference amplifier 22, thereby damaging the difference amplifier 222.

10 Second, the explanation of the second step of the feed-in system is given below. In this case, the intermodulation signal output from the signal canceller 219, as described above, adjusts its phase and level through a second variable damper 220, a second variable phase shifter 221, and a difference amplifier 222, and the distortion of the intermodulation signal 15 included in power output output. During this time, the intermodulation signal coupled by the signal switch 223 should be in the opposite phase to the amplified and output signal.

In this case, the controller 237 generates a switching control signal SWC to select the fourth signal SF4 as the last output signal, which is within the power divider 234, and outputs the control data PCD to the harmonic RSSI-ls. . for the fourth signal SF4 as the intermodulation signal. Thus, the signal selector 235 selectively outputs the fourth '·. * Signal SF4 output from the power divider 234 to the control signal SWC of the switching signal SWC and the signal detector 236 is used to control the harmonic RSSI of the fourth signal SF4 to control PCD. In this case, controller 237 compares and analyzes the RSSI of the intermodulation signal contained in the last output signal to the RSSI of the earlier intermodulation signal, which, depending on the result analyzed, can be used to develop the attenuation control signal ATT2 and phase control. signal PIC2 to attenuate the intermodulation signal contained in the last output signal.

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Therefore, one variable attenuator 220 to which the output of the signal suppressor 219 is supplied adjusts the level of the average modulation signal supplied by the attenuation control signal ATT2, and the second variable phase shifter 221 to which the signal output from the second variable attenuator 220 is supplied; The phase of the intermodulation signal supplied with the 35-h control signal PIC2. Thus, the second variable phase shifter 221 controls the phase modulation of the intermodulation signal so that it is in phase opposite to the signal switch 223 by the phase control signal PIC2. Thus, the difference amplifier 222 coupled between the second variable phase shifter 221 and the signal switch 223 amplifies and outputs a center modulation signal, the level and phase of which are adjusted as described above.

As described above, a linear power amplifier according to an embodiment of the present invention uses a feed-in system and a pre-distortion system to attenuate the intermodulation signal included in the gain signal. To suppress the center modulation signal in the power terminal amplifier 214, the intermodulation signal capable of evolving 10 is pre-attenuated by the precolor system, and thus the center modulation signal included in the output of the power terminal amplifier 214 is expressed by the forward signal and output signal. In the event that the intermodulation signal is eliminated using only the forward-coupling system because it is difficult to design and construct the power-end amplifier 214 and the differential amplifier 222, the intermodulation signal of a certain size is pre-attenuated by the pre-distortion intermodulation system 213. This makes the design and construction of the linear power amplifier easier.

Next, the attenuation of the intermodulation signal using the feed-in system and the pre-distortion system for the controller 237 will be described in detail.

Figure 7 illustrates the structure of the signal detector 236 of Figure 2 in accordance with the present invention.

With reference to Figure 7, the attenuator 711 attenuates and outputs the SF signal obtained from the signal selector 235. The filter 712 filters broadband *: '; *; as a filter the transmission band signal. The phase locked loop (hereinafter referred to as the PLL) 713 and the oscillator 714 generate the corresponding local frequency LF1 with control data PCD from controller 237. The purpose of the above weight tilt frequency LF1 is to determine the frequency for detecting the RSSI of the selected SF signal. The mixer 715 mixes the signal v.: From the filter 712 with the local frequency LF1, thereby generating an intermediate frequency IF. Filter 716,] [[: filters the two-frequency subtraction signal SF-LF1 at the output of mixer 715 as an intermediate frequency filter, thereby generating the filtered signal as intermediate-35 as a jet LF1. Oscillator 719 generates a fixed local frequency LF2. The mixer '718 mixes the intermediate frequency LF1 from the intermediate frequency filter 717 and the intermediate frequency 116339 16 to generate the intermediate frequency IF2. Filter 720 filters the subtraction signal IF1-LF2 at the output of mixer 718 and outputs the filtered signal as local frequency LF2. The log amplifier 712 converts the intermediate frequency IF2 to be printed in the filter 720 into a DC voltage and generates 5 converted voltages as an RSSI signal.

Referring to the operation of FIG. 7, the signal selector 235 selectively outputs the corresponding RF signal between the first signal SF1 and the fourth signal by the switch control signal SWC of the controller 237. Thus, the filter 71 of the signal detector 236 filters the RF signal and supplies the filtered RF-10 signal to the mixer 715. Here, the PLL 713 and the oscillator 714 generate a local frequency LF1 for the harmonic selection of the control signal PCD 1 of the RF signal or the controller 237. Similarly, mixer 715 outputs SF signals with mixing and the local frequency LF1 and filter 716 filters the frequency corresponding to the difference between the two signals and outputs the filtered 15 signal as intermediate frequency IF1. The structure described above determines the frequency for detecting the RSSI in the selected SF signal, and at the same time performs a first step frequency downconversion.

The mixer 118 then mixes the local frequency LF2 and the intermediate frequency IF1 output from the oscillator 718, and the filter 720 filters the intermediate frequency IFF to the frequency corresponding to the difference between the local frequencies LF2, thus outputting the filtered frequency as intermediate frequency IF2. The frequency conversion of the second phase is performed by the above structure.

• · »

The logic amplifier 721 receives an intermediate frequency IF2 as input, converts the input intermediate frequency IF2 to a DC output voltage. In this case, the output signal is tu-25 leeRSSI.

FIG. 8 illustrates the structure of the controller 237 of FIG. 2 in accordance with the present invention. In FIG. 8, the analog-to-digital converter 814 (hereinafter ADC) converts the RSSI printed from the signal selector 236 into digital data, which is further output. The read-only memory 812 (hereinafter ROM) stores a program for controlling the attenuation and phase in accordance with an embodiment of the present invention: * '. The CPU 811 (hereinafter referred to as the CPU) generates '·' / · control data for selecting the frequency of the PCD to select the desired RSSI in the desired SF signal and the switching control signal SWC depending on the program of ROM 812, and generates attenuation control signal-35. The ATT and the phase control signals PIC after comparing and analyzing the RSSI output * 814 of the ADC to each other. The direct access memory 813 (hereinafter referred to as "RAM") temporarily stores any data that is generated during program execution. Digital to Analog Converter 815 (DAC) controller output attenuation control data and phase control data into analog data, and outputs the converted data attenuation control signals as ATT and step-5 control signals PIC Communicator 816 communicates linear power amplifier status information in CPU 816 control.

Fig. 9 is a flowchart illustrating the level and phase control operation where the controller 237 controls the variable dampers and variable phase shifters described above in accordance with an embodiment of the present invention. As shown in Fig. 9, the "X" axis represents the damping value and the "Y" axis the phase change values. Referring to Fig. 9, by changing the value of the variable attenuator in the Bake Pbix position where the RSSI is input, if the detected signal size is reduced, the phase change value changes from Pb to Pc. Thereafter, in the event that the value of the variable attenuator changes at the point where PSI is applied, if the detected signal increases again, the value of the phase change will change in the direction of Pc. Here, Pc is represented as the point where the magnitude of the damping value is temporary. When the phase change value is changed from Obscure to Pei and the detected RSSI size is reduced, the variable phase shifter shifts the phase change value to Pfin.

20 When the muting and phase functions are repeatedly controlled as. , above, the value of a variable attenuator and a variable phase shift is found in which the size of the detected SF signal is minimized. Fig. 10 is a flow chart of the variable attenuator and variable phase shift functions of the controller 237 according to an embodiment of the present invention. As * · · ', * ·: 25 in FIG. 10, when the phase of the detected signal is first controlled, the signal suppression function is performed. However, it is possible to control the phase of the signal after attenuation of the signal.

Referring to Fig. 10, the steps for eliminating intermodulation distortion are divided into four groups. In this regard, firstly, the first, * · [30 first signals SF1 RSS1 is detected, a channel is set in which the RF signal is detected in the transmission band, thereby defining the service channels. Second, the RS2 of the second sigma V signal and the power terminal amplifier 214 suppresses the intermodulation signal to amplify the received RF signal, thereby generating a pre-distortion signal. Thirdly, the RSSI of the third signal SF3 is detected, and thus, the intermodulation signal is tasted to cancel the distortion of the RF signal.

fourth, the RSSI of the fourth signal SF4

116339 18, and lastly, the intermodulation signal contained in the output signal to be output to the power amplifier 214 may be controlled to attenuate it.

Figures 11A-11C illustrate characteristic curves for adjusting the frequency 5 for controlling signal attenuation and phase in Figure 10, wherein Figure 11A shows a second signal SF2 output from power amplifier 214, output divided by signal switch 232, Figure 11B showing a third signal SF3 signal output and represents the fourth signal SF4 as the last output signal at signal switch 224.

Referring to Figures 10 and 11, in the first run controller 237 performs a linear power amplifier initialization operation at step 1000. When initializing, the CPU 811 reads the voltage values of the attenuation control signals ATT1 - ΑΊΓΤ3 and the phase control signals PIC1 to PIC3 for a specific power and a initialize the corresponding areas of RAM 813 15 to store the RSSI value in response to transmission channel read and service channel information. The above initialization operation is performed only when the linear power amplifier is first used. When the linear power amplifier is used, the platform function is not performed.

When the initialization operation is completed, the CPU 811 outputs the first sig- out signal from the SWC power divider 231 of the switch control signal SW-20. , outputs control signal PCD for selecting the first channel of the transmission band in step 1013. In this case, signal selector 235 selectively outputs the first signal SF1 with the control signal SWC and signal detection 256 indicates the first control frequency of the RSSI. The controller 237 then stores the RSSI received on the set channel in IRAM 813 in the corresponding channel area at step 1015 and increments the channel number to indicate the RSSI of the next channel in step 1017. Above εθίσει, *. said channel sweep operation is performed on the last channel '..V 30 of the transmission band while repeatedly performing steps 1011 through 1019.

With respect to the above channel scan function, controller 237 detects the detected RSSI for each channel and stores the detected RSSI in its page 3 while sequentially increasing the channel count from the first channel; 'To the last channel in relation to the total number of channels in the transmission channel.

'! In the case where the mobile communication system is code division multiplexing access (CDMA), the transmission channel is 869.640 116339 19 MHz to 893.19 MHz and the channel period is 1.23 MHz. Thus, in the case of a CDMA system, when the first signal SF1 band is 869.640 MHz to 893.19 MHz, the control data PCD denotes the first signal SF1 from the first channel frequency, 869.40 MHz, successively to the 20th channel frequency, 5 893.10 MHz, with a period of 1.23. MHz. As previously mentioned, in a CDMA system, controller 237 detects the labeled channel RSSI and stores the detected RSSI in RAM 813 while also marking the transmission frequency of 869.40 MHz to 893.19 MHz in the channel scan functions of each channel.

When the channel swipe operation is completed, controller 237 10 adds RSSI of all channels stored in RAM 813 in step 1021 and calculates an average by dividing the RSSI total value of all channels by the number of channels in step 1023. Thereafter, controller 237 determines service channels by performing steps 1015-1035. . Considering the steps for determining a service channel, controller 237 sequentially retrieves the RSSI values stored in the RAM 823 15 of each channel and compares the retrieved value with the averaged value. After checking in step 1027 that the channel RSSI is greater than the average value, controller 237 checks in step 1029 whether the corresponding channel RSSI value is greater than the reference value +0. Assume 0 = 3 dB. Thus, if the RSSI value of the present channel is more than the average value and the reference value in the aforementioned steps 1027 and 1029, controller 237 checks in step. . 1029 whether the RSSI value of the corresponding channel is 30 dB greater than the reference value +0.

• · ·: To set channels with reliable signal distortion as a service channel even if the detected RSSI value is higher than the average value. When the RSSI value of the present channel is greater than the mean value and • · 25 reference value +0, the controller 237 sets the corresponding channel as a service channel in step 1031. By repeatedly performing steps 1025 to 1035, the controller 237 checks all channels. RSSI size and sets service channels.

After selecting the first signal SF1 as described above, oh-: ·. ice 237 detects and analyzes the RSSI value of all channels of the first signal SF1 band, and sets and stores the channel to be transmitted and served.

'I

The controller 237 then confirms and outputs the RF-ν 'signals of the set service channels. However, for ease of explanation, two successive channels are served in an embodiment of the present invention. During this time, each channel '·. The frequency of the RF signal is assumed to be f1 and f2, and the intermodulation signal is assumed to be IM1 to IM2.

116339 20

In FIG. 10, controller 237 in steps 1111 to 1163 checks the intermodulation signal included in the output of the power terminal amplifier 214 and controls the variable attenuator and variable phase shift. The preamplifier 213 generates a preamble junction signal in the power terminal amplifier 214 to suppress the 5 key intermodulation signal capable of developing 5 during amplification, and the controller 237 detects the intermodulation signal of the intermodulation signal 4 assuming, when the RSSI output of the intermodulation signal output from the power terminal amplifier 10,214 is detected, that the controller 237 compares the detected value with the RSSI value of the previous state intermodulation signal, and performs three-step control operations according to the compared results. Here, it is assumed that the ADC 814 and DAC 815 are 16-bit converters, the first step is set to three steps, the second step is set to 10-15 steps, and the third step is set to 20 steps. The step becomes the quantization step in the AD conversion. Thereafter, at the point in time at which the original level and phase are controlled, the controller 237 increments the phase and attenuation control signal by 1 phase and the RSSI of the IM signal is detected from the second control function to the Xth control function. Controller 237 controls it as a first step in case 20 if the reference difference is less than 10 steps, as a second step if. the reference difference is less than 20 steps and the third step if the reference difference is greater than 20 steps. As mentioned above, the level and phase control function of the pre-distortion signal '· · *' is executed successively X times.

Controller 237 outputs the switch control signal SWC to select the second signal * * 25 SF2 in step 1111. Thus, signal selector 235 selects the signal shown in FIG. * * ··· 11A output from the power amplifier 214, thereby outputting the selected signal to signal detector 236. 1113 whether the value of the HG counter is set to zero. Today; ; ·; during the time, the HG counter calculates the attenuated number of the intermodule ** ·. '30 quality signal contained in the power terminal amplifier 214. When the HG counter value is set to zero, ohms 237 outputs the phase control signal PIC3 to the phase control signal VV PPPIC3 + 1 of the previous state (initial state) in step 1115, and converts the phase control signal PIC3 to an analog signal of the DAC 815: v. DAC6: which is then supplied to the variable attenuator 316. Thus, the variable attenuator 316 of the pre-distortioner 213 adjusts the phase of the pre-distortion signal output from the harmonic generator 314 by the phase control signal PIC3 and 116339 21 switches the adjusted level power input amplifier 214 to the input terminal. Thereafter, in step 1117, the controller 237 stores the phase control signal PIC3 as the previous phase control signal PPIC3 for the next state. The controller 237 also outputs, in step 1119, the attenuation control signal ATT3 as the attenuation control signal PATT3 + to the previous state 1 and converts the attenuation control signal ATT3 into an analog signal to a DAC5 variable suppressor 315 for supply. At this point, the variable attenuator 315 of the preamplifier 213 adjusts the level of the pre-distortion signal output from the harmonic generator 314 by the attenuation control signal ATT3 and connects the adjusted level of the power terminal amplifier 10 to the input terminal. Thereafter, 237 stores the attenuation control signal ATT3 as the previous attenuation control signal PATT3 in step 1121.

It can be seen that the first phase and level control of the pre-distortion signal above is accomplished by adding one phase to the control signal of the previous state 15. However, a corresponding control signal may occur when comparing the difference between the present detected control signal and the previous state control signal. After controlling the phase and level of the pre-distortion signal as described above, the controller 237 adds an HG counter in step 1161.

After controlling the phase and level of the pre-distortion signal as described above, controller 237 again performs steps 1123 to 1135, indicating power. intermodulation signals IM1-IM4 RSSI-I · included in the power amplifier 214; values and selects in step 1139 the intermodulation IM with the highest RSSI value.

To do this, controller 237 sequentially prints control data • · · *. '; 25 for marking PCD signals IM1 to IM4 as intermodulation signals at the output of the power amplifier 214, printed in signal detector 236, as shown in FIG. 11A, and receiving and storing the corresponding RSSI value of the IM1 to IM4 central modulation signal.

; Then, in step 141, controller 237 compares the RSSI values of the selected IM signal * * · '30 with the previous mode step control signal PPIC3. Then, if the IM sig-: * signal is larger than the phase control signal PPIC3, then the controller 237 decreases the phase control value at step 1143, and if the IM signal is smaller than the phase control signal PPIC3, the controller 237 increases the phase control value at step 1145. After increasing / decreasing the phase control, the controller 237 ai-'35 obtains the IM signal value and the previous state phase control signal PPIC3 in step 1147, thereby generating a phase control signal PIC3 dependent on the above reduction 1 16339 22. The phase control signal PIC3 is supplied to the variable phase shifter 316 via DAC 815. The controller 237 then stores the phase control signal PIC3 as the previous phase control signal PPIC3 for use in the next state.

Further, after generating the phase control signal PIC3 as described above, controller 237 compares the RSSI value of the selected IM signal with the previous state attenuation control signal PATT3 in step 1151. In this case, if the IM signal is greater than the attenuation control signal PATT3, controller 237 reduces the attenuation control value. 1153. Conversely, if the IM signal 10 is smaller than the attenuation control signal PATT3, then the controller 237 increments the attenuation control value in step 1155. By increasing / decreasing the attenuation control as described above, the controller 237 provides a signal between the IM signal value and the previous state attenuation control signal. subtraction step 1157, thereby generating the above-15 only subtraction-dependent attenuation control signal ATT3. The attenuation control signal ATT3 is fed to the variable suppressor 315 via the DAC 815. The controller 237 then stores the attenuation control signal ATT3 as the previous attenuation control signal PATT3 in step 1159.

Then, in step 1161, controller 237 increments the HG counter. . della and thus check whether the HG counter receives an X value. Thereafter, when the HG counter does not receive an X value, controller 237 returns to step 1071 above, thus repeatedly performing the above steps. By repeating the above steps, the controller 237 detects the RSSI value of the intermodule * · VS 25 thesis signal included in the output of the power amplifier 214, thereby adjusting the phase and level of the pre-distortion signal • '* · comparing it to phase and attenuation control signals PIC and ATT. 'to control the direction and size of the control. The pre-distortion signal is then applied to the power terminal amplifier 214 in countercurrent to the developing mid-modulator thios signal. While adjusting the phase and level of the pre-distortion signal oh, ice 237 at the same time prevents the generation of the intermodulation signal, and if the HG counter becomes X, terminates the pre-distortion signal adjustment function.

Λ: After adjusting the phase and level of the pre-distortion signal, controller 237 performs a distortion of the RF signal included in the output of the signal canceler 219. mennustoiminnon.

In FIG. 10, controller 237 detects distortion of the RF signal at output of signal generator 219 in steps 1211 to 1255 and controls first variable attenuator 211 and first variable phase shifter 212. Signal canceler 219 overrides output and power of the RF power amplifier 214 shown in FIG. only the intermodulation signal advanced in the gain. At this point, controller 237 detects the RSSI value of the RF signal shown in Figure 11B included in the output of signal-5 canceller 219 and alternately controls the level and step of RF signal to smoothly suppress RF signal in signal canceller 219. In an embodiment of the present invention, controller 237 the RSSI value of the signal compares the detected value with the RSSI value of the previous state RF signal and 10 performs a control operation including three steps depending on the difference in the comparison. Assuming the ADC 814 is a 16-bit converter, the first step is set to three steps, the second step is set to 10 steps, and the third step is set to 20 steps. The steps become a quantization step in the AD variant. In this case, at the point where the phase and level are initially controlled, the controller 15 237 controls the phase and level, regardless of the RSSI value expressed as a first step, controls it as a first step in case the comparison difference is less than 10 steps, controls it as a second step in case 20 steps, and control it as a third step in the case of a comparison difference greater than 20 steps. As mentioned above, the level and phase control functions of the pre-distortion signal are performed sequentially X times.

: Controller 237 outputs the switching control signal SWC to select the third signal SF3 in step 1211. Thus, signal selector 235 selects the signal shown in Fig. 11A printed in signal canceler 219, then outputs the selected signal to signal detector 236. Then, controller 7 * * .. detects and analyzes the intermodule-> included in signal suppressor 219. the RSSI, controls the first variable attenuator and the first variable phase shifter 212 and adjusts the level and phase of the RF signal.

; . To accomplish this, controller 237 checks in step 1212 whether the page counter value is set to zero. In this case, the page counter counts the number of RF cancellations included in the signal canceler 219; When the page counter value is set to zero, controller 237 outputs the phase control signal PIC1 as the phase control signal PPIC1 + phase 1 of the previous signal to be stored in step 1215, Λ and converts the phase control signal PIC1 to an analog signal DAC 815 ,; '35 for DAC2 input to the first variable phase shifter 212' · **. Thus, the variable phase shifter 212 adjusts the phase of the RF signal supplied by the phase control signal PIC1 116339 24 and outputs the adjusted phase to the power terminal amplifier 214. Further, in step 1217, the controller 237 stores the phase control signal PIC1 as the previous phase control signal PPIC1. Further, controller 237 outputs the attenuation control signal ATT1 as the attenuation control signal PATTI + in step 1219 of the previous state 1, and converts the attenuation control signal ATT1 into an analog signal for supply to the DAC1 variable attenuator 315. Thus, the first variable attenuator 211, as supplied by the attenuation control signal ATT1, adjusts the level of the RF signal and supplies the adjusted level to the power terminal amplifier 214.

The first phases and levels of the RF signal are controlled as described above by adding one phase to the control signal of the previous state. However, a corresponding control signal may occur when comparing the difference between the present detected control signal and the previous state control signal. After controlling the phase and level of the RF signal, as described above, the controller 237 increments the side pocket in step-1253.

Conversely, after verifying in step 1211 that the page counter is set to zero, controller 237 sequentially outputs control data for marking PCD signals f1 to f2 at the output of signal canceler 219, as shown in FIG. 11B, and receives and stores the RSSI value of corresponding signal f1 to f2. Controller 237 selects the f-signal having the highest RSSI value sig-. . from f1 to f2 in step 1231.

• · · Thereafter, controller 237 compares the RSSI value of the selected f-signal with the previous-state * ···· phase control signal PPIC1 in step 1233. Then, if the f-signal

I · I

is larger than the phase control signal PPIC1, then controller 237 reduces the power • · · *. '·! 25 steps control value in step 1235, and if the f signal is smaller than phase control signal PPIC1, then controller 237 increments the phase control value in step: T: 237. After increasing / decreasing phase control, controller 237 obtains a subtraction between the f signal value and the previous state phase control signal PPIC3. ; step 1239, thereby generating a phase control signal PIC1 according to the above subtraction V 30. The phase control signal PIC1 is supplied first; to the variable phase shifter 212 via DAC 815. Thereafter, the controller 237 stores the phase control signal PIC1 as the previous phase control signal:, as PPIC1 used in the next mode.

v. Further, after generating the phase control signal PIC1 in step 1243 35, the controller 237 compares the RSSI value of the selected f signal with the PATTI value of the previous state attenuation control signal. In this case, if the f signal is greater than 116339 25 than the attenuation control signal PATTI, the controller 237 reduces the attenuation control value PATTI in step 1245, and if the f signal is smaller than the attenuation control signal PATTI, controller 237 increments the attenuation control value OATT1 in step 1247. after decreasing the control of the attenuation 5, the controller 237 obtains a subtraction between the f-signal value and the previous state attenuation control signal PPIC1 in step 1249, thereby generating the attenuation control signal ATT1 according to the above subtraction. The attenuation control signal ATT1 is supplied to the first variable attenuator 211 via DAC 815. Thereafter, in step 1251, controller 237 10 stores the attenuation control signal ATT1 as the previous attenuation control signal PATT1.

Thereafter, after incrementing the page counter in one step 1253, controller 237 checks in step 1253 whether the page counter receives a Y value. When the page counter does not receive a Y value, controller 237 returns to step 1223, thereby repeatedly performing the above steps. While repeating the above steps, controller 237 detects the RSSI value of the RF signal contained in the signal canceller 219, thereby adjusting the phase and level of the RF signal by comparing the RSSI value of the RF signal output in the previous step and determining the control direction and control size. By adjusting the phase and level of the RF signal 20 supplied as described above, the controller 237 prevents the RF signal belonging to the signal from developing,. . and if the value of the page counter becomes Y, terminates the • * · _: RF signal suppression function included in signal canceler 219.

• ·

In FIG. 10, controller 237, in steps 1311 to 1363, detects a centrismo-25 dimming signal IM contained in the last output RF signal from power terminal amplifier 214 and controls a second variable attenuator 220 and a second variable phase shift 221. RF output signal output from the power terminal amplifier 214. a delay unit 215 while processing the intermodulation signal detected on the side path, and the distortion of the intermodulation signal contained in the RF signal last output by coupling the signal; ·· *! 30 to the reverse phase intermodulation distortion treated with a side switch 223 can be suppressed. In this case, the distortion of the intermodulation signal may be included in the last output RF signal, and the intermodulation distortion contained may not be attenuated. Then, the controller 237 detects the RSSI value of the hub modulation signals IM1 to IM4 included in the output of power terminal amplifier 214 and alternately controls the phase and level of the hub modulation signals IM1 to IM4 to output the RF switch 223 to 1 * 116339. in the embodiment of the present invention, when the RSSI value of the intermodulation signals IM1 to IM4 included in the amplified and last output RF signal is detected, it is assumed that the controller 237 compares the detected signal to the value of RSSI, and performs a three-step control operation according to the compared results. Here, it is assumed that the ADC 814 is a 16-bit converter, the first step comprises three steps, the second step a tenth step, and the third step 20 steps. The steps become 10 quantization steps in the AD conversion. Thus, during the control of the original level and phase, the controller 237 increments the phase and attenuation control signal by 1 phase and the RSSI of the IM signal is detected from the second control function to the control function X.teen. Controller 237 controls as a first step in the case of a comparison difference less than ten steps, a second step in a case 15 where the comparison difference is less than 20 steps, and a third step in a case where the comparison difference is more than 20 steps. As mentioned above, the function of controlling the level and phase of the distortion signal is performed sequentially Z times.

As shown in Fig. 10, steps 1311 to 1363 are processed in the same order as the above steps 1111 to 1163 for pre-distortion. . to control the signal level and phase. Namely, the controller 237 controls the signal / line selector 235, selects the fourth signal SF4, controls the signal detector 236, and sequentially selects the intermodulation signals IM1 to IM4. The controller 237 then receives the RSSI values of the intermodulation signals IM1 to IM4 25 detected in signal detector 236 in succession. After selecting the intermodulation signal IM having the largest RSSI of the received intermodulation signals IM1 to IM4, controller 237 compares the RSSI value of the currently detected intermodulation signal IM with the corresponding intermodulation signal IM corresponding to the previous state. Controller 237 controls a second variable phase shifter 221 and a second variable attenuator 220 providing a phase control signal PIC2 and a damping control signal ATT2 corresponding to a comparison difference between the above intermodulation signal distortions. In this case, controller 239 controls one variable: attenuator 220 and second variable phase shift Z times.

V. As shown in Figure 10, the linear power amplifier according to an embodiment of the present invention 35 sets the service channels and adjusts the level and phase of the preamp signal to sequentially attenuate the 116339 27 intermodulation signal included in the power terminal amplifier 214. The above amplifier also adjusts the phase and level of the RF signal supplied to the main path to attenuate the RF signal contained in the signal decompressor 219, and the level and phase of the intermodulation signal output from the signal decompression time 129, allowing the intermodule included in the amplified and last output RF signal. attenuate.

An example according to an embodiment of the present invention can also be achieved by first selecting service channels, secondly controlling the phase and level of the predistortion signal, thirdly controlling the phase and level of the input RF signal 10, and fourthly controlling the phase and level of distortion of the intermodulation signal. However, in another embodiment, the service channel selection function may be performed over time periods of a certain duration by a timer interrupt. In the case where the above control method is used, controller 237 performs a service-15 channel lookup whenever a timer interrupt is generated and controls variable dampers and variable phase shifters at other time periods, as noted above. At this point, when the timer interrupt is developed in a state controlled by an arbitrary variable suppressor and an arbitrary variable phase shifter, the controller 237 interrupts the operation and performs a timer interrupt service routine, thereby returning to the main routine and executing. . ongoing program.

Further, with reference to Fig. 10, the number, i.e., X, Y and Z, controlled by the · · variable attenuators and the variable phase shifters, can be set to *. ·. ** as a number that can effectively control the level and power of the input signal. In a variable attenuator and a variable phase shift corresponding to 25 h, the number is set to the same number as the other numbers, more specifically 5.

Fig. 12 is a block diagram illustrating a structure of a linear power amplifier according to a second embodiment of the present invention. The linear power amplifier according to the second embodiment of the present invention has the same structure as the amplifier according to its first embodiment, as shown in Fig. 1, except that the first variable:. The v attenuator 211 and the first variable phase shifter 212 are disposed on the side path.

With reference to Fig. 12, the pre-distortioner 213 on the main road has the same structure as that shown in Figs. 3 and 5, and produces harmonics corresponding to the input RF signal, controls the level and phase of the harmonics depending on ATT3 of the attenuator 116339. and a phase control signal PIC3, couples the controlled signals to the input RF signal, converts the coupled signals to a distorted RF signal, and outputs the converted signals to the power terminal amplifier 214. The power terminal amplifier 214 receives the output of the preamp 213, a signal in which the distortion of the intermodulation signal is suppressed.

The other structure of the linear power amplifier is similar to that of the first embodiment of the present invention shown in Figure 2, except for the above structure. Thus, the numerical references of the second embodiment of the present invention are the same as those of the first embodiment. Further, the controller 237 selectively supplies the first signal SF1 to the fourth signal in the same manner as in FIG. 10 and generates the attenuation control signals ATT1 to ATT3 and the phase control signals PIC1 to PIC3 to detect the RS signal or intermodulation signal in the selected SF-15 signal. After setting the service channels, controller 237 adjusts the phase and level of the distortion signal to suppress the intermodulation signal associated with the power terminal amplifier 214, adjusts the level of the input confirmed and. . the intermodulation signal included in the last output RF signal

»I I

;,; to reduce distortion.

Fig. 13 is a block diagram showing a structure of a linear power amplifier according to a third embodiment of the present invention. The linear power amplifier • * .. of the third embodiment of the present invention has the same structure as the amplifier of the second embodiment as shown in FIG. 13 except that the first variable attenuator 211 and the second variable phase shifter 212 are disposed. main road and side; ·. between the road.

Referring to FIG. 12, the main path pre-distortioner 213 has the same structure as that shown in FIGS. 3 and 5 and generates harmonics corresponding to the input RF signal \ v, controlling the level and phase of the harmonics depending on ATT3 and phase control signal of controller 237. PIC3, iv. couples the controlled signals to the input RF signal, converts the coupled signals to a pre-distorted signal, and lastly outputs the converted signal to the power terminal amplifier 214. The power terminal amplifier 214 supplies the preconditioner 213 with an output signal, pre-distorted RF signal by amplification.

The first delay unit 217 on the side path receives as an input the RF signal distributed by the power divider 216 on the main path, delays the RF signal 5 while the RF signal is processed in the preamp 213 and the power terminal amplifier 214, and outputs the delayed RF signal 9.

The first variable attenuator 211 and the first variable phase shifter 212 are coupled between a power divider 218 and a signal suppressor 219 which respectively control the level and phase of the RF signal by the input and output level of the attenuation control signal ATT1 and the phase control signal PIC1. In other words, the first variable attenuator 211 and the first variable phase shifter 212 are disposed between a main path and a side path, and the power terminal amplifier 214 controls the phase and level of the amplified and output RF signal in the main path to output them to the signal suppressor 219.

The other structure of the linear power amplifier is similar to that of the first embodiment of the present invention shown in Figure 2, except for the above structure. Thus, the numerical references of the second embodiment of the present invention are the same as those of the first 20 embodiments thereof.

: Further, controller 237 selectively supplies the first signal SF1 - the fourth signal in the same manner as in FIG. 10 and generates attenuation • § control signals ATT1 to ATT3 and phase control signals PIC1 to PIC3 indicating * »'··' RF signal in RSSI or intermodulation signal signal.

· '. * ·: 25 After setting the service channels, controller 237 adjusts the phase and level of the signal distortion signal * *:: * to suppress the main modulation signal associated with the power terminal amplifier 214, adjusts the level and phase of the RF signal supplied to the sidestream. And finally adjusts the distortion level and the phase of the distortion signal output by the signal canceler 219 to reduce the distortion of the intermodulation signal contained in the amplified and last output RF signal.

As with the linear power amplifier according to the first embodiment of the present invention, the linear power amplifiers according to the second and third embodiments of the present invention first select a service channel, secondly, control the phase and level of the pre-distortion signal, thirdly control the output RF. and the phase and level of the signal, and fourth, controlling the phase and level of the intermodulation signal output from the signal canceler 219. Conversely, in another embodiment, the service channel selection function may be performed for a specific period of time with a timer interrupt. Using the above method, controller 237 performs a service channel lookup operation whenever a timer interrupt is generated and controls variable dampers and variable phase shifters at other time periods, as noted above. Here, when a timer interrupt is generated in a state controlled by an arbitrary variable attenuator and a variable phase shifter, controller 237 10 interrupts the operation and performs the timer interrupt service routine, thereby returning to the main routine and performing the current operation.

Further, with reference to FIG. 10, the number, i.e., X, Y and Z, controlled by variable attenuators and variable phase shifters can be set to a number that can effectively control the level and phase of the input signal in the variable attenuator and variable phase shift, respectively. , the number is set to the same number as the other numbers, more specifically 5.

As may be apparent from the foregoing, the linear power amplifier according to an embodiment of the present invention effectively distributes and controls the distortion of the intermodulation signal by the precursor system and the forward-coupling arrangements. In other words, the linear power amplifier is first damped. t. # enable distortion modulation of the power modulation amplifier using the \\\: distortion pre-distortion system and, second, attenuate the power amplifier output inter modulation signal • • * ·· 'system. In this way, it is easy to design and make a power amplifier 214 or a differential amplifier 222. Likewise, because the variable attenuators and: · · · variable phase shifters perform a linear function, they have a wide bandwidth: T: bandwidth on frequency characteristics and they have good variable properties, linear power according to the present invention: f; the amplifier can be used for other purposes.

t f »I

Thus, it should be understood that the present invention is not limited to the specific * 'embodiment described herein as the best mode for carrying out the present invention, and that the present invention is not limited to the specific embodiments set forth herein. it is defined by the following claims.

• ', 35

Claims (15)

116339 31st A linear power amplifier device having a power terminal amplifier (214) for eliminating intermodulation distortion, characterized in that it comprises: switching the RF signal to harmonic; and 10 second switches for suppressing the intermodulation signal by canceling the supplied RF signal and output of the power amplifier, separating the distortion of the intermodulation signal, differentially amplifying the distortion of the intermodulated signal, and connecting the amplified intermodulation signal to the power terminals. Apparatus according to claim 1, characterized in that the preamplifier (213) comprises: a power divider (312) for power distribution of the input RF signal; an automatic level controller (313) for controlling and printing said shared RF signal at a particular level; 20 harmonic oscillator (314) said level controlled RF signal. t. to develop a corresponding harmonic; and a signal switch (317) for coupling said harmonic to the supplied • · * ;;; 'To an RF signal and to generate a distorted RF signal. Device according to claim 1 or 2, characterized in that * t * '. ! The forward switch comprises: a power divider (216) for distributing the input RF signal from the main path to the bypass; a signal canceler (219) for canceling the output of said side path RF signal and said power amplifier and the intermodulation signal. 30 for landscaping; a difference amplifier (222) for amplifying the output signal of the intermodule I 1 f • 'output signal from the signal canceler; and: a signal switch (223) for switching the output of the difference amplifier to the power terminal. output on the main path in question and the last printed RF- *. 35 to suppress the intermodulation signal contained in the signal. 116339 32 A linear power amplification device, characterized in that it comprises: a first variable attenuator (211) and a phase shifter (212) located on said main path for adjusting the level and phase of the input RF signal; a precursor (213) for generating a harmonic corresponding to said RF signal, printed from the first variable attenuator and phase shifter, and thus for generating a precalibrated RF signal coupled to said RF signal; 10 power amplifier amplifiers (214) for amplifying and printing a pre-distorted RF signal; a first delay unit (217) disposed on the side path for delaying the distributed RF signal on said main path; a side path signal canceller (219) for canceling the output of the split power amplifier and the output of the first delay unit on the main path, thereby separating the intermodulation signal included in the amplified RF signal; a second variable attenuator (220) and a phase shifter (221) for adjusting the level and phase of the intermodulation signal output from the signal canceler; A difference amplifier (222) for amplifying the intermodulation signal output from the second variable attenuator and the phase shifter; a second delay unit (215) for delaying the output of the power amplifier; and • a central module of the * »signal switch (223) printed from the difference amplifier». ·. : 25 to switch thiosignal output to another delay unit to attenuate the intermodulation signal contained in the last output RF signal. • »# A device according to claim 4, characterized in that the preamp comprises: a power divider (312) for power distribution of the input RF signal; An automatic level controller (313) for controlling and printing the distributed RF signal at a certain level; • y. a harmonic generator (314) for generating a harmonic corresponding to a level-controlled RF signal; A third variable attenuator (315) and a phase shifter (326):. '· 35 for adjusting the harmonic level and phase output from the harmonics generator; 116339 33 delay units (311) for delaying an input RF signal; and a signal switch (317) for coupling the harmonic output from the third variable attenuator and phase shifter to the output of said delay unit and generating a pre-distorted RF signal. A linear power amplification device, characterized in that it comprises: a preconditioner (213) disposed on the main path for generating a harmonic corresponding to the input RF signal, coupling the generated harmonic to said RF signal, and generating a pre-distorted RF signal; A power amplifier (214) for amplifying and printing said pre-distorted RF signal; a first variable attenuator (211) and a phase shifter (212) disposed on the side path for adjusting the level and phase of the distributed RF signal; A first delay unit (217) for delaying the output RF signal output from the first variable attenuator and phase shifter; a side path signal canceller (219) on the main path to cancel the output of the split power amplifier and the first delay unit, thereby separating the intermodulation signal contained in the amplified RF signal; A second variable attenuator (220) and a phase shifter (221) for adjusting the level and phase of the intermodulated signal output from said signal canceler; a difference amplifier (222) for amplifying the intermodulation signal output from the second variable attenuator and the hub shifter; A second delay unit (215) for delaying the output of said power amplifier; and a signal switch (223) for coupling the intermodulation signal output from the difference amplifier to the output of the second delay unit, thereby attenuating the intermodulation signal contained in the last output RF signal. * * I Device according to claim 6, characterized in that the pre-distortion device comprises: a power divider (312) for power distribution of the input RF signal; : '' ': automatic level controller (313) for controlling the distributed RF signal: Λ (and output at a certain level; 35 harmonics generator (314) for generating a level-controlled RF harmonic; 116339 34 third variable attenuator (315) and phase shifter (326) for adjusting the harmonic level and phase output from the harmonics generator, for delaying the input RF signal of the delay unit (311), and 5 for switching the harmonic output output from the third variable attenuator and phase shifter to output of said delay unit and pre-distorted RF signal. A linear power amplification device, characterized in that it comprises: 10 a precursor (213) disposed on the main path for generating a harmonic corresponding to the input RF signal, coupling the generated harmonic to said RF signal, and generating a pre-distorted RF signal; a power terminal amplifier (214) for amplifying and printing said pre-distorted RF signal; A first delay unit (217) disposed on the side path for delaying the distributed RF signal on the main path; a first variable attenuator (211) and a phase shifter (212) between the side path and the main path to adjust the output level and phase of the power amplifier divided on said main path; A 20 sideways signal suppressor (219) from the first variable. . to cancel the output of the RF signal output from the attenuator and the phase shifter and the output of said delay unit, thereby separating the amplified RF signal; · · * The intermodulation signal contained in the signal; a second modulation attenuator (220) and a phase shifter (221) for the level and magnitude of the intermodulation signal output from said * 25 signal suppressor. adjusting the sweat; a difference amplifier (222) for amplifying the intermodulation signal output from the second variable attenuator and phase shifter; : a second delay unit (215) for disabling the output of said power terminal amplifier, vi · · · '30; and a signal switch (223) for coupling the intermodulation signal output from the • differential amplifier to the output of the second delay unit, thereby attenuating the intermodulation signal contained in the last output RF signal. v. Device according to claim 8, characterized in that the pre-distortioner comprises: a power divider (312) for power distribution of the input RF signal; An automatic level controller (313) for controlling and printing the distributed RF signal at a certain level; a harmonics generator (314) for generating a harmonic corresponding to a level-controlled RF signal; A third variable attenuator (315) and a phase shifter (326) for adjusting the harmonic level and phase output from the harmonic generator; a delay unit (311) for delaying the input RF signal; and a signal switch (317) for coupling the harmonic output from the third variable attenuator and the 10 phase shifter to the output of said delay unit and generating a pre-distorted RF signal. A linear power amplification device, characterized in that it comprises: a first variable attenuator (211) and a 15 phase shifter (212) located on the main path for adjusting the level and phase of the RF signal as input by the first attenuation control signal and the first phase control signal; a preconditioner (213) for generating a harmonic corresponding to the RF signal output from the first variable attenuator and phase shifter to adjust said harmonic level and phase in the third attenuator. . its control signal and the third phase control signal, and thus the • »·: ;; (· For generating a pre-distorted RF signal coupled to the RF signal; '··· * for power amplifier (214) for amplifying and outputting the pre-distorted RF signal;:.' Ί 25 primary path units (217) on the side path: ' '.. for delaying a split RF signal on the path; for canceling the output of the split power amplifier and the first delay unit on the main path of the side path signal canceler (219), thereby separating the intermodulation signal 220 from the amplified RF signal; a phase shifter (221) for supplying an intermodulation signal output from the signal canceler and adjusting the level and phase of said intermodulation signal with the second attenuator control signal and the second phase control signal; v. a differential amplifier (222) from the second variable attenuator; Avg a 116339 36 second delay unit (215) for delaying the output of said power amplifier; a signal switch (223) for coupling the intermodulation signal output from the difference amplifier to the output of said second delay unit, thereby attenuating the intermodulation signal included in the last 5 output RF signals; a signal selector (235) including power splitters dividing the output of the power amplifier, the output of the signal canceler and the output of the last output signal, respectively, for selectively printing the corresponding distributed signal with the switching control signals; A signal detector (236) for supplying a signal selector output, synchronizing the frequencies of the RF signals and intermodulation signals with the control data, and detecting the RSSI of said signal; the controller (237) for generating the switching control signals for sequentially controlling the signal selector, for output output data for synchronizing the intermodulation signals associated with the power terminal amplifier, for controlling the output signal of the third terminal, comparing to output control data to synchronize the RF signals associated with the output of the signal suppressor when selecting the output of that signal suppressor, to compare the RSSI of the RF signals output from the signal detector to the RSSI of the previous state, the first attenuation control signal and the first phase control signal. , to output control data to synchronize the intermodulation signals contained in the RF-: 25 signal last, ·. * when selecting the output RF signal, for comparing the RSSI of the central modulation signals printed from the signal detector with the previous mode intermodulation signal RSSI, and for generating a second attenuation control signal and a second phase control signal in response to the comparison result. •: 30 Device according to claim 10, characterized in that the predistorter (213) comprises:: a power divider (312) for power distribution of the input RF signal; • ·. an automatic level controller (313) for controlling and distributing the distributed RF signal at a particular level; •: 35 harmonics generator (314) for developing a level-controlled RF signal response; 116339 37 a third variable attenuator (315) and a phase shifter for adjusting the harmonic level and phase output from the harmonic generator; a delay unit (326) for delaying the input RF signal; and a signal switch (317) for coupling the harmonic output from the third variable attenuator and the 5 phase shifter to the output of said delay unit and generating a pre-distorted RF signal. Apparatus according to claim 10 or 11, characterized in that the signal detector (236) comprises: a phase locked loop (713) for supplying control data and generating a local frequency corresponding to said input control data; a mixer (715) for mixing the signal output from the signal selector to output the phase locked loop; a filter (716) for performing a frequency conversion of said mixer output; 15 log amplifiers (720, 721) for converting the output of said filter to direct voltage and output the converted voltage as RSSI. A method of eliminating a center power modulation signal of a linear power amplifier device comprising a power amplifier (214), characterized in that it comprises the steps of: 20 (a) generating an RF signal in a power amplifier (214); , first suppressing the intermodulated signal by first generating · a harmonic corresponding to the input RF signal, and biasing the pre-distortion signal to · harmonic; and (b) attenuating the intermodulation signal second by canceling the input RF signal and power output amplifier 21; by separating the distortion of the center j * · .. modulation signal, and differentially amplifying the distortion of the intermodulated signal, and coupling the amplified intermodulation signal to the output of the power amplifier. A method according to claim 13, characterized in that step (a) comprises the steps of: dividing the input RF signal and continuously maintaining the level of said split RF signal; ,,,: generation of a harmonic signal corresponding to said RF signal; ; v, coupling said harmonic signal to the RF signal and predistortion '. and (116339 38) amplifying the advanced intermodulation signal first and outputting said pre-distorted signal. A method according to claim 13 or 14, characterized in that step (b) comprises the steps of: canceling a first attenuated power amplified signal and an input RF signal and separating said intermodulation signal; amplifying the isolated intermodulation signal; and attenuating the intermodulation signal included in the last output RF signal a second time when the amplified intermodulation signal 10 is coupled to the first attenuated power amplified signal. »I» • 1 1 • · · · • f * · · * · I • »·; »» 1 * · 116339 39