KR0178255B1 - Bga 반도체 패키지의 pcb캐리어 프레임 및 그 제조방법 - Google Patents
Bga 반도체 패키지의 pcb캐리어 프레임 및 그 제조방법 Download PDFInfo
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- KR0178255B1 KR0178255B1 KR1019950041846A KR19950041846A KR0178255B1 KR 0178255 B1 KR0178255 B1 KR 0178255B1 KR 1019950041846 A KR1019950041846 A KR 1019950041846A KR 19950041846 A KR19950041846 A KR 19950041846A KR 0178255 B1 KR0178255 B1 KR 0178255B1
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- carrier frame
- pcb
- semiconductor package
- bga semiconductor
- pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
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- H01L2924/01079—Gold [Au]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49121—Beam lead frame or beam lead device
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (13)
- PCB패널에 필요한 회로 및 캐비티(Cavity)를 형성하는 단계와, 상기 회로가 형성된 PCB패널을 낱개의 PCB기판으로 절단하는 단계와, 상기 절단된 PCB기판을 캐리어 프레임에 접착수단을 이용하여 접착하는 단계로 이루어진 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임 제조방법.
- 제1항에 있어서, 상기 PCB패널을 낱개의 PCB기판으로 절단할 때, 낱개의 PCB기판에는 반도체 칩이 장작되는 부분에 하나의 캐비트가 포함되도록 절단하는 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임 제조방법.
- 제1항에 있어서, 상기 PCB기판과 캐리어 프레임의 접착은 고온, 고압의 프레스 또는 열 압착을 이용하여 접착시키는 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임 제조방법.
- 캐리어 프레임에는 다수의 패드가 타이바를 매개체로 연결 형성되어 있고, 상기 각 패드에는 낱개의 PCB기판이 부착되어 있는 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항에 있어서, 상기 캐리어 프레임에 형성되어 있는 각각의 패드 둘레에는 슬롯(Slot)이 형성되어 있는 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항에 있어서, 상기 캐리어 프레임의 길이방향으로 상·하부에 다수개의 구멍이 형성되어 있는 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항에 있어서, 상기 캐리어 프레임의 재질은 열 방출이 뛰어난 구리, 구리합금, 알루미늄 또는 스텐레스 등의 금속재질로 된 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항에 있어서, 상기 캐리어 프레임의 패드 크기는 PCB기판 크기의 ±2mm 이내인 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항 또는 제7항에 있어서, 알루미늄 재질로 이루어진 캐리어 프레임의 패드 상면에는 박막을 입히는 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항 또는 제7항에 있어서, 구리합금 재질로 이루어진 캐리어 프레임의 상면에는 Cu2O, CuO와 같은 산화물(Oxide) 처리한 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항 또는 제7항에 있어서, 상기 캐리어 프레임의 패드 저면에는 니켈 또는 솔더도금을 처리한 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항에 있어서, 상기 캐리어 프레임은 패드가 소정 개수 형성된 스트립(Strip) 형태로 이루어진 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
- 제4항에 있어서, 상기 캐리어 프레임은 패드가 연속적으로 배열된 릴(Reel) 형태로 이루어진 것을 특징으로 하는 BGA 반도체 패키지의 PCB캐리어 프레임.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950041846A KR0178255B1 (ko) | 1995-11-17 | 1995-11-17 | Bga 반도체 패키지의 pcb캐리어 프레임 및 그 제조방법 |
US08/651,200 US5854741A (en) | 1995-11-17 | 1996-05-17 | Unit printed circuit board carrier frame for ball grid array semiconductor packages and method for fabricating ball grid array semiconductor packages using the same |
JP8182799A JP2929273B2 (ja) | 1995-11-17 | 1996-06-24 | ボールグリッドアレイ半導体パッケージ用ユニットpcbキャリヤフレーム及びこれを用いるボールグリッドアレイ半導体パッケージの製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019950041846A KR0178255B1 (ko) | 1995-11-17 | 1995-11-17 | Bga 반도체 패키지의 pcb캐리어 프레임 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970030203A KR970030203A (ko) | 1997-06-26 |
KR0178255B1 true KR0178255B1 (ko) | 1999-03-20 |
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ID=19434435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950041846A KR0178255B1 (ko) | 1995-11-17 | 1995-11-17 | Bga 반도체 패키지의 pcb캐리어 프레임 및 그 제조방법 |
Country Status (3)
Country | Link |
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US (1) | US5854741A (ko) |
JP (1) | JP2929273B2 (ko) |
KR (1) | KR0178255B1 (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20030066996A (ko) * | 2002-02-06 | 2003-08-14 | 주식회사 칩팩코리아 | 향상된 열방출 특성을 갖는 볼 그리드 어레이 패키지 |
KR20180077115A (ko) | 2018-06-25 | 2018-07-06 | 최재규 | 투명 캐리어를 이용한 인쇄회로기판과 반도체 패키지의 제조방법 |
Families Citing this family (40)
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US5859475A (en) * | 1996-04-24 | 1999-01-12 | Amkor Technology, Inc. | Carrier strip and molded flex circuit ball grid array |
KR100214552B1 (ko) * | 1997-01-25 | 1999-08-02 | 구본준 | 캐리어프레임 및 서브스트레이트와 이들을 이용한 볼 그리드 어 레이 패키지의 제조방법 |
US6687980B1 (en) | 1997-03-04 | 2004-02-10 | Tessera, Inc. | Apparatus for processing flexible tape for microelectronic assemblies |
US6049972A (en) | 1997-03-04 | 2000-04-18 | Tessera, Inc. | Universal unit strip/carrier frame assembly and methods |
US6047470A (en) * | 1997-08-20 | 2000-04-11 | Micron Technology, Inc. | Singulation methods |
US6111324A (en) * | 1998-02-05 | 2000-08-29 | Asat, Limited | Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package |
US6574858B1 (en) * | 1998-02-13 | 2003-06-10 | Micron Technology, Inc. | Method of manufacturing a chip package |
US6133634A (en) * | 1998-08-05 | 2000-10-17 | Fairchild Semiconductor Corporation | High performance flip chip package |
US7169643B1 (en) * | 1998-12-28 | 2007-01-30 | Seiko Epson Corporation | Semiconductor device, method of fabricating the same, circuit board, and electronic apparatus |
JP3128548B2 (ja) * | 1999-03-11 | 2001-01-29 | 沖電気工業株式会社 | 半導体装置および半導体装置の製造方法 |
JP3617368B2 (ja) * | 1999-04-02 | 2005-02-02 | 株式会社村田製作所 | マザー基板および子基板ならびにその製造方法 |
JP3575001B2 (ja) | 1999-05-07 | 2004-10-06 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ及びその製造方法 |
JP3398721B2 (ja) | 1999-05-20 | 2003-04-21 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ及びその製造方法 |
USRE40112E1 (en) | 1999-05-20 | 2008-02-26 | Amkor Technology, Inc. | Semiconductor package and method for fabricating the same |
JP3314304B2 (ja) * | 1999-06-07 | 2002-08-12 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ用の回路基板 |
WO2001008219A1 (de) * | 1999-07-23 | 2001-02-01 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG | Halbleitermodul |
KR100374150B1 (ko) * | 1999-11-01 | 2003-03-03 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 운반용 캐리어 |
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1995
- 1995-11-17 KR KR1019950041846A patent/KR0178255B1/ko not_active IP Right Cessation
-
1996
- 1996-05-17 US US08/651,200 patent/US5854741A/en not_active Expired - Lifetime
- 1996-06-24 JP JP8182799A patent/JP2929273B2/ja not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20030066996A (ko) * | 2002-02-06 | 2003-08-14 | 주식회사 칩팩코리아 | 향상된 열방출 특성을 갖는 볼 그리드 어레이 패키지 |
KR20180077115A (ko) | 2018-06-25 | 2018-07-06 | 최재규 | 투명 캐리어를 이용한 인쇄회로기판과 반도체 패키지의 제조방법 |
Also Published As
Publication number | Publication date |
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JP2929273B2 (ja) | 1999-08-03 |
KR970030203A (ko) | 1997-06-26 |
JPH10308467A (ja) | 1998-11-17 |
US5854741A (en) | 1998-12-29 |
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