KR0147489B1 - Voltage Gain Amplifier Converts Single Input to Differential Output - Google Patents

Abstract

The present invention relates to a voltage gain amplifier that adjusts voltage gain by converting an analog single input into a differential output using a combination of an analog switch and a capacitor and a differential output amplifier. Single input charging and discharging means (2) for outputting two signals in differential mode; Differential output operational amplification means (1) receiving the two signals in the differential mode through an inverting input terminal and a non-inverting input terminal, amplifying the signals in opposite phases and outputting the magnitudes to the first output terminal and the second output terminal; First and second input voltage transfer means (3,3 ') connected to each input end and output end of the differential output operational amplifier means (1) to transfer an input voltage by charging and discharging according to an operation of a switch; First and second voltage hold means (4,4 ') connected to both ends of the first and second input voltage transfer means (3,3') to attenuate high frequency noise; Frequency compensating means (5) for receiving two outputs of the differential output operational amplifying means (1) and compensating for stable operation in a given band to output first and second output voltages (V _{out +} , V _out- ); By using a differential output operational amplifier to send a single input voltage to the differential output to produce a differential input signal required by the input of the ADC of the audio codec, a combination of a switch and a capacitor without using a resistor It has the effect of reducing the chip area during integration.

Description

Voltage Gain Amplifier Converts Single Input to Differential Output

1 is a conceptual structural diagram of a conventional voltage gain amplifier for analog signal processing.

2 is a block diagram of a conventional programmable voltage gain amplifier.

3 is a configuration diagram of a voltage gain amplifier for converting a conventional single input into a differential output.

4 is a circuit diagram of a voltage gain amplifier according to an embodiment of the present invention.

5 is a circuit diagram of a voltage gain amplifier according to another embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

1: Differential output operational amplifier 2: Single input charging and discharging unit

3,3 ': input voltage transmitter 4,4': voltage hold

5: frequency compensation unit

The present invention relates to a voltage gain amplifier for controlling voltage gain while converting an analog single input into a differential output using a combination of an analog switch and a capacitor and a differential output amplifier.

In analog-to-digital converters (ADCs), which adopt an oversampling scheme for multimedia audio CODECs (COder / DECoder; CODECs) and communication CODECs. A sigma-delta modulator is used to input the signal, which includes a voltage gain amplifier and a differential input to fully improve the dynamic range and power supply rejection ratio. -differential input is required.

1 is a conceptual structural diagram of a conventional voltage gain amplifier for analog signal processing, FIG. 2 is a configuration diagram of a conventional programmable voltage gain amplifier, and FIG. 3 is a diagram of a voltage gain amplifier converting a conventional single input into a differential output. As a diagram, A is an operational amplifier, Silver resistor, Each represents a switch.

As shown in the figure, the operational amplifier inputs the input voltage V _in to the inverting input terminal (-) of the operational amplifier A through the impedance Z ₁ , and the output voltage V _out is the impedance Z ₂ . Through feedback to the inverting input terminal (-) of the operational amplifier (A) through, the non-inverting input terminal is grounded.

Here, when the two impedances Z ₁ and Z _{2 are} referred to as resistors R ₁ and R ₂ , respectively, and R ₁ R ₂ , the voltage gain is

Becomes That is, the output voltage is amplified by R ₂ / R ₁ by inverting the input voltage. In order to change the voltage gain, the N-bit decoder decodes the N-bit digital signal as shown in FIG. 2 to decode the decoded signal. By properly selecting the switch of the low-voltage gain amplifier, the desired voltage gain can be output to the output.

However, such a voltage gain amplifier cannot be used as a differential input for a sigma-delta modulator, so an inverting amplifier with a gain of -1 is needed as shown in FIG. Thus, this conventional technique has the problem of occupying a large chip area due to the additional inverting amplifier and resistance accumulation.

Disclosure of Invention The present invention has been made to solve the above-mentioned problems of the prior art, and an object thereof is to provide a voltage gain amplifier that generates a differential output from a single input voltage and converts a single input to a differential output with improved integration. .

The present invention for achieving the above object, the differential operational amplification means for receiving the two signals through the first input terminal and the second input terminal and amplified and outputted; First single input charging / reversing means for outputting a first signal charged / discharged to an input voltage to a first input terminal of the differential operational amplifier means; A second single input configured to output a second signal charged / discharged to the input voltage to a second input terminal of the differential operational amplifier, and to charge / discharge the phase of the second signal to be opposite to the phase of the first signal; Charging / discharging means; First input voltage transfer means connected between a first input end of the differential operational amplifier and the first output end to transfer the first signal according to a switching operation; Second input voltage transfer means connected between a second input end of the differential operational amplifier and the second output end to transfer the second signal according to a switching operation; And said frequency compensating means for outputting said amplified first and second signals of said differential operational amplification means operating stably within a given band.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

4 is a circuit diagram of a voltage gain amplifier according to an embodiment of the present invention, Figure 5 is a circuit diagram of a voltage gain amplifier according to another embodiment of the present invention, 1 is a differential output operational amplifier, 2 is a single input charging and discharging unit , 3, 3 'is an input voltage transmission unit, 4, 4' is a voltage holding unit, 5 is a frequency compensation unit.

As shown in the figure, the single input charging and discharging unit 2 includes first and second charging / discharging units for charging and discharging the input voltage V _in of the single input _in different phases according to the operation of the switch. It outputs two signals of the same differential mode with the opposite phases and the same magnitude, and the differential output operational amplifier 1 receives the two signals of the differential mode from the inverting input terminal and the non-inverting input terminal and amplifies the magnitudes in opposite phases. Output to the first output terminal and the second output terminal.

The input voltage transmitters 3 and 3 'are connected to each input terminal and output terminal of the differential output operational amplifier 1 to transfer the input voltage by charging and discharging according to the operation of the switch, and the voltage hold unit 4 4 ') is connected to both ends of each of the input voltage transmitters 3 and 3' to attenuate high frequency noise, and the frequency compensator 5 receives two outputs of the differential output operational amplifier 1, First and second output voltages compensated for stable operation in the band Outputs

In FIG. 4, the first charging / discharging unit of the single input charging and discharging unit 2 includes a switch for switching the input voltage V _in , and a sampling capacitor having one side connected to the switch S ₁₁ . A switch S ₂₁ connected between a seeder C _{S +} , the sampling capacitor C _{S +} , the other side, and an inverting input terminal of the automatic output operational amplifier 1, and one side of the sampling capacitor C _{S +} . And a switch S ₂₂ connected between the ground and the ground, and a switch S ₁₂ connected between the other side of the sampling capacitor C _{S +} and the ground, wherein the second charge / discharge unit includes the input voltage V _in. Switch (S ₁₃ ) for switching), a switch (S ₂₃ ) connected between the switch (S ₁₃ ) and the non-inverting input terminal of the differential output operational amplifier (1), and the two switches (S ₁₃ , S ₂₃ ). and a sampling capacitor (C _S-) which one side is connected between the bottle doedoe connected between the other side and the ground of the sampling capacitor (C _S-) And a switch (S _24, S ₁₄₎ through to.

The input voltage transmitters 3 and 3 'include switches S ₂₅ and S ₂₇ connected to the input terminals of the differential output operational amplifier 1 and capacitors having one side connected to the switches S ₂₅ and S ₂₇ . C _{H +} and C _H- , switches S ₂₆ and S ₂₈ connected between the other side of the capacitors C _{H +} and C _H- and the output terminals of the differential output operational amplifier 1, and the capacitor C _{H +.} , C switch being connected between one side and the ground of _{H-) (S 15, S 17} ) and the capacitor (C _{H +,} switch connected between the other side and the ground of the _{C H-) (S 16, S} 18) the The input voltage transmitter 3 is connected to the inverting input terminal and the first output terminal of the differential output operational amplifier 1, and the input voltage transmission unit 3 'is connected to the non-inverting input terminal of the differential output operational amplifier 1. Is connected to the second output terminal.

One side of the voltage holding part 4 is connected between the inverting input terminal of the differential output operational amplifier 1 and the switch S ₂₅ , and the other side of the voltage holding part 4 is connected to the first output terminal of the differential output operational amplifier 1 and the switch S ₂₆ . Capacitor C _{F +} is connected between the voltage holding section 4 'is connected at one side between the non-inverting input terminal of the differential output operational amplifier 1 and the switch (S ₂₇ ) and the other side is the differential A capacitor C _F− is connected between the second output terminal of the output operational amplifier 1 and the switch S ₂₈ .

The frequency compensator 5 includes a capacitor C _{C +} connected between the first output terminal of the differential output operational amplifier 1 and a ground, and a second output terminal of the differential output operational amplifier 1 and a ground connected to the ground. Capacitor C C _- is provided.

In the present invention configured as described above, the plurality of switches S ₁₁ to S ₁₈ and S ₂₁ to S ₂₈ are transmission gates or NMOS transistors, which are 'on' and 'compact' with each other by a clock applied to the gate. 'is (that is, S ₁₁ ~ S ₁₈ "off" when the S ₂₁ ~ S ₂₈ is' on 'S ₂₁ ~ S ₂₈ is when' is oN "" is, S ₁₁ ~ S _18, the off-off, a clock Frequency fc is the same).

When the switches S ₁₁ to S ₁₄ are 'on' in the single input charging and discharging unit 2, the voltages of the sampling capacitors C _{S +} and C _S- minus the input voltage (V _in ) minus the ground voltage (V _ref ), respectively. Is charged, and the voltages between the capacitors C _{H +} and C _H- of the input voltage transfer parts 3 and 3 'become 0V. When the switches S ₁₁ to S ₁₄ are 'off' and the switches S ₂₁ to S ₂₄ are on, the voltage (V _in -V _ref ) charged to the capacitors C _{S +} and C _S- is the differential output operational amplifier ( It is input to the inverting and non-inverting input terminal of 1).

In this case, the voltages applied to the input terminals are opposite in polarity, and are discharged by the capacitors C _{H +} and C _H− of the input voltage transfer units 3 and 3 'connected to the input terminal and the output terminal of the differential output operational amplifier 1.

Therefore, the ratio of input voltage to output voltage is

The voltage is amplified when C _{S +} C _{H +} (C _{S +} = C _S- , C _{H +} = C _H- ).

The amplified output signal is mixed with a lot of high frequency noise, and the cutoff frequencies are respectively caused by the capacitors C _{F +} and C _F- of the voltage holding part 4,4 '.

Phosphorus characteristic can be obtained to attenuate high frequency noise. On the other hand, the capacitors C _{C +} and C _C- of the frequency compensator 5 allow the differential output operational amplifier 1 to operate stably within a given band.

FIG. 5 is a + 1.5dB interval from '0' to '+22.5' decibels (dB) by turning the switch on and off with a switch control signal where a 4-bit digital signal is decoded by the decoder using FIG. This is a circuit diagram of a voltage gain amplifier that can adjust 16 voltage gains.

As shown in the figure, the single input charging and discharging unit 2 is connected to four first and second charging and discharging units in parallel, respectively, and the input voltage transfer units 3 and 3 are also connected in parallel to each of four stages. .

And the capacitors C1 _H , C2 _H , C3 _H , C4 _H , C1 _S , C2 _S , C3 _S , C4 _{S of} the single input charge and discharge unit 2 and the input voltage transfer unit 3, 3 ′. The values are set in the following relationship.

C1 _H = C2 _H

C3 _H = 2C1 _H

C4 _H = 4C1 _H

C1 _S = C1 _H + C2 _H + C3 _H + C4 _H = 8C1 _H

C2 _S = 0.1885C1 _S

C3 _S = 0.22404, C1 _S

C4 _S = 0.26626C1 _S

At this time, the clock adjusted by decoding the 4-bit digital signal turns each switch 'on' and 'off' as shown in FIG. 4. For example, to obtain a gain of 0 dB, the switches 1S ₁₁ to 1S ₁₄ and 1S ₂₁ to 1S ₂₄ , 1S ₁₅ ~ 1S ₁₈ , 1S ₂₅ ~ 1S ₂₈ , 2S ₁₅ ~ 2S ₁₈ , 2S ₂₅ ~ 2S ₂₈ , 3S ₁₅ ~ 3S ₁₈ , 3S ₂₅ ~ 3S ₂₈ , 4S ₁₅ ~ 4S ₁₈ , 4S ₂₅ ~ 4S ₂₈ Each of these will work. Where 1S ₁₁ ~ 1S ₁₄ , 1S ₁₅ ~ 1S ₁₈ , 2S ₁₅ ~ 2S ₁₈ , 3S ₁₅ ~ 3S ₁₈ , 4S ₁₅ ~ 4S ₁₈ and 1S ₂₁ ~ 1S ₂₄ , 1S ₂₅ ~ 1S ₂₈ , 2S ₂₅ ~ 2S ₂₈ , 3S ₂₅ to 3S ₂₈ and 4S ₂₅ to 4S ₂₈ are operated with clocks of different phases (when generalizing the switch, N means the number of stages connected to NScn, c means clock phase, and n means switch number).

Therefore, the differential output voltage gain is

Becomes If the clock is adjusted in the same manner as described above, a gain as shown in [Table 1] can be obtained.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, according to the present invention, by using a differential output amplifier and using a switch and a capacitor instead of a resistor, by outputting the output voltage to the differential output, it is possible to make a differential input signal required at the input of the ADC of the audio codec, It can be replaced by a combination of switches and capacitors without the use of resistors, resulting in performance improvements that reduce chip area during integration.

Claims (13)

Differential operational amplification means for receiving two signals through a first input terminal and a second input terminal and inverting and outputting the two signals; First single input charging / reversing means for outputting a first signal charged / discharged to an input voltage to a first input terminal of the differential operational amplifier means; A second single signal outputting the second signal charged / discharged to the input voltage to the second input terminal of the differential operational amplifier, and charging / discharging such that the phase of the second signal is opposite to the phase of the first signal; Input charging / discharging means; First input voltage transfer means connected between a first input end of the differential operational amplifier and the first output end to transfer the first signal according to a switching operation; Second input voltage transfer means connected between a second input end of the differential operational amplifier and the second output end to transfer the second signal according to a switching operation; And said frequency compensating means for outputting said amplified first and second signals of said differential operational amplification means stably operating within a given band. . 2. The apparatus of claim 1, wherein one side and the other side are respectively connected to the first input terminal and the first output terminal of the differential operational amplifier, or the second input terminal and the second output terminal of the differential operational amplifier to attenuate high frequency noise. And a first and second voltage hold means for converting the single input into a differential output. 2. The apparatus of claim 1, wherein the first single input charge / discharge means comprises: a first switch for switching the input voltage; A first sampling capacitor having one side connected to the first switch; A second switch connected between the other side of the first sampling capacitor and the first input terminal of the differential operational amplifier means; A third switch connected between one side of the first sampling capacitor and ground; And a fourth switch connected between the other side of the first sampling capacitor and ground, wherein the single gain is converted into a differential output. 4. The apparatus of claim 3, wherein the second single input charge / discharge means comprises: a fifth switch for switching the input voltage; A sixth switch connected to the fifth switch and the second input terminal of the differential operational amplifier; A second sampling capacitor having one side connected between the fifth switch and the sixth switch; And a seventh and eighth switches connected in parallel between the other side of the second sampling capacitor and the ground, respectively, in parallel. 5. The apparatus of claim 4, wherein the first input voltage transmitting means comprises: a ninth switch connected to the first input terminal of the differential operational amplifier means; A third sampling capacitor having one side connected to the ninth switch; A tenth switch connected between the other side of the third capacitor and the first output terminal; And an eleventh and twelfth switches connected between both sides of the third capacitor and the ground, respectively. The clock signal of claim 5, wherein the first, fourth, fifth, eighth, eleventh, and twelfth switches control the second, third, sixth, seventh, ninth, and tenth switches. A voltage gain amplifier for converting a single input into a differential output, characterized in that it is operated by a clock signal of a phase opposite to the phase of. 3. The method of claim 2, wherein the first voltage hold means comprises a fifth capacitor connected between the first input terminal and the first output terminal of the differential operational amplifier. Voltage gain amplifier. 2. The apparatus of claim 1, wherein the frequency compensating means comprises: a seventh capacitor connected between the first output terminal and ground; And an eighth capacitor connected between the second output terminal and ground, the voltage gain amplifier converting a single input into a differential output. The method of claim 1, wherein the first and second single input charging and discharging means and the first and second input voltage charging and discharging means are respectively configured in parallel to be configured to adjust the voltage gain. A voltage gain amplifier that converts a single input to a differential output. The first and second input voltage transfer means of the first stage when the first and second single input charge / discharge means and the first and second input voltage transfer means are connected in parallel in four stages. The capacitor capacitance of is equal to the capacitor capacitance of the first and second input voltage transfer means of the second stage, and the capacitor capacitance of the first and second input voltage transfer means of the third stage is twice the first. Is equal to the capacitor capacitance of the first and second input voltage transfer means of the first stage, and the capacitor capacitance of the first and second input voltage transfer means of the fourth stage is four times the first and the first of the first stage. Is equal to the capacitor capacitance of the second input voltage transfer means, and the capacitor capacitance of the first and second single input charge / discharge means of the first stage is eight times the first and second input of the first stage. Equal to the capacitor capacitance of the pressure transfer means, and the capacitor capacitance of the first and second single input charge / discharge means of the second stage is 0.1885 times the first and second single input charge / charge of the first stage. Equal to the capacitor capacitance of the discharging means, and the capacitor capacitance of the first and second single input charge / discharge means of the third stage is 0.22404 times the first and second single input charge / discharge of the first stage. Equal to the capacitor capacitance of the means, wherein the capacitor capacitance of the first and second single input charge / discharge means of the fourth stage is 0.26626 times the first and second single input charge / discharge means of the first stage A voltage gain amplifier that converts a single input into a differential output, such as a capacitor's capacitance. 5. The apparatus of claim 4, wherein the second input voltage transmitting means comprises: a thirteenth switch connected to the second input terminal of the differential operational amplifier means; A fourth sampling capacitor having one side connected to the thirteenth switch; A fourteenth switch connected between the other side of the fourth capacitor and the second output terminal; And a fifteenth and sixteenth switches connected between both sides of the fourth capacitor and ground, respectively. The clock signal of claim 11, wherein the first, fourth, fifth, eighth, fifteenth, and sixteenth switches control the second, third, sixth, seventh, thirteenth, and fourteenth switches. A voltage gain amplifier for converting a single input into a differential output, characterized in that it is operated by a clock signal of a phase opposite to the phase of. 3. The method of claim 2, wherein the second voltage hold means comprises a sixth capacitor connected between the second input end and the second output end of the differential operational amplifier means. Voltage gain amplifier.