KR0146630B1 - 반도체 소자의 메모리 블록 선택회로 - Google Patents
반도체 소자의 메모리 블록 선택회로Info
- Publication number
- KR0146630B1 KR0146630B1 KR1019940012271A KR19940012271A KR0146630B1 KR 0146630 B1 KR0146630 B1 KR 0146630B1 KR 1019940012271 A KR1019940012271 A KR 1019940012271A KR 19940012271 A KR19940012271 A KR 19940012271A KR 0146630 B1 KR0146630 B1 KR 0146630B1
- Authority
- KR
- South Korea
- Prior art keywords
- block selection
- node
- selection circuit
- memory block
- semiconductor device
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4082—Address Buffers; level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Abstract
Description
Claims (2)
- 반도체 소자의 메모리 블록 선택회로에 있어서, 다수의 메모리 블록으로 이루어진 메모리 소자중 사용가능한 메모리 블록만을 선택시키기 위하여 어드레스 선택신호 및 선택 휴즈를 포함하는 블록선택 회로의 출력에 따라 블록선택 어드레스 신호가 생성되도록 구성되는 것을 특징으로 하는 반도체 소자의 메모리 블록 선택회로.
- 제1항에 있어서, 상기 메모리 블록선택 회로는 전원단자(Vcc) 및 노드(N3)간에 접속되며 노드(N1)의 전압에 따라 구동되는 트랜지스터(Q1)와, 상기 전원단자(Vcc) 및 상기 노드(N1)간에 휴즈(F2)를 통해 접속되며 RAS 신호의 입력에 따라 구동되는 트랜지스터(Q3)와, 상기 RAS 신호를 입력으로 하여 반전된 전압을 출력시키기 위한 반전게이트(G3)와, 상기 반전게이트(G3)의 출력전압 및 전원단자(Vcc)로부터 공급되는 각각의 전압에 따라 상기 노드(N1)의 전위를 결정하기위한 낸드게이트(G1)와, 상기 노드(N3) 및 접지단자(Vss)간에 접속되며 노드(N2)의 전압에 따라 구동되는 트랜지스터(Q2)와, 상기 접지단자(Vss) 및 상기 노드(N2)간에 휴즈(F3)를 통해 접속되며 RAS 신호의 입력에 따라 구동되는 트랜지스터(Q4)와, 상기 RAS 신호 및 접지단자(Vss)로부터 공급되는 전압에 따라 상기 노드(N2)의 전위를 결정하기 위한 노아게이트(G2)와, 상기 노드(N3) 및 블록 선택회로 어드레스 신호 입력단자 간에 접속되는 휴즈(F1)을 포함하여 구성되는 것을 특징으로 하는 반도체 소자의 메모리 블록 선택회로.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940012271A KR0146630B1 (ko) | 1994-06-01 | 1994-06-01 | 반도체 소자의 메모리 블록 선택회로 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940012271A KR0146630B1 (ko) | 1994-06-01 | 1994-06-01 | 반도체 소자의 메모리 블록 선택회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960002810A KR960002810A (ko) | 1996-01-26 |
| KR0146630B1 true KR0146630B1 (ko) | 1998-08-01 |
Family
ID=19384436
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940012271A KR0146630B1 (ko) | 1994-06-01 | 1994-06-01 | 반도체 소자의 메모리 블록 선택회로 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0146630B1 (ko) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100477921B1 (ko) * | 1997-12-30 | 2005-06-10 | 주식회사 하이닉스반도체 | 반도체메모리장치 |
-
1994
- 1994-06-01 KR KR1019940012271A patent/KR0146630B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR960002810A (ko) | 1996-01-26 |
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