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KR0142150B1 - Method for Etching Boron Nitride - Google Patents

Method for Etching Boron Nitride

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KR0142150B1
KR0142150B1 KR1019940004533A KR19940004533A KR0142150B1 KR 0142150 B1 KR0142150 B1 KR 0142150B1 KR 1019940004533 A KR1019940004533 A KR 1019940004533A KR 19940004533 A KR19940004533 A KR 19940004533A KR 0142150 B1 KR0142150 B1 KR 0142150B1
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boron nitride
silicon
etching
doped
doping
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반 뉴옌 손
마크 도부진스키 데이비드
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윌리엄 티. 엘리스
인터내셔널 비지네스 머신즈 코포레이션
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/113Nitrides of boron or aluminum or gallium

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 실리콘, 탄소 또는 게르마늄과 같은 원소 주기율표의 IVA족의 원소로 붕소 질화물층을 도핑하는 단계를 포함하는 붕소 질화물의 에칭 방법을 제공한다. 붕소 질화물층이 도프된 후, 이것은 붕소 질화물을 도핑하기 전에 가능하지 않은 고온 인산, 플루오르화 수소산 또는 완충된 플루오르화 수소산으로 습식 에칭과 같은 기술로 에칭될 수 있다.The present invention provides a method of etching boron nitride comprising doping a boron nitride layer with an element of group IVA of the periodic table of the elements, such as silicon, carbon or germanium. After the boron nitride layer is doped, it may be etched by techniques such as wet etching with hot phosphoric acid, hydrofluoric acid, or buffered hydrofluoric acid, which is not possible before doping the boron nitride.

Description

붕소 질화물을 에칭하기 위한 방법Method for Etching Boron Nitride

본 발명은 붕소 질화물을 에칭하기 위한 방법에 관한 것으로, 특히 붕소 질화물의 에칭률을 증가시키기 위한 방법에 관한 것이다. 이것은 예를 들면, 실리콘, 탄소 또는 게르마늄과 같은 IVA족의 원소로 붕소 질화물을 도프시킴으로써 달성된다.The present invention relates to a method for etching boron nitride, and more particularly to a method for increasing the etching rate of boron nitride. This is accomplished by doping boron nitride with elements of group IVA, for example silicon, carbon or germanium.

반도체 디바이스 제조의 분야에 있어서, 도전층들을 분리시키기 위하여 통상적으로 절연층이 사용된다. 이러한 층간 절연막으로서 플라즈마 증강형 화학 진공 증착법(Plasma-Enhanced Chemical Vapor Deposition:PECVD)을 사용하여 인가된 실리콘 질화물층이 사용되어 왔다. 실리콘 질화물막은 습기 및 알칼리 금속 이온에 대한 높은 차단 효과 뿐만 아니라 우수한 절연 특성을 갖는다. 부가적으로, 실리콘 질화물 절연층은 공형특성(Conformal Step Coverage Characteristics) 및 높은 균열 저항 특성을 나타낸다. 1987년도 일본국 응용 물리학 저널 (Japanese Journal of Applied Physics) 26, 페이지 660-665의 엠. 마에다 (M. Maeda) 및 티. 마키노 (T. Makino)에 의해 기술된 내용을 참조하시오.In the field of semiconductor device manufacturing, an insulating layer is typically used to separate the conductive layers. As such an interlayer insulating film, a silicon nitride layer applied by using plasma-enhanced chemical vapor deposition (PECVD) has been used. The silicon nitride film has excellent insulation properties as well as a high blocking effect on moisture and alkali metal ions. In addition, the silicon nitride insulating layer exhibits conformal step coverage characteristics and high crack resistance characteristics. M. in Japanese Journal of Applied Physics, 1987, pages 660-665. M. Maeda and T. See description by T. Makino.

그러나, 실리콘 질화물 절연층에는 소정의 단점이 있다. 이러한 단점으로는 인 실리케이트 유리 (Phosphorous-Silicate Glass:PSG) 및 실리콘 이산화물 절연층에 비해 유전 상수가 높다는 것인데, 이것은 비교적 큰 기생 캐패시턴스 및 디바이스간의 비교적 긴 전파 지연 시간을 초래한다. 엠. 마에다(M. Maeda) 및 티. 마키노 (T. Makino)에 의해 기술된 상기 논문을 참조하시오.However, silicon nitride insulating layers have certain disadvantages. These drawbacks are higher dielectric constants compared to Phosphorous-Silicate Glass (PSG) and silicon dioxide insulating layers, which result in relatively large parasitic capacitances and relatively long propagation delay times between devices. M. M. Maeda and T. See the above article described by T. Makino.

따라서, 낮은 유전 상수, 공형특성, 우수한 절연 특성 및 높은 균열 저항을 갖는 다른 유전체 또는 절연막 물질에 대한 필요성이 계속 존재하여 왔다. 이러한 필요성에 대응하여, 대기 화학 진공 증착(CVD) 또는 PECVD에 의해 형성된 붕소질화물막이 고안되었다. 이들 붕소 질화물막은 높은 절연성을 띠고, 화학적으로 비활성 물질이며, 열적으로 안정하다. 또한, 이러한 막들은 낮은 유전 상수를 가진다.Thus, there has been a continuing need for other dielectric or insulating materials having low dielectric constants, conformal properties, good insulating properties and high crack resistance. In response to this need, boron nitride films formed by atmospheric chemical vacuum deposition (CVD) or PECVD have been devised. These boron nitride films are highly insulating, chemically inert, and thermally stable. In addition, these films have a low dielectric constant.

그러나, 붕소 질화물막이 유용성을 가지기 위해서는 현재의 반도체 디바이스 제조 공정에 적합해야만 한다. 따라서, 이에 적합한 에칭 기술이 사용되어야만 한다.However, the boron nitride film must be suitable for the current semiconductor device manufacturing process in order to have utility. Therefore, a suitable etching technique must be used.

습식 에칭 공정 (Wet Etching Process)은 반도체 디바이스 제조 공정에서 일반적으로 사용된다. 일반적인 습식 에칭제는 예를 들면, 불화 수소산 (Hydrofluoric Acid:HF), 완충된 불화 수소산 (Buffered Hydrofluoric Acid:BHF), 고온 인산 (Hot Phosphoric Acid)를 포함한다. 이들 에칭제는 붕소 질화물을 에칭할 수 없기 때문에, 현재의 반도체 디바이스 제조 공정은 붕소 질화물 절연층을 사용하기에 적합하지 않다.Wet etching processes are commonly used in semiconductor device manufacturing processes. Common wet etchants include, for example, Hydrofluoric Acid (HF), Buffered Hydrofluoric Acid (BHF), Hot Phosphoric Acid. Since these etchant cannot etch boron nitride, current semiconductor device manufacturing processes are not suitable for using boron nitride insulating layers.

따라서, 붕소 질화물이 반도체 디바이스의 제조에 사용되도록 종래의 에칭제를 사용하여 붕소 질화물을 에칭하는 방법이 필요하다. 붕소 질화물을 에칭할 수 있게 되면 붕소 질화물을 사용하여 그 물질의 양호한 절연층 특성을 이용할 수 있는 장점이 있다.Thus, there is a need for a method of etching boron nitride using conventional etchant such that boron nitride is used in the manufacture of semiconductor devices. Being able to etch boron nitride has the advantage of using the boron nitride to take advantage of the good insulating layer properties of the material.

따라서, 본 발명의 목적은 붕소 질화물의 에칭 방법을 제공하기 위한 것이다. 이 방법은 현재의 반도체 제조 공정에 적합해야만 한다.Accordingly, it is an object of the present invention to provide a method for etching boron nitride. This method must be compatible with current semiconductor manufacturing processes.

간단히 상술한 바와 같이, 본 발명은 붕소 질화물을 에칭하기 위한 방법을 포함한다. 이것은 원소 주기율표의 IVA족에서 선택된 원소로서 붕소 질화물층을 도프시킴으로써 달성된다. IVA족 원소는 실리콘, 탄소, 게르마늄, 주석 및 납을 포함한다. 각각의 이들 원소는 붕소 질화물과 유사한 구조를 갖고, 최종적으로 도프된 붕소 질화물은 동일한 육각형의 결합 구조를 유지하면서 약간 더 비정질로 된다. 붕소 질화물층이 도프된 후, 이것은 예를 들면 고온 인산과 같은 통상의 습식 에칭제를 사용하여 에칭될 수 있다.As briefly described above, the present invention includes a method for etching boron nitride. This is accomplished by doping the boron nitride layer as an element selected from group IVA of the periodic table of elements. Group IVA elements include silicon, carbon, germanium, tin and lead. Each of these elements has a structure similar to boron nitride, and the finally doped boron nitride becomes slightly more amorphous while maintaining the same hexagonal bonding structure. After the boron nitride layer is doped, it can be etched using a conventional wet etchant, for example, high temperature phosphoric acid.

도핑 레벨은 붕소 질화물의 에칭률을 제어하기 위하여 사용될 수 있다. 일반적으로, 약 20 %까지의 작은 양의 도펀트가 붕소 질화물 막의 물성을 손상시키지 않고 사용될 수 있다. 양호하게는 약 2 % 내지 약 10 % 범위의 도펀트가 사용된다.Doping levels can be used to control the etch rate of boron nitride. In general, small amounts of dopants of up to about 20% can be used without compromising the physical properties of the boron nitride film. Preferably dopants in the range of about 2% to about 10% are used.

따라서, 붕소 질화물의 도핑은 종래의 습식 에칭 기술을 사용하여 붕소 질화물을 에칭하기 위한 능력을 향상시킨다. 이것은 붕소 질화물을 반도체 디바이스에서 절연층으로 이용하여, 붕소 질화물의 절연 특성을 이용할 수 있는 장점을 가진다.Thus, the doping of boron nitride improves the ability to etch boron nitride using conventional wet etching techniques. This has the advantage of utilizing the insulating properties of boron nitride by using boron nitride as an insulating layer in a semiconductor device.

상술한 바와 같이, 본 발명의 넓은 개념은 붕소 질화물을 에칭하기 위한 방법에 관한 것이다. 붕소 질화물층은 실리콘, 탄소 또는 게르마늄과 같은 원소 주기율표의 IVA족에서 선택된 원소로 도프된다. 그 다음, 붕소 질화물의 도프된 층은 습식 에칭제 (약 165 ℃의 고온 인산, 불화 수소산 및 완충된 불화 수소산과 같은 질화물 에칭제)와 같은 적합한 에칭제를 사용하여 에칭된다. 일반적으로, 도펀트의 양은 원자 조성비 약 20 %, 양호하게는 원자 조성비 약 2 % 내지 약 10 % 까지의 범위일 수 있다. 도펀트의 낮은 농도는 절연층으로서 붕소 질화물의 특성에 역으로 영향을 미치지 않는다. 도펀트의 양은 붕소 질화물의 에칭률을 제어하기 위하여 변경될 수 있다.As mentioned above, the broad concept of the present invention relates to a method for etching boron nitride. The boron nitride layer is doped with an element selected from group IVA of the periodic table of the elements, such as silicon, carbon or germanium. The doped layer of boron nitride is then etched using a suitable etchant, such as a wet etchant (nitride etchant such as hot phosphoric acid, hydrofluoric acid, and buffered hydrofluoric acid at about 165 ° C.). In general, the amount of dopant may range from about 20% atomic ratio, preferably from about 2% to about 10% atomic ratio. The low concentration of dopant does not adversely affect the properties of boron nitride as an insulating layer. The amount of dopant can be varied to control the etch rate of boron nitride.

한 실시예에 있어서, PECVD 붕소 질화물막은 다음과 같은 조건 하에서 적합한 반응기(reactor)에서 증착되고 도프된다.In one embodiment, the PECVD boron nitride film is deposited and doped in a suitable reactor under the following conditions.

AME 5000 반응기 시스템 (실란 가스 분배 차단기)AME 5000 reactor system (silane gas distribution breaker)

압력 : 4.4 TorrsPressure: 4.4 Torrs

온도 : 400 ℃Temperature: 400 ℃

전극 간격 : 1.0cmElectrode spacing: 1.0cm

전력 밀도 : 2.0 w/㎠Power Density: 2.0 w / ㎠

가스 흐름 속도 : 질소 2,000-20,000 sccmGas Flow Rate: Nitrogen 2,000-20,000 sccm

B2H6(N2의 1%) 1,000 sccmB 2 H 6 (1% of N 2 ) 1,000 sccm

NH30-70 sccmNH 3 0-70 sccm

SiH4(SixBN에 대해) 1-5 sccmSiH 4 (for Si x BN) 1-5 sccm

균일성 (6 시그마) 5-10 %Uniformity (6 Sigma) 5-10%

증착률(nm/min) 100(BN에 대해)Deposition Rate (nm / min) 100 (for BN)

100-140(SixBN에 대해)100-140 (for Si x BN)

굴절률 1.75-1.8(BN 및 SixBN에 대해)Refractive Index 1.75-1.8 (for BN and Si x BN)

상술한 바와 같이, 낮은 농도로 실리콘 도프된 (5 % atomic %) 붕소 질화물막을 형성하기 위하여 작은 양의 실란 (SiH₄)이 추가된다. 붕소 질화물막은 우수한 두께 균일성 및 수증기에 대한 안정성을 갖는다. X선 광전자 분광기(X-ray Photoelectron Spectroscopic: XPS ) 분석은 5 sccm의 흐름으로 증착된 막이 깊이 두께를 통해 균일하게 분포된 5 atomic %보다 작은 실리콘 함유량을 가짐을 보여준다. 1-4 sccm SiH₄로 증착된 막은 막 벌크에서 5 atomic % 보다 작은 실리콘 도핑함량을 가진다. 푸우리에 변환 적외선 (Fourier Transform Infrared : FTIR) 및 투과 전자 현미경 (Transmission Electron Microscopy : TEM) 분석은 저농도 실리콘 도핑으로 증착된 막이 계속 동일한 육각형의 결합 구조를 가질지라도 더 비정질로 되는 것을 나타낸다. 붕소 질화물 (BN) 및 저농도로 실리콘이 도프된 BN (SiBN) 막은 고온 인산 (165℃)으로 에칭되고, 저압 화학 진공 증착 (Low Pressure Chemical Vapor Deposition : LPCVD) 실리콘 질화물막은 기준으로 사용된다.As mentioned above, a small amount of silane (SiH₄) is added to form a silicon doped (5% atomic%) boron nitride film at low concentration. The boron nitride film has excellent thickness uniformity and stability against water vapor. X-ray photoelectron spectroscopic (XPS) analysis shows that the film deposited with a flow of 5 sccm has a silicon content of less than 5 atomic% evenly distributed throughout the depth thickness. Films deposited with 1-4 sccm SiH₄ have a silicon doping content of less than 5 atomic% in the film bulk. Fourier Transform Infrared (FTIR) and Transmission Electron Microscopy (TEM) analysis shows that films deposited with low concentration of silicon doping become more amorphous even though they continue to have the same hexagonal bonding structure. Boron nitride (BN) and low concentration silicon-doped BN (SiBN) films are etched with high temperature phosphoric acid (165 ° C.) and a Low Pressure Chemical Vapor Deposition (LPCVD) silicon nitride film is used as a reference.

표1은 붕소 질화물, 저농도 실리콘 도프된 붕소 질화물 및 고온 인산으로 에칭된 LPCVD 실리콘 질화물막 에칭률 및 에칭 선택성을 나타낸다. 저 레벨 실란도핑 (2-5 sccm SiH₄, 즉 5 atomic % Si 함유량보다 적은)은 3배 이상의 크기로 에칭률을 향상시킴을 알 수 있다. 또한 에칭률은 LPCVD 실리콘 질화물보다 훨씬 더 크므로, 절연층으로서 붕소 질화물을 사용하는 것이 가능해진다.Table 1 shows the etch rates and etch selectivity of LPCVD silicon nitride films etched with boron nitride, low concentration silicon doped boron nitride and high temperature phosphoric acid. It can be seen that low level silane doping (less than 2-5 sccm SiH Si, ie less than 5 atomic% Si content) improves the etch rate by three times or more. In addition, since the etching rate is much larger than that of LPCVD silicon nitride, it becomes possible to use boron nitride as the insulating layer.

저농도 실리콘 도프된 붕소 질화물의 향상된 에칭률은 BN에 비해 적게 도프된 SiXBN의 비정질 특성이 크기 때문이다. 저농도로 도프된 (5 atomic %) 상태에서, 건식 에칭 작용에서의 중요한 변화는 발견되지 않고, 육각형의 결합이 아직 존재하기 때문에 단지 BN 특성의 작은 변화가 발생한다.The improved etch rate of low silicon doped boron nitride is due to the greater amorphous nature of the less doped Si X BN compared to BN. In the lightly doped (5 atomic%) state, no significant change in dry etching action is found, and only a small change in BN properties occurs because hexagonal bonds still exist.

도프된 BN이 동일한 육각형의 결합 구조를 유지하면서 약간 더 비정질로 되기 때문에, 반응 가스 (reactant gas)로서, CH₄ 또는 GeH₄을 사용하여 탄소 또는 게르마늄을 낮은 레벨로 도핑하면 붕소 질화물의 에칭률을 유사하게 향상시킬 수 잇다. 다른 IVA 족 원소를 사용하여도 유사한 결과가 얻어진다.Since the doped BN becomes slightly amorphous while maintaining the same hexagonal bonding structure, when doping carbon or germanium to low levels using CH₄ or GeH₄ as the reactant gas, the etching rate of boron nitride is similarly Can be improved. Similar results are obtained with other Group IVA elements.

본 발명의 다른 실시예에 있어서, 불화 수소산 용액의 붕소 질화물의 에칭률은 표2에 도시한 바와 같이 실리콘 도핑의 증가에 따라 향상된다.In another embodiment of the present invention, the etch rate of the boron nitride in the hydrofluoric acid solution is improved with increasing silicon doping as shown in Table 2.

상술한 바와 같은 SixBN막의 화학 조성은 다음과 같다 (상대적인 atomic %):The chemical composition of the Si x BN film as described above is as follows (relative atomic%):

또한, 본 발명의 원리는 ⅢA족 및 VA족 원소로 구성된 다른 화합물로 확장될 수 있다. 예를 들면, 붕소 인화물은 실리콘과 같은 IVA족 원소로 도프될 때에 붕소 질화물과 유사한 절연 및 에칭 특성을 나타낼 수 잇다.In addition, the principles of the present invention can be extended to other compounds composed of Group IIIA and Group VA elements. For example, boron phosphide may exhibit similar insulating and etching properties as boron nitride when doped with group IVA elements such as silicon.

본 발명은 양호한 실시예에 대해 상세히 설명되었지만, 본 분야에 숙련되 기술자들이라면 본 발명의 범위를 벗어나지 않고서 양호한 실시예를 여러 가지로 변형 및 변경시킬 수 있다. 그러므로, 본 발명은 첨부된 특허 청구의 범위에 의하여만 제한된다.Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art can make various changes and modifications to the preferred embodiments without departing from the scope of the invention. Therefore, the invention is only limited by the appended claims.

Claims (4)

인산 (phosphoric acid)으로 붕소 질화물(boron nitride)을 습식 에칭하는 방법에 있어서, 상기 붕소 질화물에 실리콘, 탄소 및 게르마늄으로 이루어진 원소군으로부터 선택된 원소를 원자 조성비 20% (20% by atomic composition) 까지 도핑시킴으로써 상기 붕소 질화물의 습식 에칭률을 향상시키는 방법.A method of wet etching boron nitride with phosphoric acid, wherein the boron nitride is doped with an element selected from the group consisting of silicon, carbon and germanium to an atomic composition ratio of 20% (20% by atomic composition). Thereby improving the wet etching rate of the boron nitride. 붕소 질화물을 습식 에칭시키는 방법에 있어서, (a) 상기 붕소 질화물에 탄소, 실리콘 및 게르마늄으로 이루어진 원소군으로부터 선택된 원소를 원자 조성비 20% 까지 도핑시키는 단계, 및 (b) 상기 붕소 질화물을 인산에 노출시키는 단계를 포함하는 방법.A method of wet etching boron nitride, comprising the steps of: (a) doping the boron nitride with an element selected from the group consisting of carbon, silicon and germanium to an atomic composition ratio of 20%, and (b) exposing the boron nitride to phosphoric acid Making a step; 제1항에 있어서, 상기 인산이 약 165℃의 온도인 방법.The method of claim 1 wherein said phosphoric acid is at a temperature of about 165 ° C. 3. 제1항에 있어서, 상기 붕소 질화물에 상기 원소를 원자 조성비 2% 내지 10%로 도핑하는방법.The method of claim 1, wherein the boron nitride is doped with the element at an atomic composition ratio of 2% to 10%.
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Families Citing this family (166)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6090300A (en) * 1998-05-26 2000-07-18 Xerox Corporation Ion-implantation assisted wet chemical etching of III-V nitrides and alloys
US6891236B1 (en) 1999-01-14 2005-05-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
JPWO2002069382A1 (en) * 2001-02-28 2004-07-02 杉野 隆 Solid device and method of manufacturing the same
US7034307B2 (en) * 2003-09-25 2006-04-25 General Electric Company Neutron detector employing doped pyrolytic boron nitride and method of making thereof
CN101048531A (en) * 2004-07-07 2007-10-03 通用电气公司 Protective coating on a substrate and method of making thereof
KR100568257B1 (en) * 2004-07-29 2006-04-07 삼성전자주식회사 Manufacturing method of dual damascene wiring
US8084105B2 (en) * 2007-05-23 2011-12-27 Applied Materials, Inc. Method of depositing boron nitride and boron nitride-derived materials
US8337950B2 (en) * 2007-06-19 2012-12-25 Applied Materials, Inc. Method for depositing boron-rich films for lithographic mask applications
US20090093100A1 (en) * 2007-10-09 2009-04-09 Li-Qun Xia Method for forming an air gap in multilevel interconnect structure
US8148269B2 (en) * 2008-04-04 2012-04-03 Applied Materials, Inc. Boron nitride and boron-nitride derived materials deposition method
US7910491B2 (en) * 2008-10-16 2011-03-22 Applied Materials, Inc. Gapfill improvement with low etch rate dielectric liners
US8563090B2 (en) * 2008-10-16 2013-10-22 Applied Materials, Inc. Boron film interface engineering
US9324576B2 (en) 2010-05-27 2016-04-26 Applied Materials, Inc. Selective etch for silicon films
US8741778B2 (en) 2010-12-14 2014-06-03 Applied Materials, Inc. Uniform dry etch in two stages
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US8771539B2 (en) 2011-02-22 2014-07-08 Applied Materials, Inc. Remotely-excited fluorine and water vapor etch
US8999856B2 (en) 2011-03-14 2015-04-07 Applied Materials, Inc. Methods for etch of sin films
US9064815B2 (en) 2011-03-14 2015-06-23 Applied Materials, Inc. Methods for etch of metal and metal-oxide films
US8771536B2 (en) 2011-08-01 2014-07-08 Applied Materials, Inc. Dry-etch for silicon-and-carbon-containing films
US8679982B2 (en) 2011-08-26 2014-03-25 Applied Materials, Inc. Selective suppression of dry-etch rate of materials containing both silicon and oxygen
US8679983B2 (en) 2011-09-01 2014-03-25 Applied Materials, Inc. Selective suppression of dry-etch rate of materials containing both silicon and nitrogen
US8927390B2 (en) 2011-09-26 2015-01-06 Applied Materials, Inc. Intrench profile
US8808563B2 (en) 2011-10-07 2014-08-19 Applied Materials, Inc. Selective etch of silicon by way of metastable hydrogen termination
WO2013070436A1 (en) 2011-11-08 2013-05-16 Applied Materials, Inc. Methods of reducing substrate dislocation during gapfill processing
US9267739B2 (en) 2012-07-18 2016-02-23 Applied Materials, Inc. Pedestal with multi-zone temperature control and multiple purge capabilities
US9373517B2 (en) 2012-08-02 2016-06-21 Applied Materials, Inc. Semiconductor processing with DC assisted RF power for improved control
US9034770B2 (en) 2012-09-17 2015-05-19 Applied Materials, Inc. Differential silicon oxide etch
US9023734B2 (en) 2012-09-18 2015-05-05 Applied Materials, Inc. Radical-component oxide etch
US9390937B2 (en) 2012-09-20 2016-07-12 Applied Materials, Inc. Silicon-carbon-nitride selective etch
US9132436B2 (en) 2012-09-21 2015-09-15 Applied Materials, Inc. Chemical control features in wafer process equipment
US8765574B2 (en) 2012-11-09 2014-07-01 Applied Materials, Inc. Dry etch process
US8969212B2 (en) 2012-11-20 2015-03-03 Applied Materials, Inc. Dry-etch selectivity
US8980763B2 (en) 2012-11-30 2015-03-17 Applied Materials, Inc. Dry-etch for selective tungsten removal
US9064816B2 (en) 2012-11-30 2015-06-23 Applied Materials, Inc. Dry-etch for selective oxidation removal
US9111877B2 (en) 2012-12-18 2015-08-18 Applied Materials, Inc. Non-local plasma oxide etch
US8921234B2 (en) 2012-12-21 2014-12-30 Applied Materials, Inc. Selective titanium nitride etching
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US10256079B2 (en) 2013-02-08 2019-04-09 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US9362130B2 (en) 2013-03-01 2016-06-07 Applied Materials, Inc. Enhanced etching processes using remote plasma sources
US9040422B2 (en) 2013-03-05 2015-05-26 Applied Materials, Inc. Selective titanium nitride removal
US8801952B1 (en) 2013-03-07 2014-08-12 Applied Materials, Inc. Conformal oxide dry etch
US10170282B2 (en) 2013-03-08 2019-01-01 Applied Materials, Inc. Insulated semiconductor faceplate designs
US20140271097A1 (en) 2013-03-15 2014-09-18 Applied Materials, Inc. Processing systems and methods for halide scavenging
US8895449B1 (en) 2013-05-16 2014-11-25 Applied Materials, Inc. Delicate dry clean
US9114438B2 (en) 2013-05-21 2015-08-25 Applied Materials, Inc. Copper residue chamber clean
US9493879B2 (en) 2013-07-12 2016-11-15 Applied Materials, Inc. Selective sputtering for pattern transfer
US9224657B2 (en) 2013-08-06 2015-12-29 Texas Instruments Incorporated Hard mask for source/drain epitaxy control
US9773648B2 (en) 2013-08-30 2017-09-26 Applied Materials, Inc. Dual discharge modes operation for remote plasma
US8956980B1 (en) 2013-09-16 2015-02-17 Applied Materials, Inc. Selective etch of silicon nitride
US8951429B1 (en) 2013-10-29 2015-02-10 Applied Materials, Inc. Tungsten oxide processing
US9576809B2 (en) 2013-11-04 2017-02-21 Applied Materials, Inc. Etch suppression with germanium
US9236265B2 (en) 2013-11-04 2016-01-12 Applied Materials, Inc. Silicon germanium processing
US9520303B2 (en) 2013-11-12 2016-12-13 Applied Materials, Inc. Aluminum selective etch
US9245762B2 (en) 2013-12-02 2016-01-26 Applied Materials, Inc. Procedure for etch rate consistency
US9117855B2 (en) 2013-12-04 2015-08-25 Applied Materials, Inc. Polarity control for remote plasma
US9287095B2 (en) 2013-12-17 2016-03-15 Applied Materials, Inc. Semiconductor system assemblies and methods of operation
US9263278B2 (en) 2013-12-17 2016-02-16 Applied Materials, Inc. Dopant etch selectivity control
US9190293B2 (en) 2013-12-18 2015-11-17 Applied Materials, Inc. Even tungsten etch for high aspect ratio trenches
US9287134B2 (en) 2014-01-17 2016-03-15 Applied Materials, Inc. Titanium oxide etch
US9396989B2 (en) 2014-01-27 2016-07-19 Applied Materials, Inc. Air gaps between copper lines
US9293568B2 (en) 2014-01-27 2016-03-22 Applied Materials, Inc. Method of fin patterning
US9385028B2 (en) 2014-02-03 2016-07-05 Applied Materials, Inc. Air gap process
US9499898B2 (en) 2014-03-03 2016-11-22 Applied Materials, Inc. Layered thin film heater and method of fabrication
US9299575B2 (en) 2014-03-17 2016-03-29 Applied Materials, Inc. Gas-phase tungsten etch
US9299537B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9299538B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9136273B1 (en) 2014-03-21 2015-09-15 Applied Materials, Inc. Flash gate air gap
US9903020B2 (en) 2014-03-31 2018-02-27 Applied Materials, Inc. Generation of compact alumina passivation layers on aluminum plasma equipment components
US9269590B2 (en) 2014-04-07 2016-02-23 Applied Materials, Inc. Spacer formation
US9309598B2 (en) 2014-05-28 2016-04-12 Applied Materials, Inc. Oxide and metal removal
US9847289B2 (en) 2014-05-30 2017-12-19 Applied Materials, Inc. Protective via cap for improved interconnect performance
US9378969B2 (en) 2014-06-19 2016-06-28 Applied Materials, Inc. Low temperature gas-phase carbon removal
US9406523B2 (en) 2014-06-19 2016-08-02 Applied Materials, Inc. Highly selective doped oxide removal method
US9425058B2 (en) 2014-07-24 2016-08-23 Applied Materials, Inc. Simplified litho-etch-litho-etch process
US9496167B2 (en) 2014-07-31 2016-11-15 Applied Materials, Inc. Integrated bit-line airgap formation and gate stack post clean
US9159606B1 (en) 2014-07-31 2015-10-13 Applied Materials, Inc. Metal air gap
US9378978B2 (en) 2014-07-31 2016-06-28 Applied Materials, Inc. Integrated oxide recess and floating gate fin trimming
US9165786B1 (en) 2014-08-05 2015-10-20 Applied Materials, Inc. Integrated oxide and nitride recess for better channel contact in 3D architectures
US9659753B2 (en) 2014-08-07 2017-05-23 Applied Materials, Inc. Grooved insulator to reduce leakage current
US9553102B2 (en) 2014-08-19 2017-01-24 Applied Materials, Inc. Tungsten separation
US9355856B2 (en) 2014-09-12 2016-05-31 Applied Materials, Inc. V trench dry etch
US9355862B2 (en) 2014-09-24 2016-05-31 Applied Materials, Inc. Fluorine-based hardmask removal
US9368364B2 (en) 2014-09-24 2016-06-14 Applied Materials, Inc. Silicon etch process with tunable selectivity to SiO2 and other materials
US9613822B2 (en) 2014-09-25 2017-04-04 Applied Materials, Inc. Oxide etch selectivity enhancement
US9355922B2 (en) 2014-10-14 2016-05-31 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US9966240B2 (en) 2014-10-14 2018-05-08 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US11637002B2 (en) 2014-11-26 2023-04-25 Applied Materials, Inc. Methods and systems to enhance process uniformity
US9299583B1 (en) 2014-12-05 2016-03-29 Applied Materials, Inc. Aluminum oxide selective etch
US10573496B2 (en) 2014-12-09 2020-02-25 Applied Materials, Inc. Direct outlet toroidal plasma source
US10224210B2 (en) 2014-12-09 2019-03-05 Applied Materials, Inc. Plasma processing system with direct outlet toroidal plasma source
US9502258B2 (en) 2014-12-23 2016-11-22 Applied Materials, Inc. Anisotropic gap etch
US9343272B1 (en) 2015-01-08 2016-05-17 Applied Materials, Inc. Self-aligned process
US11257693B2 (en) 2015-01-09 2022-02-22 Applied Materials, Inc. Methods and systems to improve pedestal temperature control
US9373522B1 (en) 2015-01-22 2016-06-21 Applied Mateials, Inc. Titanium nitride removal
US9449846B2 (en) 2015-01-28 2016-09-20 Applied Materials, Inc. Vertical gate separation
US9728437B2 (en) 2015-02-03 2017-08-08 Applied Materials, Inc. High temperature chuck for plasma processing systems
US20160225652A1 (en) 2015-02-03 2016-08-04 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US9881805B2 (en) 2015-03-02 2018-01-30 Applied Materials, Inc. Silicon selective removal
US9741593B2 (en) 2015-08-06 2017-08-22 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US9691645B2 (en) 2015-08-06 2017-06-27 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US9349605B1 (en) 2015-08-07 2016-05-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US10504700B2 (en) 2015-08-27 2019-12-10 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10522371B2 (en) 2016-05-19 2019-12-31 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US9865484B1 (en) 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US10629473B2 (en) 2016-09-09 2020-04-21 Applied Materials, Inc. Footing removal for nitride spacer
US10062575B2 (en) 2016-09-09 2018-08-28 Applied Materials, Inc. Poly directional etch by oxidation
US9721789B1 (en) 2016-10-04 2017-08-01 Applied Materials, Inc. Saving ion-damaged spacers
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10062585B2 (en) 2016-10-04 2018-08-28 Applied Materials, Inc. Oxygen compatible plasma source
US9934942B1 (en) 2016-10-04 2018-04-03 Applied Materials, Inc. Chamber with flow-through source
US10062579B2 (en) 2016-10-07 2018-08-28 Applied Materials, Inc. Selective SiN lateral recess
US9947549B1 (en) 2016-10-10 2018-04-17 Applied Materials, Inc. Cobalt-containing material removal
US9768034B1 (en) 2016-11-11 2017-09-19 Applied Materials, Inc. Removal methods for high aspect ratio structures
US10163696B2 (en) 2016-11-11 2018-12-25 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US10242908B2 (en) 2016-11-14 2019-03-26 Applied Materials, Inc. Airgap formation with damage-free copper
US10026621B2 (en) 2016-11-14 2018-07-17 Applied Materials, Inc. SiN spacer profile patterning
US10566206B2 (en) 2016-12-27 2020-02-18 Applied Materials, Inc. Systems and methods for anisotropic material breakthrough
US10431429B2 (en) 2017-02-03 2019-10-01 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10403507B2 (en) 2017-02-03 2019-09-03 Applied Materials, Inc. Shaped etch profile with oxidation
US10043684B1 (en) 2017-02-06 2018-08-07 Applied Materials, Inc. Self-limiting atomic thermal etching systems and methods
US10319739B2 (en) 2017-02-08 2019-06-11 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US10319649B2 (en) 2017-04-11 2019-06-11 Applied Materials, Inc. Optical emission spectroscopy (OES) for remote plasma monitoring
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
JP7176860B6 (en) 2017-05-17 2022-12-16 アプライド マテリアルズ インコーポレイテッド Semiconductor processing chamber to improve precursor flow
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US10049891B1 (en) 2017-05-31 2018-08-14 Applied Materials, Inc. Selective in situ cobalt residue removal
US10497579B2 (en) 2017-05-31 2019-12-03 Applied Materials, Inc. Water-free etching methods
US10920320B2 (en) 2017-06-16 2021-02-16 Applied Materials, Inc. Plasma health determination in semiconductor substrate processing reactors
US10541246B2 (en) 2017-06-26 2020-01-21 Applied Materials, Inc. 3D flash memory cells which discourage cross-cell electrical tunneling
US10727080B2 (en) 2017-07-07 2020-07-28 Applied Materials, Inc. Tantalum-containing material removal
US10541184B2 (en) 2017-07-11 2020-01-21 Applied Materials, Inc. Optical emission spectroscopic techniques for monitoring etching
US10354889B2 (en) 2017-07-17 2019-07-16 Applied Materials, Inc. Non-halogen etching of silicon-containing materials
US10170336B1 (en) 2017-08-04 2019-01-01 Applied Materials, Inc. Methods for anisotropic control of selective silicon removal
US10043674B1 (en) 2017-08-04 2018-08-07 Applied Materials, Inc. Germanium etching systems and methods
US10297458B2 (en) 2017-08-07 2019-05-21 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US10128086B1 (en) 2017-10-24 2018-11-13 Applied Materials, Inc. Silicon pretreatment for nitride removal
US10283324B1 (en) 2017-10-24 2019-05-07 Applied Materials, Inc. Oxygen treatment for nitride etching
US10256112B1 (en) 2017-12-08 2019-04-09 Applied Materials, Inc. Selective tungsten removal
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
KR102037589B1 (en) * 2018-01-17 2019-11-26 포항공과대학교 산학협력단 Semiconductor Structure for improvement of surface roughness and methods for production thereof
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US10679870B2 (en) 2018-02-15 2020-06-09 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
TWI766433B (en) 2018-02-28 2022-06-01 美商應用材料股份有限公司 Systems and methods to form airgaps
US10593560B2 (en) 2018-03-01 2020-03-17 Applied Materials, Inc. Magnetic induction plasma source for semiconductor processes and equipment
US10319600B1 (en) 2018-03-12 2019-06-11 Applied Materials, Inc. Thermal silicon etch
US10497573B2 (en) 2018-03-13 2019-12-03 Applied Materials, Inc. Selective atomic layer etching of semiconductor materials
US10573527B2 (en) 2018-04-06 2020-02-25 Applied Materials, Inc. Gas-phase selective etching systems and methods
US10490406B2 (en) 2018-04-10 2019-11-26 Appled Materials, Inc. Systems and methods for material breakthrough
US10699879B2 (en) 2018-04-17 2020-06-30 Applied Materials, Inc. Two piece electrode assembly with gap for plasma control
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US10755941B2 (en) 2018-07-06 2020-08-25 Applied Materials, Inc. Self-limiting selective etching systems and methods
US10872778B2 (en) 2018-07-06 2020-12-22 Applied Materials, Inc. Systems and methods utilizing solid-phase etchants
US10672642B2 (en) 2018-07-24 2020-06-02 Applied Materials, Inc. Systems and methods for pedestal configuration
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7015375A (en) * 1970-10-21 1972-04-25
US4057895A (en) * 1976-09-20 1977-11-15 General Electric Company Method of forming sloped members of N-type polycrystalline silicon
GB1588669A (en) * 1978-05-30 1981-04-29 Standard Telephones Cables Ltd Silicon transducer
NL8301262A (en) * 1983-04-11 1984-11-01 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE APPLYING PATTERNS IN A LOW SILICON NITRIDE USING AN ION IMPLANTATION
US4952446A (en) * 1986-02-10 1990-08-28 Cornell Research Foundation, Inc. Ultra-thin semiconductor membranes
US4875967A (en) * 1987-05-01 1989-10-24 National Institute For Research In Inorganic Materials Method for growing a single crystal of cubic boron nitride semiconductor and method for forming a p-n junction thereof, and light emitting element
JPH02192494A (en) * 1989-01-20 1990-07-30 Sumitomo Electric Ind Ltd composite material
US5227318A (en) * 1989-12-06 1993-07-13 General Motors Corporation Method of making a cubic boron nitride bipolar transistor
US5217567A (en) * 1992-02-27 1993-06-08 International Business Machines Corporation Selective etching process for boron nitride films

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