JPS648732U - - Google Patents
Info
- Publication number
- JPS648732U JPS648732U JP10116787U JP10116787U JPS648732U JP S648732 U JPS648732 U JP S648732U JP 10116787 U JP10116787 U JP 10116787U JP 10116787 U JP10116787 U JP 10116787U JP S648732 U JPS648732 U JP S648732U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- fixed
- ceramic substrate
- lead
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Wire Bonding (AREA)
Description
第1図及び第2図は本考案半導体装置の一つの
実施例を示すもので、第1図は分解斜視図、第2
図は断面図、第3図及び第4図は半導体装置の従
来例を示すもので、第3図は分解斜視図、第4図
は断面図である。
符号の説明、1……セラミツク基板、2s,2
g,2d……リード、3……半導体素子、6……
セラミツクキヤツプ。
1 and 2 show one embodiment of the semiconductor device of the present invention, FIG. 1 is an exploded perspective view, and FIG.
The figure is a sectional view, and FIGS. 3 and 4 show conventional examples of semiconductor devices. FIG. 3 is an exploded perspective view, and FIG. 4 is a sectional view. Explanation of symbols, 1... Ceramic substrate, 2s, 2
g, 2d...Lead, 3...Semiconductor element, 6...
Ceramic cap.
Claims (1)
体素子の電極に電気的に接続されたリードがセラ
ミツク基板表面上に固定され、 上記セラミツク基板表面上に上記半導体素子を
外部から遮ぎるセラミツクキヤツプが固定されて
なる ことを特徴とする半導体装置。[Claims for Utility Model Registration] A lead to which a semiconductor element is bonded and a lead electrically connected to an electrode of the semiconductor element are fixed on the surface of a ceramic substrate, and the semiconductor element is shielded from the outside on the surface of the ceramic substrate. A semiconductor device characterized by a fixed ceramic cap.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10116787U JPS648732U (en) | 1987-07-01 | 1987-07-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10116787U JPS648732U (en) | 1987-07-01 | 1987-07-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS648732U true JPS648732U (en) | 1989-01-18 |
Family
ID=31329916
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10116787U Pending JPS648732U (en) | 1987-07-01 | 1987-07-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS648732U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7638193B1 (en) | 2006-10-10 | 2009-12-29 | E. I. Du Pont De Nemours And Company | Cut-resistant yarns and method of manufacture |
US7811673B2 (en) | 2003-12-12 | 2010-10-12 | Toyo Boseki Kabushiki Kaisha | High strength polyethylene fiber |
-
1987
- 1987-07-01 JP JP10116787U patent/JPS648732U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7811673B2 (en) | 2003-12-12 | 2010-10-12 | Toyo Boseki Kabushiki Kaisha | High strength polyethylene fiber |
US7638193B1 (en) | 2006-10-10 | 2009-12-29 | E. I. Du Pont De Nemours And Company | Cut-resistant yarns and method of manufacture |