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JPS6482147A - Memory access control system - Google Patents

Memory access control system

Info

Publication number
JPS6482147A
JPS6482147A JP62239823A JP23982387A JPS6482147A JP S6482147 A JPS6482147 A JP S6482147A JP 62239823 A JP62239823 A JP 62239823A JP 23982387 A JP23982387 A JP 23982387A JP S6482147 A JPS6482147 A JP S6482147A
Authority
JP
Japan
Prior art keywords
rom
address
ram
input
program stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62239823A
Other languages
Japanese (ja)
Inventor
Nobutaka Nishigaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62239823A priority Critical patent/JPS6482147A/en
Priority to KR1019880012443A priority patent/KR920002829B1/en
Publication of JPS6482147A publication Critical patent/JPS6482147A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Stored Programmes (AREA)
  • Storage Device Security (AREA)

Abstract

PURPOSE:To realize the high-speed working of an input/output control routine by copying an input/output control program stored in a ROM to a RAM and setting the address of the copied RAM so that it is equivalent to the address of the ROM. CONSTITUTION:A CPU 11 copies a program stored in a ROM 13 to a RAM 12 based on another program stored in the ROM 13. Here the control is carried out so that the address of the copied RAM 12 is equal to the address of the original ROM 13. For this purpose, an address control register 14 is used. The information is set at the register 14 to control the decoding of the address of the ROM 13. Then the selection signals are supplied to the ROM 13 and the RAM 12 via an address decoding circuit. As a result, the CPU 11 can obtain the input/output control program stored in the ROM 13 via the RAM 12. Then the working speed of an input/output control routine is increased.
JP62239823A 1987-09-24 1987-09-24 Memory access control system Pending JPS6482147A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62239823A JPS6482147A (en) 1987-09-24 1987-09-24 Memory access control system
KR1019880012443A KR920002829B1 (en) 1987-09-24 1988-09-24 Memory access control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62239823A JPS6482147A (en) 1987-09-24 1987-09-24 Memory access control system

Publications (1)

Publication Number Publication Date
JPS6482147A true JPS6482147A (en) 1989-03-28

Family

ID=17050381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62239823A Pending JPS6482147A (en) 1987-09-24 1987-09-24 Memory access control system

Country Status (2)

Country Link
JP (1) JPS6482147A (en)
KR (1) KR920002829B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0392949A (en) * 1989-09-06 1991-04-18 Fuji Electric Co Ltd Switching system for memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0392949A (en) * 1989-09-06 1991-04-18 Fuji Electric Co Ltd Switching system for memory

Also Published As

Publication number Publication date
KR920002829B1 (en) 1992-04-04
KR890005613A (en) 1989-05-16

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