JPS6454560A - Condition code returning system - Google Patents
Condition code returning systemInfo
- Publication number
- JPS6454560A JPS6454560A JP21008087A JP21008087A JPS6454560A JP S6454560 A JPS6454560 A JP S6454560A JP 21008087 A JP21008087 A JP 21008087A JP 21008087 A JP21008087 A JP 21008087A JP S6454560 A JPS6454560 A JP S6454560A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- condition code
- input
- state
- executes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002457 bidirectional effect Effects 0.000 abstract 1
- 238000012544 monitoring process Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To shorten the condition code waiting time, and also, to eliminate the need of the interruption processing, by providing a means for monitoring a busy state, an inoperable state and a loading state of each I/O and reporting them to an instruction executing part, on an input/output control part. CONSTITUTION:An input/output control part 12 is provided with a busy checking circuit 7, an inoperable checking circuit 8, an unloaded checking circuit 9, a condition code generating circuit 10 and a condition code returning circuit 11, etc. The circuit 7 executes a busy check of an I/O to be started by an input/ output start instruction, the circuit 8 executes an inoperable state check of the I/O, and the circuit 9 executes an unloaded check of the I/O. Subsequently, based on a result of these checks, a condition code is generated by the circuit 10, and the generated condition code is returned and reported to an instruction executing part 13 through a bidirectional bus 14 by the circuit 11. In such a way, it becomes unnecessary to inquire of each I/O about the state of the I/O in order to generate the condition code, the condition code waiting time of the input/output start instruction can be shortened, and also, the interruption processing can be eliminated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21008087A JPS6454560A (en) | 1987-08-26 | 1987-08-26 | Condition code returning system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21008087A JPS6454560A (en) | 1987-08-26 | 1987-08-26 | Condition code returning system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6454560A true JPS6454560A (en) | 1989-03-02 |
Family
ID=16583487
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21008087A Pending JPS6454560A (en) | 1987-08-26 | 1987-08-26 | Condition code returning system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6454560A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5856130A (en) * | 1981-09-30 | 1983-04-02 | Fujitsu Ltd | input/output control system |
-
1987
- 1987-08-26 JP JP21008087A patent/JPS6454560A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5856130A (en) * | 1981-09-30 | 1983-04-02 | Fujitsu Ltd | input/output control system |
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