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JPS6453612A - Amplifier - Google Patents

Amplifier

Info

Publication number
JPS6453612A
JPS6453612A JP62210678A JP21067887A JPS6453612A JP S6453612 A JPS6453612 A JP S6453612A JP 62210678 A JP62210678 A JP 62210678A JP 21067887 A JP21067887 A JP 21067887A JP S6453612 A JPS6453612 A JP S6453612A
Authority
JP
Japan
Prior art keywords
amplifier
differential input
terminal
input
direct current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62210678A
Other languages
Japanese (ja)
Inventor
Miyokazu Watabe
Nobuo Ueda
Juichi Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62210678A priority Critical patent/JPS6453612A/en
Publication of JPS6453612A publication Critical patent/JPS6453612A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To secure a direct current balance with one capacitor by executing the direct current negative feedback of a feedback ratio to a first step differential input type amplifier, and connecting the feedback input terminal and one terminal of the differential input of a next step differential input type amplifier. CONSTITUTION:An output terminal 4 of a first differential input type amplifier 1, an inverting input terminal 1b, one side input terminal 2a of a second differential input type amplifier 2 are respectively connected with resistances 12 and 8 and a capacitor 13 is connected between the inverting input terminal 1b of the amplifier 1 and the ground. By the constitution, a direct current negative feedback is applied with a feedback ratio beta=1 to a first step amplifier 1 and a signal voltage to occur between the output terminal of the amplifier 1 and the inverting input terminal is added to the differential input terminal of the next step amplifier 2. As this result, the differential input of the amplifier 2 holds the direct balance regardless of an input Vi. On the other hand, for the differential input of the amplifier 1, the direct current balance is held regardless of the input Vi by setting largely a gain KA of the amplifier 1.
JP62210678A 1987-08-25 1987-08-25 Amplifier Pending JPS6453612A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62210678A JPS6453612A (en) 1987-08-25 1987-08-25 Amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62210678A JPS6453612A (en) 1987-08-25 1987-08-25 Amplifier

Publications (1)

Publication Number Publication Date
JPS6453612A true JPS6453612A (en) 1989-03-01

Family

ID=16593297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62210678A Pending JPS6453612A (en) 1987-08-25 1987-08-25 Amplifier

Country Status (1)

Country Link
JP (1) JPS6453612A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100378384B1 (en) * 1999-05-10 2003-03-29 알프스 덴키 가부시키가이샤 Signal level adjustment circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100378384B1 (en) * 1999-05-10 2003-03-29 알프스 덴키 가부시키가이샤 Signal level adjustment circuit

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