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JPS6451512A - Power saving type memory device - Google Patents

Power saving type memory device

Info

Publication number
JPS6451512A
JPS6451512A JP62207416A JP20741687A JPS6451512A JP S6451512 A JPS6451512 A JP S6451512A JP 62207416 A JP62207416 A JP 62207416A JP 20741687 A JP20741687 A JP 20741687A JP S6451512 A JPS6451512 A JP S6451512A
Authority
JP
Japan
Prior art keywords
memory
signal
controller
feeding
chip select
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62207416A
Other languages
Japanese (ja)
Inventor
Masamichi Sato
Kaoru Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Holdings Corp
Original Assignee
Fuji Photo Film Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Photo Film Co Ltd filed Critical Fuji Photo Film Co Ltd
Priority to JP62207416A priority Critical patent/JPS6451512A/en
Publication of JPS6451512A publication Critical patent/JPS6451512A/en
Pending legal-status Critical Current

Links

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Memory System (AREA)
  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To prevent wasteful power consumption without energizing a memory in which nothing is stored by permitting a selection means to select a memory element corresponding to a signal for selectively designating plural memory elements if the selection means receives the signal and at least allowing feeding to the selected memory element. CONSTITUTION:A memory controller 12 is connected with an address controller 10 through signal lines 20 and it has a function selecting the memory chips 14 by the selection signal of the address controller 10. The address controller 10 is connected with a terminal 28 through a signal line 26 and a receives having encoded chip select data for selecting the memory chips 14 from the terminal 28 at the time of writing/reading data. With chip select data, the selection signals of the memory chips 14 are transmitted to the memory controller 12. Since feeding is controlled at every memory chip 14, and feeding is not executed to the memory chips which are not energized in chip select outputs 24, wasteful power is not consumed.
JP62207416A 1987-08-22 1987-08-22 Power saving type memory device Pending JPS6451512A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62207416A JPS6451512A (en) 1987-08-22 1987-08-22 Power saving type memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62207416A JPS6451512A (en) 1987-08-22 1987-08-22 Power saving type memory device

Publications (1)

Publication Number Publication Date
JPS6451512A true JPS6451512A (en) 1989-02-27

Family

ID=16539389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62207416A Pending JPS6451512A (en) 1987-08-22 1987-08-22 Power saving type memory device

Country Status (1)

Country Link
JP (1) JPS6451512A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03125393A (en) * 1989-10-11 1991-05-28 Mitsubishi Electric Corp Semiconductor storage device
JPH03246714A (en) * 1990-02-26 1991-11-05 Victor Co Of Japan Ltd Control method in dma controller
JPH04230508A (en) * 1990-10-29 1992-08-19 Internatl Business Mach Corp <Ibm> Apparatus and method for controlling electric power with page arrangment control

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03125393A (en) * 1989-10-11 1991-05-28 Mitsubishi Electric Corp Semiconductor storage device
JPH03246714A (en) * 1990-02-26 1991-11-05 Victor Co Of Japan Ltd Control method in dma controller
JPH04230508A (en) * 1990-10-29 1992-08-19 Internatl Business Mach Corp <Ibm> Apparatus and method for controlling electric power with page arrangment control

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