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JPS6444420A - Opposed matrix type tft panel - Google Patents

Opposed matrix type tft panel

Info

Publication number
JPS6444420A
JPS6444420A JP62201516A JP20151687A JPS6444420A JP S6444420 A JPS6444420 A JP S6444420A JP 62201516 A JP62201516 A JP 62201516A JP 20151687 A JP20151687 A JP 20151687A JP S6444420 A JPS6444420 A JP S6444420A
Authority
JP
Japan
Prior art keywords
buses
bus
electrodes
tft
separately
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62201516A
Other languages
Japanese (ja)
Inventor
Takeshi Kamata
Kenichi Yanai
Michiya Oura
Tetsuro Endo
Kenichi Oki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62201516A priority Critical patent/JPS6444420A/en
Publication of JPS6444420A publication Critical patent/JPS6444420A/en
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To prevent the generation of a line defect by constituting a scanning bus of 1st and 2nd buses connected to each other, connecting the control electrodes of 1st and 2nd switch elements corresponding to respective picture elements separately to the respective buses or connecting either of the electrodes to be controlled of the elements separately to the 1st and 2nd buses of the scanning bus in the next position. CONSTITUTION:The gate bus 23 is constituted of the buses 10, 9 and are connected by a juncture 14. The gate electrodes 2, 2' of an adjacent thin film transistor TFT are separately connected to the buses 10, 9. The drains are commonly connected and lead out to the scanning bus 23' of the next position. The source electrodes are connected to the respectively corresponding picture elements. The need for connecting the buses 10 and 9 or 11 and 12 afresh is eliminated at the time of an ordinary operation according to this constitution. The defective TFT can be located by disconnecting the bus juncture 14 only when a short circuit arises in the TFT. Information is transmitted to all the TFTs through the connection points 14 from the other buses even in the event of a bus disconnection. The generation of the bus defect is thus obviated.
JP62201516A 1987-08-11 1987-08-11 Opposed matrix type tft panel Pending JPS6444420A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62201516A JPS6444420A (en) 1987-08-11 1987-08-11 Opposed matrix type tft panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62201516A JPS6444420A (en) 1987-08-11 1987-08-11 Opposed matrix type tft panel

Publications (1)

Publication Number Publication Date
JPS6444420A true JPS6444420A (en) 1989-02-16

Family

ID=16442341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62201516A Pending JPS6444420A (en) 1987-08-11 1987-08-11 Opposed matrix type tft panel

Country Status (1)

Country Link
JP (1) JPS6444420A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179458A (en) * 1990-08-23 1993-01-12 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal electro-optic device with particular relationship between retardation film drawing direction and substrate edge

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11243209A (en) * 1998-02-25 1999-09-07 Seiko Epson Corp Transfer method of thin film device, thin film device, thin film integrated circuit device, active matrix substrate, liquid crystal display device, and electronic equipment
JP2000231118A (en) * 1999-02-10 2000-08-22 Sony Corp Electrooptical device, driving board for electrooptical device and their production
JP2001100661A (en) * 1999-09-29 2001-04-13 Sanyo Electric Co Ltd Electroluminescence display device
JP2001331120A (en) * 2000-03-15 2001-11-30 Semiconductor Energy Lab Co Ltd Method for manufacturing display device
JP2002049333A (en) * 2000-05-12 2002-02-15 Semiconductor Energy Lab Co Ltd Light emitting device and electrical equipment
JP2002151253A (en) * 2000-08-18 2002-05-24 Semiconductor Energy Lab Co Ltd Light emitting device and display device
JP2002151276A (en) * 2000-08-10 2002-05-24 Semiconductor Energy Lab Co Ltd Display device and electronic equipment
JP2002367780A (en) * 2001-06-08 2002-12-20 Nec Corp Organic EL device and manufacturing method thereof
JP2004214281A (en) * 2002-12-27 2004-07-29 Semiconductor Energy Lab Co Ltd Semiconductor device, method of manufacturing the same, separation method and transfer method
JP2004237655A (en) * 2003-02-07 2004-08-26 Kureha Chem Ind Co Ltd Alternately laminated moistureproof film, its manufacturing method and alternately laminated moistureproof film with transparent electrode plate

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11243209A (en) * 1998-02-25 1999-09-07 Seiko Epson Corp Transfer method of thin film device, thin film device, thin film integrated circuit device, active matrix substrate, liquid crystal display device, and electronic equipment
JP2000231118A (en) * 1999-02-10 2000-08-22 Sony Corp Electrooptical device, driving board for electrooptical device and their production
JP2001100661A (en) * 1999-09-29 2001-04-13 Sanyo Electric Co Ltd Electroluminescence display device
JP2001331120A (en) * 2000-03-15 2001-11-30 Semiconductor Energy Lab Co Ltd Method for manufacturing display device
JP2002049333A (en) * 2000-05-12 2002-02-15 Semiconductor Energy Lab Co Ltd Light emitting device and electrical equipment
JP2002151276A (en) * 2000-08-10 2002-05-24 Semiconductor Energy Lab Co Ltd Display device and electronic equipment
JP2002151253A (en) * 2000-08-18 2002-05-24 Semiconductor Energy Lab Co Ltd Light emitting device and display device
JP2002367780A (en) * 2001-06-08 2002-12-20 Nec Corp Organic EL device and manufacturing method thereof
JP2004214281A (en) * 2002-12-27 2004-07-29 Semiconductor Energy Lab Co Ltd Semiconductor device, method of manufacturing the same, separation method and transfer method
JP2004237655A (en) * 2003-02-07 2004-08-26 Kureha Chem Ind Co Ltd Alternately laminated moistureproof film, its manufacturing method and alternately laminated moistureproof film with transparent electrode plate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179458A (en) * 1990-08-23 1993-01-12 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal electro-optic device with particular relationship between retardation film drawing direction and substrate edge

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