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JPS6432647A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6432647A
JPS6432647A JP62187582A JP18758287A JPS6432647A JP S6432647 A JPS6432647 A JP S6432647A JP 62187582 A JP62187582 A JP 62187582A JP 18758287 A JP18758287 A JP 18758287A JP S6432647 A JPS6432647 A JP S6432647A
Authority
JP
Japan
Prior art keywords
circuits
cmos
logical
ecl
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62187582A
Other languages
Japanese (ja)
Other versions
JPH07105444B2 (en
Inventor
Fumio Murabayashi
Yoji Nishio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62187582A priority Critical patent/JPH07105444B2/en
Publication of JPS6432647A publication Critical patent/JPS6432647A/en
Publication of JPH07105444B2 publication Critical patent/JPH07105444B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/996—Masterslice integrated circuits using combined field effect technology and bipolar technology

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Microcomputers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To shorten the delay time, and to improve the efficiency of mounting by integrating and forming logical blocks including logical circuits at different logical levels such as an ECL, a CMOS, etc., on the same chip and operating the logical blocks by a power supply having the same potential. CONSTITUTION:An ECL circuit block 401, a bipolar-CMOS circuit block 402 and a CMOS circuit block 403 are connected by interface circuits 404. Input/ output circuits 405 at different input/output signal levels are connected to the blocks 401, 403. A first power supply 406 at +5V, a second power supply 408 at -5.2V and a third power supply 407 at OV are fitted as power supplies. These blocks, circuits and power supplies are set up onto a semiconductor substrate (a chip) 409. Circuits inputting and outputting ECL signals are connected to the power lines 407, 408, and circuits inputting and outputting TTL signals and CMOS signals to the power lines 406, 407. The logical block circuits 401, 402, 403 are operated by the power supplies at the same potential though they are composed respectively of logical circuits of different kinds such as an ECL, a bipolar-CMOS and a CMOS.
JP62187582A 1987-07-29 1987-07-29 Semiconductor integrated circuit device Expired - Fee Related JPH07105444B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62187582A JPH07105444B2 (en) 1987-07-29 1987-07-29 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62187582A JPH07105444B2 (en) 1987-07-29 1987-07-29 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS6432647A true JPS6432647A (en) 1989-02-02
JPH07105444B2 JPH07105444B2 (en) 1995-11-13

Family

ID=16208629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62187582A Expired - Fee Related JPH07105444B2 (en) 1987-07-29 1987-07-29 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPH07105444B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0325952A (en) * 1989-06-23 1991-02-04 Nec Corp Bipolar cmos hybrid semiconductor integrated circuit
US5682111A (en) * 1991-10-30 1997-10-28 Harris Corporation Integrated circuit with power monitor
WO1998008258A1 (en) * 1996-08-21 1998-02-26 Siemens Aktiengesellschaft System voltages for emitter coupled logic (ecl)-compatible input and output circuits in cmos technology
US5994755A (en) * 1991-10-30 1999-11-30 Intersil Corporation Analog-to-digital converter and method of fabrication

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61171150A (en) * 1985-01-25 1986-08-01 Hitachi Ltd Semiconductor ic device
JPS62122262A (en) * 1985-11-22 1987-06-03 Hitachi Ltd Semiconductor integrated circuit device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61171150A (en) * 1985-01-25 1986-08-01 Hitachi Ltd Semiconductor ic device
JPS62122262A (en) * 1985-11-22 1987-06-03 Hitachi Ltd Semiconductor integrated circuit device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0325952A (en) * 1989-06-23 1991-02-04 Nec Corp Bipolar cmos hybrid semiconductor integrated circuit
US5682111A (en) * 1991-10-30 1997-10-28 Harris Corporation Integrated circuit with power monitor
US5994755A (en) * 1991-10-30 1999-11-30 Intersil Corporation Analog-to-digital converter and method of fabrication
US6329260B1 (en) 1991-10-30 2001-12-11 Intersil Americas Inc. Analog-to-digital converter and method of fabrication
WO1998008258A1 (en) * 1996-08-21 1998-02-26 Siemens Aktiengesellschaft System voltages for emitter coupled logic (ecl)-compatible input and output circuits in cmos technology

Also Published As

Publication number Publication date
JPH07105444B2 (en) 1995-11-13

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees