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JPS6432339A - Microprogram controller - Google Patents

Microprogram controller

Info

Publication number
JPS6432339A
JPS6432339A JP18940987A JP18940987A JPS6432339A JP S6432339 A JPS6432339 A JP S6432339A JP 18940987 A JP18940987 A JP 18940987A JP 18940987 A JP18940987 A JP 18940987A JP S6432339 A JPS6432339 A JP S6432339A
Authority
JP
Japan
Prior art keywords
address
microinstruction
counter
subroutine
stack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18940987A
Other languages
Japanese (ja)
Inventor
Ikuo Uchibori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP18940987A priority Critical patent/JPS6432339A/en
Publication of JPS6432339A publication Critical patent/JPS6432339A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize the repetitive processing control using a microprogram by using the restored address held by an address stack as the next executing microinstruction address. CONSTITUTION:When a repetitive processing subroutine 11 is carried out, the number of times of the necessary repeating of the repetitive processing is designated by a prescribed microinstruction and the number of times of this designation is set at a counter 27. A borrow signal 28 is outputted when a counter 27 detects that the subroutine 11 is repeated by N times. Then the output of an address stack 29 is selected by a selector 30 and led to a selector 31. Thus when a microinstruction 14 is read out to a microinstruction register 23 and the signal 28 is outputted from the counter 27, the restored address stacked in a stack 29 at the branch to the subroutine 11 is set at an address register 21 as a microinstruction address to be carried out next.
JP18940987A 1987-07-29 1987-07-29 Microprogram controller Pending JPS6432339A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18940987A JPS6432339A (en) 1987-07-29 1987-07-29 Microprogram controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18940987A JPS6432339A (en) 1987-07-29 1987-07-29 Microprogram controller

Publications (1)

Publication Number Publication Date
JPS6432339A true JPS6432339A (en) 1989-02-02

Family

ID=16240789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18940987A Pending JPS6432339A (en) 1987-07-29 1987-07-29 Microprogram controller

Country Status (1)

Country Link
JP (1) JPS6432339A (en)

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