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JPS6423302A - Programmable controller - Google Patents

Programmable controller

Info

Publication number
JPS6423302A
JPS6423302A JP17939287A JP17939287A JPS6423302A JP S6423302 A JPS6423302 A JP S6423302A JP 17939287 A JP17939287 A JP 17939287A JP 17939287 A JP17939287 A JP 17939287A JP S6423302 A JPS6423302 A JP S6423302A
Authority
JP
Japan
Prior art keywords
unit
sequence
cpu
program
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17939287A
Other languages
Japanese (ja)
Inventor
Yoshio Kasai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17939287A priority Critical patent/JPS6423302A/en
Publication of JPS6423302A publication Critical patent/JPS6423302A/en
Pending legal-status Critical Current

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  • Programmable Controllers (AREA)

Abstract

PURPOSE:To increase the sequence arithmetic processing speed in terms of a system to be processed and to improve the processing efficiency of a programmable controller, by transferring the partial contents of a sequence program of a sequencer CPU unit to a sub-CPU unit so that this sub-CPU unit performs the sequence arithmetic in parallel with a sequence unit. CONSTITUTION:A sequencer CPU unit 1 is added to a programmable controller to store a sequence program. Then a sub-CPU unit 3 is connected to the unit 1 via a mother board 2. The unit 1 transmits and receives data to and from the unit 3 via a two port RAM 13, an input image port 14 and an output image port 15 of the unit 3. A CPU/logical operation circuit 4 is connected to the RAM 14 and both ports 14 and 15. Thus the contents of the interruption signal produced by the unit 1 are decoded and these decoded contents are stored in a program storing memory 7. The unit 3 processes in parallel a part of the sequence program of the unit 1 based on the program stored in the memory 7.
JP17939287A 1987-07-18 1987-07-18 Programmable controller Pending JPS6423302A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17939287A JPS6423302A (en) 1987-07-18 1987-07-18 Programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17939287A JPS6423302A (en) 1987-07-18 1987-07-18 Programmable controller

Publications (1)

Publication Number Publication Date
JPS6423302A true JPS6423302A (en) 1989-01-26

Family

ID=16065063

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17939287A Pending JPS6423302A (en) 1987-07-18 1987-07-18 Programmable controller

Country Status (1)

Country Link
JP (1) JPS6423302A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5365033A (en) * 1976-11-24 1978-06-10 Mitsubishi Electric Corp Multi processor system
JPS5436461A (en) * 1977-08-29 1979-03-17 Toshiba Corp Sequence controller
JPS5520504A (en) * 1978-06-27 1980-02-14 Panafacom Ltd Clock control system
JPS5725045A (en) * 1980-07-22 1982-02-09 Nec Corp Data processing equipment
JPS59154564A (en) * 1983-02-24 1984-09-03 Hitachi Ltd Programmable controller

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5365033A (en) * 1976-11-24 1978-06-10 Mitsubishi Electric Corp Multi processor system
JPS5436461A (en) * 1977-08-29 1979-03-17 Toshiba Corp Sequence controller
JPS5520504A (en) * 1978-06-27 1980-02-14 Panafacom Ltd Clock control system
JPS5725045A (en) * 1980-07-22 1982-02-09 Nec Corp Data processing equipment
JPS59154564A (en) * 1983-02-24 1984-09-03 Hitachi Ltd Programmable controller

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