JPS63296410A - Drive circuit - Google Patents

Abstract

PURPOSE:To detect whether the load state such as load short-circuit or load open is normal or abnormal by providing 1st and 2nd comparator circuits. CONSTITUTION:A detection circuit comprising a comparator circuit 8, a reference voltage source 7, a comparator circuit 9, a reference voltage source 10 and an OR circuit 11 outputting OR of the comparators 8, 9 is connected to an output terminal 3. The output of the OR circuit 11 is of high level with respect to the state of normal load if a load resistor RL reaches an abnormal state such as short-circuit or open circuit. Thus, not only the output current is controlled to be kept constant if the impedance of the load RL decreases abnormally but also an abnormal state such as short circuit or open load is detected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit, and particularly to a drive circuit in which the output current is limited so that it does not become excessive.

[Conventional technology]

To protect the drive circuit from short-circuiting the load, the output current of the output transistor is detected, and when the output current exceeds a certain set level, a current limit is applied to prevent the output current from flowing any further, or the output is turned off. It seems like it will let you do it.

FIG. 4 shows an example of a conventional drive circuit.

In the conventional circuit shown in FIG. 4, 1 is an input terminal, 2 is a power supply terminal, 3 is an output terminal, 4 is a comparison circuit, and 5 is a reference voltage source for the comparison circuit (this reference voltage is referred to as "REF+"). .In addition, R1 to R, are resistances (these resistance values T) Rt
Rt is a load resistance b, and Qh to Q6 are NPN transistors. As for the operation of the conventional drive circuit shown in FIG. 4, when a high level voltage is applied to the input terminal 1, the output transistor Q6 operates, drives the load resistor, and the output current flows.

Here, the impedance of the load resistor RL decreases or the load becomes short-circuited, the output current 0 increases, and the voltage drop across the resistor R8 (hereinafter expressed as v8) becomes VB = R4X
When I o i V RErx is reached, the comparator circuit 4 operates to control the output current IO to a constant value of Io ``V REFI /RrB, thereby preventing destruction of the output transistor due to overcurrent.

[Problem that the invention seeks to solve]

In the conventional drive circuit described above, when the impedance of the load resistor RL decreases or when the load is short-circuited, the current limiting circuit including the comparator circuit 4 operates, and the output current 1
．． is kept at a constant value, but the load status cannot be detected.

The present invention uses a current limiting circuit to output even when the load is short-circuited! As well as keeping fiIo constant.

The object of the present invention is to provide a drive circuit equipped with a terminal capable of detecting whether a load condition such as load short circuit or load open condition is normal or abnormal.

[Failure to solve the problem]

In the present invention, a load, an output terminal, an output transistor controlled by an input voltage applied to the input terminal, and a resistor for detecting an output current are connected in series to a power supply, and a voltage drop across the resistor causes the output When the impedance of the load abnormally decreases by controlling the transistor, the output 'Ptg
and a current control circuit that prevents an excessive current from becoming excessive, a first circuit that detects that the impedance of the load has abnormally decreased by comparing the voltage of the output terminal with a first reference voltage. and a second comparison circuit that compares the voltage of the output terminal with a second reference voltage to detect that the impedance of the load has become abnormally high.

〔Example〕

Briefly, the present invention will be specifically explained with reference to the drawings.

FIG. 1 shows an embodiment of the present invention.

The same numbers and symbols as in FIG. 4 indicate the same things.

In FIG. 1, transistors Ql, Qz, Qs
, Q4 constitute a circuit that controls the output transistors Qs, Q= according to the high or low level of the signal applied to the input terminal 1, and when a high level signal is applied to the input terminal 1, the output transistors Qs, Qs operates and drives the load resistance ratio. In addition, the circuit consisting of the resistance ratio 8, the comparator circuit 4, and the reference voltage source 5 is a current limiting circuit, so even if the impedance of the load resistor R+L decreases or the load seat occurs and the output current attempts to increase, the current will remain constant. It works to suppress it.

- million, comparison circuit 8. Reference voltage source 7 (this reference voltage is VR
EFI), comparator circuit 9, reference voltage source 10 (this reference voltage is vuzrs), and comparator circuit 8
, a detection circuit constituted by an OR circuit 11 that outputs the logical sum of the comparison circuits 9 is connected to the output terminal 3.

Next, the operation of this embodiment will be explained using FIG. 1, FIG. 2, and FIG. 3.

In Fig. 2, during steady operation, the input voltage is
When it becomes high level, the output transistor Qs,
Qs operates and output/intercurrent IG flows. At this time, the output current IO2 output voltage vo is Io = Vcc - (Vnz Qs + VCE (5at
)Q5) ) /(Rt, +Ra)[A] (
1) Formula Ve=Vnx Qs +Vcg(sat) Qs +R
sX Io CVI Defined by equation (2).

However, vcc: power supply voltage VCE (S
at): Saturation voltage between transistor collector and emitter V'nic: Voltage between transistor base and emitter At time textl, the voltage drop vs across resistor R8 is smaller than reference voltage VRgFx, so the current limiting circuit does not operate. Also, when the load resistance ratio is normal, VO<VIL
EF! Since the reference voltage vugrt is set so that , the output of the comparison circuit 8 is at a low level. Also, when the load resistance ratio is normal, ■o>■REFs
Since the reference voltage "REF2" is set so that The output voltage v8 at the terminal 6 becomes low level.

Next, at time t1%t in FIG. 2, the impedance of the load resistor RL decreases, and the output current o increases,
◎When XRs > VRgIFx, the current limiting circuit is activated by the comparator circuit 4 to keep the output current at a constant value. 1 hour here 11-1. The output current Iol and output voltage vo' are defined by the following equation.

Io'=Vnzyx/Rs [A]
(3) Formula VO'=V'CC-RL X Io'
(V) Equation (4) At this time, VREF2 (V, )', so the output voltage of the comparator circuit 8 becomes high level. Also, the comparator circuit 9 outputs s Vmps (vo', so the output voltage becomes low level Therefore, 01 is the output of the circuit 11, that is, the output voltage of the terminal 6 (6) is from time t1 to t
It reaches a high level at 2.

Further, the time t2 to t3 shown in FIG. 2 is the time 1. ~t
This is the same operation as 1.

Next, in FIG. 3, the operation for one hour toxtl is similar to the operation for time to -xtl shown in FIG.

Time tlxt! When the load resistor RII becomes open, the output current 'Os and the output voltage Vo both become OA.
.

OV and % VREF3 > Vo, so
The output of the comparison circuit 9 becomes high level. Furthermore, the comparator circuit 8 has VRzpz > V6, and its output is at a low level.

Therefore, the output of the OR circuit 11, that is, the output voltage v6 of the terminal 6 becomes high level.

As mentioned above, the output of the zero circuit 11 is the load resistance RL
When there is an abnormality such as shift or open, a higher level is output than under normal load.

〔Effect of the invention〕

As explained above, the drive circuit of the present invention not only controls the device to keep the output current constant when the load impedance drops abnormally, but also detects abnormal loads such as load seat and load open. becomes possible.

Therefore, for example, when the present invention is driven by a microcomputer, if the microcomputer monitors the logical sum of the outputs of the first and second comparator circuits and the input voltage, it is possible to issue a warning of load abnormality or to monitor the drive circuit. can be turned off by a microcomputer.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Figs. 2 and 3 are diagrams of operating waveforms of various parts of the embodiment shown in Fig. 1, and Fig. 4 is a circuit diagram showing a conventional drive circuit. It is. 1...Input terminal, 2...Power terminal, 3
...Output terminal, 4. 8. 9... Comparison circuit, 5. 7. 10... Comparison circuit reference voltage, 6... OR circuit output terminal, 11...
...OR circuit s Qs~Q6...transistor, R1-R8...resistance. Kaya 2 illustrations etc. 3 Matasen 7 illustrations

Claims (1)

[Claims] A load, an output terminal, an output transistor controlled by an input voltage applied to the input terminal, and a resistor for detecting output current are connected in series to a power supply, and a voltage drop across the resistor causes and a current control circuit that controls the output transistor to prevent the output current from becoming excessive when the impedance of the load abnormally decreases, wherein the voltage of the output terminal and the first reference voltage are a first comparison circuit that detects that the impedance of the load has become abnormally low by comparing the voltage of the output terminal with a second reference voltage; and a second comparison circuit that detects.