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JPS63215091A - Semiconductor laser - Google Patents

Semiconductor laser

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Publication number
JPS63215091A
JPS63215091A JP4921687A JP4921687A JPS63215091A JP S63215091 A JPS63215091 A JP S63215091A JP 4921687 A JP4921687 A JP 4921687A JP 4921687 A JP4921687 A JP 4921687A JP S63215091 A JPS63215091 A JP S63215091A
Authority
JP
Japan
Prior art keywords
layer
groove
mixed crystal
semiconductor laser
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4921687A
Other languages
Japanese (ja)
Inventor
Takao Shibuya
隆夫 渋谷
Kunio Ito
国雄 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4921687A priority Critical patent/JPS63215091A/en
Publication of JPS63215091A publication Critical patent/JPS63215091A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To relax the stress to be applied to both ends of a groove, to inhibit the generation of a dark line in an active layer and to obtain a highly reliable high-output operation by forming a GaAlAs layer having a mixed crystal ratio smaller than that of a first clad layer in the groove. CONSTITUTION:An Al0.30Ga0.70As stress relaxing layer 10 is formed in such a way as to fill a groove. The mixed crystal ratio of Al to As of the layer 10 is made smaller than that of a first clad layer 3. By making the thermal expansion coefficient of the AlGaAs of the layer 10 approach to the thermal expansion coefficient of the GaAs layer, the stress to be applied to both ends of the groove 9 becomes small. An active layer 4 and a second clad layer 5 are formed in order on the clad layer 3. Thereby, the generation of a dark line in the layer 4 is inhibited and a highly reliable high-output operation can be obtained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、光デイスクファイルやレーザプリンタ等の光
情報処理装置の光源に用いることができる半導体レーザ
装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor laser device that can be used as a light source for optical information processing devices such as optical disk files and laser printers.

従来の技術 近年、光デイスクファイルや、レーザプリンタなどの広
い分野で、可視先高出方半導体レーザ装置の需要が高ま
っている。襄出カ半導体レーザとしては、本発明者らが
すでにB T RS (BurriadTwin−Ri
dge 5ubs+trate)構造の半導体レーザ装
置を提案している。第4図はBTR8構造をとった発振
波長750n11の可視光高出力レーザの断面である。
BACKGROUND OF THE INVENTION In recent years, demand for semiconductor laser devices with high visibility has increased in a wide range of fields such as optical disk files and laser printers. The present inventors have already developed BTRS (BurriadTwin-Ri) as a semiconductor laser.
We are proposing a semiconductor laser device with a dge 5ubs+trate) structure. FIG. 4 is a cross section of a visible light high output laser with a BTR8 structure and an oscillation wavelength of 750n11.

1はp型GaAs5基板、2はn型GILA!1電流ブ
ロッキング層、3はp型ムkss Ga (1,45ム
S第1クラッド層、4はノンドープムJ0.20G”[
1,8OA”活性層、6はn型ムl o、ss Gaa
、45ムS第2 クラy )”層、eはn型GaAgコ
ンタクト層、7はn側電極、8はp側電極である。第6
図はこの可視光高出力半導体レーザの寿命試験の結果で
ある。キャビティの前方、後方端面には端面保護膜をコ
ーティングしてあり、端面の反射率をそれぞれ10%、
90チとしている。寿命試験は、70°Cの窒素ガス雰
囲気中で行ない、光出力20mWの一定光出力駆動をし
た。動作電流は数100時間内で大きく増加している。
1 is a p-type GaAs5 substrate, 2 is an n-type GILA! 1 current blocking layer, 3 p-type Mukss Ga (1.45 MuS first cladding layer, 4 non-doped J0.20G" [
1,8OA" active layer, 6 is n-type MLO, ss Gaa
, 45mmS second cry)'' layer, e is an n-type GaAg contact layer, 7 is an n-side electrode, and 8 is a p-side electrode.
The figure shows the results of a life test of this visible light high-power semiconductor laser. The front and rear end faces of the cavity are coated with an end face protective film, reducing the reflectance of the end faces by 10% and 10% respectively.
It is set at 90chi. The life test was conducted in a nitrogen gas atmosphere at 70° C., and was driven at a constant optical output of 20 mW. The operating current increases significantly within several hundred hours.

発明が解決しようとする問題点 この数100時間内での可視光高出力半導体レーザの劣
化の原因としては、第3図の溝9の両端にかかる応力で
あると考えられている( M、Ikedaat A11
. J、ムpp1. Phys、 58.2448 (
1985)参照)。p型G&ムS基板1およびn型Ga
As電流ブロッキング層2の熱膨張係数と、p型Ga 
o、 ss人lo、asAS第1クラッド層3の熱膨張
係数に差があるため、レーザ発振時の発熱によって11
19の両端に応力が集中する。その応力によって、活性
層4内にダークラインが発生し、半導体レーザの信頼性
に著しく問題があった。
Problems to be Solved by the Invention It is believed that the cause of the deterioration of the visible light high-power semiconductor laser within several hundred hours is the stress applied to both ends of the groove 9 in FIG. A11
.. J, Mpp1. Phys, 58.2448 (
(1985)). p-type G & M S substrate 1 and n-type Ga
Thermal expansion coefficient of As current blocking layer 2 and p-type Ga
o, ss lo, asAS Due to the difference in the coefficient of thermal expansion of the first cladding layer 3, the heat generation during laser oscillation causes
Stress is concentrated at both ends of 19. Due to this stress, dark lines were generated in the active layer 4, causing a significant problem in the reliability of the semiconductor laser.

本発明は上記欠点に鑑み、溝の両端にかかる応力を緩和
してダークラインの発生を抑制し、信頼性の高い可視光
高出力発振半導体レーザ装置を提供するものである。
In view of the above-mentioned drawbacks, the present invention provides a highly reliable visible light high power oscillation semiconductor laser device that suppresses the occurrence of dark lines by relaxing the stress applied to both ends of the groove.

問題点を解決するための手段 上記問題点を解決するために、本発明の半導体レーザ装
置は、溝内に、第1クラッド層よりも混晶比の小さいG
aAlliAs層が形成されて構成されている。
Means for Solving the Problems In order to solve the above problems, the semiconductor laser device of the present invention has a G layer in the groove having a lower mixed crystal ratio than the first cladding layer.
It is constructed by forming an aAlliAs layer.

作用 この構成によって、溝の両端にかかる応力を緩和してダ
ークラインの発生を抑制し、半導体レーザの劣化を防ぐ
ことになり、可視光高出力発振をする上で、高い信頼性
を得るととができる。
Effect: This configuration alleviates the stress applied to both ends of the groove, suppresses the occurrence of dark lines, and prevents deterioration of the semiconductor laser, resulting in high reliability for high-output visible light oscillation. Can be done.

実施例 以下、本発明の一実施例について、図面を参照しながら
説明する。第1図は、本発明の一実施例における半導体
レーザ装置の断面である。1〜9はそれぞれ従来例と同
じ構成である。1oはp型ムlo、3oGILo、7o
A!応力緩和層である。応力緩和層1oは溝9を埋める
ようにして形成している。溝9の幅Wおよび各層の膜厚
は次の通りである。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a cross section of a semiconductor laser device in one embodiment of the present invention. 1 to 9 each have the same configuration as the conventional example. 1o is p-type Mlo, 3oGILo, 7o
A! It is a stress relaxation layer. The stress relaxation layer 1o is formed to fill the groove 9. The width W of the groove 9 and the film thickness of each layer are as follows.

W=6.0μml  d++=1.4μnt  d12
==0.02μm1(113=0.30μm、  d’
14:0.064m+  d15=2.0μ”+d16
=2.5μm0 応力緩和層10のムlAs混晶比は、第1クラッド層3
の混晶比よりも小さくしである。GaAsおよびムEA
Sの熱膨張係数をそれぞれαGaAg、αムJAsとす
ると、ム1xGIL1.Asの熱膨張係数αムlGaA
gは、αA11(rlLAs = (1−x )txG
aAs +xahlhaαGaムs:6.86X10 
 (’c  )agAB = 5.20 X 10  
(’C)と書ける( M、  Ikeda  etal
、 J、人pp1. Phyg。
W=6.0μml d++=1.4μnt d12
==0.02μm1 (113=0.30μm, d'
14:0.064m+d15=2.0μ”+d16
=2.5μm0 The stress relaxation layer 10 has a mixed crystal ratio of 1 As of the first cladding layer 3.
This is smaller than the mixed crystal ratio of . GaAs and MuEA
Letting the thermal expansion coefficients of S be αGaAg and αmuJAs, respectively, then mu1xGIL1. Thermal expansion coefficient αm of AsGaA
g is αA11(rlLAs = (1-x)txG
aAs +xahlhaαGams:6.86X10
('c) agAB = 5.20 x 10
('C) can be written (M, Ikeda etal
, J, People pp1. Phyg.

sa、2448(1985)参照)。従って、ム4ムS
混晶比Xを小さくするほど、αムlGaAgはα(lr
aAsに近づく。応力緩和層10の熱膨張係数α人/G
aλB ’1GILA!iの熱膨張係数αGILA!!
に近づけることによって、溝9の両端にかかる応力は小
さくなる。
sa, 2448 (1985)). Therefore, MU4MUS
As the mixed crystal ratio X becomes smaller, α(lr
Approach aAs. Thermal expansion coefficient α of the stress relaxation layer 10/G
aλB '1GILA! Thermal expansion coefficient αGILA of i! !
By bringing the distance closer to , the stress applied to both ends of the groove 9 becomes smaller.

以上のような構成の半導体レーザ装置について、以下そ
の動作の説明をする。第2図は端面保護膜なしての光出
力と動作電流の関係である。しきい電流値は40mA、
外部微分量子効率は38%、最大光出力はssmWであ
った。この半導体レーザ装置のキャビティの前方、後方
端面に端面保護膜ヲコーティングして、70℃、2om
Wで高温加速寿命試験を行なった結果を第3図に示す。
The operation of the semiconductor laser device having the above configuration will be explained below. FIG. 2 shows the relationship between optical output and operating current without an end face protection film. The threshold current value is 40mA,
The external differential quantum efficiency was 38%, and the maximum optical output was ssmW. An end face protection film was coated on the front and rear end faces of the cavity of this semiconductor laser device, and
Figure 3 shows the results of a high temperature accelerated life test using W.

動作電流は5000時間後でもほとんど増加は見られず
、非常に信頼性の高い可視光高出力半導体レーザが得ら
れた。
Almost no increase in operating current was observed even after 5000 hours, and a highly reliable visible light high-power semiconductor laser was obtained.

発明の効果 以上のように、溝内に、第1クラッド層よりも混晶比の
小さいGaAl1Ag層を形成することにより、溝の両
端にかかる応力を緩和して活性層内のダークラインの発
生を抑制し、これによって信頼性の高い高出力動作が得
られ、その実用的効果には大なるものがある。
Effects of the Invention As described above, by forming a GaAl1Ag layer with a lower mixed crystal ratio than the first cladding layer in the groove, the stress applied to both ends of the groove is relaxed and the generation of dark lines in the active layer is suppressed. As a result, highly reliable high-output operation can be obtained, and its practical effects are significant.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における半導体レーザ装置の
断面図、第2図は本発明の一実施例における半導体レー
ザ装置の光出力と動作電流の関係の図、第3図は本発明
の一実施例における半導体レーザ装置の高温加速試験の
図、第4図は従来の半導体レーザ装置の断面図、第5図
は従来の半導体レーザ装置の高温加速試験の図である。 1・・・・・・p型GaAs基板、2・・・・・・n型
GaAs電流ブロッキング層、3・・・・・・p型ムl
o、5sGAo、asss第1クラッド層、4・・・・
・・ノンドープ人la、zoG&Q、aoAJ活性層、
6・・・・・・n型Ag o、 ss Ga(1,45
ムS第2クラッド層、6・・・・・・n型GaAsコン
タクト層、7・・・・・・n側電極、8・・・・・・p
側電極、9・・・・・・溝、10・・・・・・p型kl
 a、 5oGL O,70As応力緩和層。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名/−
pり(4As基隈 7〜旧も4:株 R−−−fl(ll14 イ0−piハ172.ご=a7−δ]t=力川g42 
図 用 3 図 ?、#、fr  75 (hour )lIJ4図 第 5 図 試1聚誘間(hour)
FIG. 1 is a cross-sectional view of a semiconductor laser device according to an embodiment of the present invention, FIG. 2 is a diagram showing the relationship between optical output and operating current of a semiconductor laser device according to an embodiment of the present invention, and FIG. FIG. 4 is a cross-sectional view of a conventional semiconductor laser device, and FIG. 5 is a diagram of a high-temperature accelerated test of a conventional semiconductor laser device in one embodiment. 1...p-type GaAs substrate, 2...n-type GaAs current blocking layer, 3...p-type layer
o, 5sGAo, asss first cladding layer, 4...
...Non-dope person la, zoG&Q, aoAJ active layer,
6...N-type Ag o, ss Ga (1,45
MuS second cladding layer, 6...n-type GaAs contact layer, 7...n-side electrode, 8...p
Side electrode, 9...groove, 10...p type kl
a, 5oGLO,70As stress relaxation layer. Name of agent: Patent attorney Toshio Nakao and 1 other person/-
p ri (4As Kokuma 7 ~ old mo 4: stock R --- fl (ll14 i0-piha172.go = a7-δ] t = Chikarakawa g42
For illustration 3 figure? , #, fr 75 (hour) lIJ4 Figure 5 Figure 1 Trial 1 (hour)

Claims (2)

【特許請求の範囲】[Claims] (1)一導電型の化合物半導体基板の上に、前記一導電
型とは反対の導電型を有し前記化合物半導体からなる第
1の半導体層が形成され、前記第1の半導体層には前記
基板に達する深さの溝が形成され、前記第1の半導体層
上に、前記溝を埋めるように、前記化合物半導体を含む
混晶からなる第2の半導体層が形成され、前記第2の半
導体層の上に前記第2の半導体層の混晶と同一元素から
なる混晶からなる第1クラッド層が形成され、さらに活
性層、第2クラッド層が順次形成されていることを特徴
とする半導体レーザ装置。
(1) A first semiconductor layer made of the compound semiconductor and having a conductivity type opposite to the one conductivity type is formed on a compound semiconductor substrate of one conductivity type; A groove with a depth reaching the substrate is formed, a second semiconductor layer made of a mixed crystal containing the compound semiconductor is formed on the first semiconductor layer so as to fill the groove, and the second semiconductor layer is made of a mixed crystal containing the compound semiconductor. A semiconductor characterized in that a first cladding layer made of a mixed crystal made of the same element as the mixed crystal of the second semiconductor layer is formed on the layer, and an active layer and a second cladding layer are further formed in sequence. laser equipment.
(2)第1クラッド層における化合物半導体の混晶比が
第2の半導体層における化合物半導体の混晶比よりも小
さいことを特徴とする特許請求の範囲第1項記載の半導
体レーザ装置。
(2) The semiconductor laser device according to claim 1, wherein the mixed crystal ratio of the compound semiconductor in the first cladding layer is smaller than the mixed crystal ratio of the compound semiconductor in the second semiconductor layer.
JP4921687A 1987-03-04 1987-03-04 Semiconductor laser Pending JPS63215091A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4921687A JPS63215091A (en) 1987-03-04 1987-03-04 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4921687A JPS63215091A (en) 1987-03-04 1987-03-04 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPS63215091A true JPS63215091A (en) 1988-09-07

Family

ID=12824759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4921687A Pending JPS63215091A (en) 1987-03-04 1987-03-04 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS63215091A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000021169A1 (en) * 1998-10-07 2000-04-13 Sharp Kabushiki Kaisha Semiconductor laser

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000021169A1 (en) * 1998-10-07 2000-04-13 Sharp Kabushiki Kaisha Semiconductor laser
US6618416B1 (en) 1998-10-07 2003-09-09 Sharp Kabushiki Kaisha Semiconductor laser

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