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JPS63128634A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS63128634A
JPS63128634A JP61275912A JP27591286A JPS63128634A JP S63128634 A JPS63128634 A JP S63128634A JP 61275912 A JP61275912 A JP 61275912A JP 27591286 A JP27591286 A JP 27591286A JP S63128634 A JPS63128634 A JP S63128634A
Authority
JP
Japan
Prior art keywords
aluminum
pad
semiconductor device
electrode
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61275912A
Other languages
Japanese (ja)
Other versions
JPH0546978B2 (en
Inventor
Eiji Hagimoto
萩本　英二
Seiichi Nishino
西野　誠一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61275912A priority Critical patent/JPS63128634A/en
Publication of JPS63128634A publication Critical patent/JPS63128634A/en
Publication of JPH0546978B2 publication Critical patent/JPH0546978B2/ja
Granted legal-status Critical Current

Links

Classifications

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To protect the surface of an electrode on a chip perfectly without degrading the reliability of elements nearby by a method wherein hydrate oxide is formed on the surface of the electrode by exposure to vapor after wire bonding. CONSTITUTION:A silicon oxide film 2 is formed on the surface of a silicon substrate 1 and an aluminum pad 3 and an aluminum wiring 4 are formed on it and a surface protective film 5 such as a CVD silicon oxide film or silicon nitride film is formed over the whole surface except on a part of the aluminum pad 3. A fine wire 6 of aluminum, copper or the like is bonded to the aluminum pad 3 by an ultrasonic bonding method or a fine wire 6 of gold is bonded to the aluminum pad 3 by a thermocompression bonding method. After that, if the exposed part of the surface of the pad 3 is exposed to supersaturated vapor, a precise and corrosion-resistant hydrate oxide layer can be obtained. With this constitution, the pad 3 is protected from corrosion caused by moisture penetration from the outside.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法、特に半導体基板上面の
アルミニウム電極表面を完全に保護した構造の半導体装
置を製造する方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a structure in which the surface of an aluminum electrode on the upper surface of a semiconductor substrate is completely protected.

〔従来の技術〕[Conventional technology]

一般に半導体チップの表面はシリコンの酸化膜や窒化膜
等によって覆われ、外部からの汚れ、水分の浸入を防い
でいる。しかし、半導体チップを外部回路と接続するた
めに設けた電極部分（以下パッド部分と称する。）は電
気的導通のため部用している。通常はアルミニウムで構
成されている前記パッド部分は水分等によって腐食され
ることがあシ、半導体装置の信頼性上問題となっていた
。Generally, the surface of a semiconductor chip is covered with a silicon oxide film, a nitride film, etc. to prevent dirt and moisture from entering from the outside. However, the electrode portion (hereinafter referred to as a pad portion) provided for connecting the semiconductor chip to an external circuit is used for electrical continuity. The pad portion, which is usually made of aluminum, is prone to corrosion due to moisture or the like, which poses a problem in terms of reliability of the semiconductor device.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

そこで、耐食性に乏しいパッド部分、例えば、アルミニ
ウムパッド部分を保護すべく、ワイヤボンディング後に
化成処理によシアルミニクムパッド表面に耐食性の無孔
性アルミナを形成する方法や、ＣＶＤ法やスパッタリン
グ法等によって電気絶縁性の金属酸化膜で覆う方法が知
られている。Therefore, in order to protect pad parts with poor corrosion resistance, for example, aluminum pad parts, there are methods of forming corrosion-resistant non-porous alumina on the surface of the sialuminium pad through chemical conversion treatment after wire bonding, CVD method, sputtering method, etc. A method of covering with an electrically insulating metal oxide film is known.

しかし、化成処理扛陽極酸化処理で湿式処理でろるため
半導体装置の諸特性の経時変化を促し、その信頼性を低
下させる欠点があった。また、チ。However, since the chemical conversion treatment and the anodic oxidation treatment are wet-processed, the characteristics of the semiconductor device tend to change over time, resulting in a reduction in its reliability. Also, Chi.

ブマウント、ポンディング後に水分にさらす処理はチッ
プマウント材や、パッケージ部材からのイオン性不純物
溶出を促してチップに好ましくない。Exposure to moisture after mounting or pounding is unfavorable for the chip, as it promotes the elution of ionic impurities from the chip mounting material and package members.

ＣＶＤ法やスバ、クリング法では処理温度が高温過ぎて
半導体装置の組立に使用する樹脂や低融点ろう材の融点
を越えるので使用できないか、あるいは半導体装置の諸
特性を劣化させてしまう。In the CVD method, Suba, and Kling method, the processing temperature is too high and exceeds the melting point of the resin or low melting point brazing filler metal used for assembling the semiconductor device, so it cannot be used or the various characteristics of the semiconductor device deteriorate.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点を解決する為に本発明では、金属線ｉＫよっ
て結線後に、水蒸気により半導体チップ上の電極表面に
水和酸化物を形成するのである。In order to solve the above-mentioned problems, the present invention forms a hydrated oxide on the electrode surface on the semiconductor chip using water vapor after connecting the metal wire iK.

〔実施例〕〔Example〕

以下本発明を実施例を用いて説明する。 The present invention will be explained below using examples.

第１図は本発明の一実施例である半導体装置の製造方法
を示す断面図である。同図において、素子の形成を終え
たシリコン基板１０表面にシリコン酸化膜２が形成され
、この上にアルミニウムパッド３とアルミニウム配朦４
が形成され、これらの上ＫＣＶＤシリコン酸化膜や窒化
膜などの表面保ｌｌ！５がアルミニウムパッド３上の一
部を除いて全面的に形成される。これらは公知の製造方
法で製造することができる。アルミニウムパッド３に。FIG. 1 is a sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. In the figure, a silicon oxide film 2 is formed on the surface of a silicon substrate 10 on which elements have been formed, and an aluminum pad 3 and an aluminum pattern 4 are formed on the silicon oxide film 2.
is formed, and the surface of KCVD silicon oxide film or nitride film is formed on top of these. 5 is formed over the entire surface except for a portion on the aluminum pad 3. These can be manufactured by known manufacturing methods. to aluminum pad 3.

超音波ポンディング法ではアルミニウムや銅など、熱圧
着ポンディング法では金の細線６を固着する。In the ultrasonic bonding method, a thin wire 6 of aluminum, copper, etc. is fixed, and in the thermocompression bonding method, a thin wire 6 of gold is fixed.

ＴＡＢ（Ｔａｐｅ、Ａｕｔｍａｔｅｄ　　Ｂｏｎｄｉｎ
ｇ）０：）場合には、銅のビームリード８を第２図の断
面図に物が得られる。アルミニウムの場合には前記水和
酸化物の組成構造は明かではないが、ベーマイト被膜と
推定される。金属細線としてアルミニウムをもちいれば
この細線の表面もアルミナとなシ、耐湿性はさらに向上
する。蒸気は純水ｆ：１００’ｃ以上に加熱したものを
用いれば効果はあるが一定の厚みの水和酸化物を得るに
は時間がかかる。過飽和蒸気のほうが短時間で所定の被
膜厚みを得ることができる。蒸気発生装置は公知のボイ
ラー等でよく、蒸気中に不純物、特にイオン性の不純物
を含まないようにステンレス材料を使用するなど使用材
料に留意する。生成する被膜の速度や無孔性に強く影響
を与えるからである。水蒸気は吹き性に好影響を与える
。蒸気雰囲気にさらす際、シリコン基板側は蒸気が結露
して半導体チップに水分が作用することのないように１
ｏｏｒ以上の温度に維持しておく。組立に使用している
材料、例えば、樹脂材料は耐熱温度が低めのでモールド
製品に適用する場合にはリードフレームのｉｔ加熱テー
ブル上をすべらして搬送できるので従来の製造工程に蒸
気処理工程を付加するだけでよい。TAB (Tape, Automated Bondin)
g) In the case of 0:), a copper beam lead 8 as shown in the cross-sectional view of FIG. 2 is obtained. In the case of aluminum, the compositional structure of the hydrated oxide is not clear, but it is presumed to be a boehmite film. If aluminum is used as the thin metal wire, the surface of the thin wire will also be alumina, further improving its moisture resistance. Steam heated to pure water f: 100'c or more is effective, but it takes time to obtain a hydrated oxide of a certain thickness. Supersaturated steam can provide a predetermined coating thickness in a shorter time. The steam generator may be a known boiler or the like, and care should be taken to select materials such as stainless steel so that the steam does not contain impurities, especially ionic impurities. This is because it strongly influences the speed and non-porosity of the film formed. Water vapor has a positive effect on blowability. When exposing the silicon substrate to a steam atmosphere, the silicon substrate side should be placed 1 to prevent the steam from condensing and moisture acting on the semiconductor chip.
Maintain the temperature above oor. Materials used in assembly, such as resin materials, have a low heat resistance, so when applied to molded products, they can be transported by sliding on the IT heating table of the lead frame, so a steam treatment process is added to the conventional manufacturing process. Just do it.

高温水でも耐食効果を期待できるが、高温水は常温の水
に比較して活性度が高く温水中に組立後、特にボンディ
ング後の半製品を漬けるのはチップマウント材や、パッ
ケージ部材からのイオン性不純物溶出を促してチップに
好ましくないばかりか、樹脂材料は膨潤して強度劣化や
特性変動を生じる欠点がある。Corrosion resistance can be expected even with high-temperature water, but high-temperature water has higher activity than room-temperature water, and soaking semi-finished products after assembly, especially after bonding, in hot water can reduce ions from chip mounting materials and package materials. Not only does this promote the elution of sexual impurities, which is undesirable for chips, but the resin material also swells, resulting in deterioration in strength and variation in properties.

本実施例では、４メグオームの純水を使用し、１５０Ｃ
〜１７０Ｃで数分間の処理で数１００オングストローム
の耐湿性の被膜を得た。In this example, 4 megohm pure water is used and 150C
A few 100 angstroms of moisture-resistant coating was obtained after several minutes of treatment at ~170C.

本発明の次の実施例は水蒸気雰囲気に化成化を促進する
薬品を添加した雰囲気としたヰ岬なかでボンディング後
の半製品をさらす方法である。化成化促進剤として弱ア
ルカリ性の薬品があげられる。例えば、アンモニア、ア
ミン、アルコールアミン等である。これらの薬品を水蒸
気雰囲気に〜１チ含ませると被膜の生成速度が早く、化
成化促進剤を使用した場合にはそうでない場合に比較し
て数倍となる。しかし、同時に多孔質化も促進するので
耐食性を劣化させないよう条件を設定しなければならな
いのは当然である。The next embodiment of the present invention is a method in which a semi-finished product after bonding is exposed in a water vapor atmosphere containing a chemical that promotes chemical conversion. Weakly alkaline chemicals can be cited as chemical conversion accelerators. For example, ammonia, amines, alcohol amines, etc. When ~1 g of these chemicals are included in the steam atmosphere, the film formation rate is fast, and when a chemical conversion accelerator is used, the rate is several times faster than when it is not used. However, since it also promotes porosity, it is natural that conditions must be set so as not to deteriorate corrosion resistance.

〔発明の効果〕〔Effect of the invention〕

耐食性のアルミナによって保護されたアルミニウムパッ
ド３は外部からの水分の浸入によって腐食することもな
く、あるいはパッド間にリーク電流が流れてその近傍の
素子の信頼性を劣化させることなく、この領域でのエレ
クトロマイグレーシ百ンの発生が皆無になる。The aluminum pad 3, which is protected by corrosion-resistant alumina, can be used in this region without corroding due to moisture intrusion from the outside or causing leakage current to flow between the pads and deteriorating the reliability of nearby devices. The occurrence of electromigration will be completely eliminated.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本発明の半導体装置の製造方法による半導体
装置の断面図である。第２図は本発明の半導体装置の製
造方法による他の半導体装置の断面図である。 １・・・・・・シリコン基板、２・・・・・・シリコン
酸化膜、３・・・・・・アルミニウムパッド、４・・・
・・・アルミニウム配線、５・・・・・・表面保護膜、
６・・・・・・金属細線、７・・・耐食性のアルミナ、
８・・・・・・ビームリード。 茅　Ｉ　圀 茅　２　図FIG. 1 is a cross-sectional view of a semiconductor device manufactured by the method of manufacturing a semiconductor device of the present invention. FIG. 2 is a sectional view of another semiconductor device manufactured by the method of manufacturing a semiconductor device of the present invention. 1...Silicon substrate, 2...Silicon oxide film, 3...Aluminum pad, 4...
...Aluminum wiring, 5...Surface protection film,
6... Fine metal wire, 7... Corrosion resistant alumina,
8...Beam lead. Kaya I Kuni Kaya 2 Figure

Claims (3)

【特許請求の範囲】[Claims] （１）半導体チップ上の電極に金属細線を接続した後、
前記電極の表面に水和酸化物を作る気体を含む雰囲気に
前記チップをさらす工程を含むことを特徴とする半導体
装置の製造方法。(1) After connecting the thin metal wire to the electrode on the semiconductor chip,
A method for manufacturing a semiconductor device, comprising the step of exposing the chip to an atmosphere containing a gas that forms a hydrated oxide on the surface of the electrode. （２）上記雰囲気が単独の蒸気雰囲気であることを特徴
とする特許請求の範囲第１項に記載の半導体装置の製造
方法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein the atmosphere is a single vapor atmosphere. （３）上記雰囲気が水和酸化物生成促進剤を添加した蒸
気の雰囲気であることを特徴とする特許請求の範囲第１
項に記載の半導体装置の製造方法。(3) Claim 1, wherein the atmosphere is a steam atmosphere containing a hydrated oxide production promoter.
A method for manufacturing a semiconductor device according to section 1.
JP61275912A 1986-11-18 1986-11-18 Manufacture of semiconductor device Granted JPS63128634A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61275912A JPS63128634A (en) 1986-11-18 1986-11-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61275912A JPS63128634A (en) 1986-11-18 1986-11-18 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS63128634A true JPS63128634A (en) 1988-06-01
JPH0546978B2 JPH0546978B2 (en) 1993-07-15

Family

ID=17562157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61275912A Granted JPS63128634A (en) 1986-11-18 1986-11-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63128634A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6472304B2 (en) * 1999-01-23 2002-10-29 Agere Systems Inc. Wire bonding to copper
US20120032354A1 (en) * 2010-08-06 2012-02-09 National Semiconductor Corporation Wirebonding method and device enabling high-speed reverse wedge bonding of wire bonds
EP2444999A4 (en) * 2009-06-18 2012-11-14 Rohm Co Ltd Semiconductor device
JP2017011176A (en) * 2015-06-24 2017-01-12 ローム株式会社 Semiconductor device and semiconductor device manufacturing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116634A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor device
JPS56162844A (en) * 1980-05-19 1981-12-15 Hitachi Ltd Semiconductor device and manufacture thereof
JPS59150460A (en) * 1983-01-31 1984-08-28 Toshiba Corp Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116634A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor device
JPS56162844A (en) * 1980-05-19 1981-12-15 Hitachi Ltd Semiconductor device and manufacture thereof
JPS59150460A (en) * 1983-01-31 1984-08-28 Toshiba Corp Manufacture of semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6472304B2 (en) * 1999-01-23 2002-10-29 Agere Systems Inc. Wire bonding to copper
EP2444999A4 (en) * 2009-06-18 2012-11-14 Rohm Co Ltd Semiconductor device
US9780069B2 (en) 2009-06-18 2017-10-03 Rohm Co., Ltd. Semiconductor device
US10163850B2 (en) 2009-06-18 2018-12-25 Rohm Co., Ltd. Semiconductor device
US20120032354A1 (en) * 2010-08-06 2012-02-09 National Semiconductor Corporation Wirebonding method and device enabling high-speed reverse wedge bonding of wire bonds
JP2017011176A (en) * 2015-06-24 2017-01-12 ローム株式会社 Semiconductor device and semiconductor device manufacturing method

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