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JPS6289833U - - Google Patents

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Publication number
JPS6289833U
JPS6289833U JP18089185U JP18089185U JPS6289833U JP S6289833 U JPS6289833 U JP S6289833U JP 18089185 U JP18089185 U JP 18089185U JP 18089185 U JP18089185 U JP 18089185U JP S6289833 U JPS6289833 U JP S6289833U
Authority
JP
Japan
Prior art keywords
circuit
circuit block
signal
component
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18089185U
Other languages
Japanese (ja)
Other versions
JPH0453050Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985180891U priority Critical patent/JPH0453050Y2/ja
Publication of JPS6289833U publication Critical patent/JPS6289833U/ja
Application granted granted Critical
Publication of JPH0453050Y2 publication Critical patent/JPH0453050Y2/ja
Expired legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の直流バイアス回路の一実施例
を示す回路図、第2図、第3図は同回路の要部を
説明するための説明図、第4図は従来の直流バイ
アス回路の基本的な構成を示す回路図である。 1……信号発生回路、2……回路ブロツク、R
,R,R……抵抗、I……入力端子、O…
…出力端子。
Figure 1 is a circuit diagram showing one embodiment of the DC bias circuit of the present invention, Figures 2 and 3 are explanatory diagrams for explaining the main parts of the circuit, and Figure 4 is a circuit diagram of a conventional DC bias circuit. FIG. 2 is a circuit diagram showing the basic configuration. 1...Signal generation circuit, 2...Circuit block, R
1 , R 2 , R 3 ...Resistance, I...Input terminal, O...
...Output terminal.

Claims (1)

【実用新案登録請求の範囲】 (1) 交流信号及び直流成分を伝送する回路ブロ
ツクの入力端子に、抵抗を介して、直流成分を有
する交流信号が印加されるように構成し、かつ前
記回路ブロツクの出力端子と第1の電源および出
力端子と第2の電源の間にそれぞれ終端抵抗を接
続したことを特徴とする直流バイアス回路。 (2) 交流信号および直流成分を伝送する回路ブ
ロツクがフイルタ回路から構成されていることを
特徴とする実用新案登録請求の範囲第1項に記載
の直流バイアス回路。
[Claims for Utility Model Registration] (1) A circuit block configured such that an AC signal having a DC component is applied to an input terminal of a circuit block that transmits an AC signal and a DC component via a resistor, and said circuit block transmits an AC signal and a DC component. A DC bias circuit characterized in that a terminating resistor is connected between the output terminal and the first power supply, and between the output terminal and the second power supply, respectively. (2) The DC bias circuit according to claim 1, wherein the circuit block for transmitting AC signals and DC components is composed of a filter circuit.
JP1985180891U 1985-11-25 1985-11-25 Expired JPH0453050Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985180891U JPH0453050Y2 (en) 1985-11-25 1985-11-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985180891U JPH0453050Y2 (en) 1985-11-25 1985-11-25

Publications (2)

Publication Number Publication Date
JPS6289833U true JPS6289833U (en) 1987-06-09
JPH0453050Y2 JPH0453050Y2 (en) 1992-12-14

Family

ID=31125257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985180891U Expired JPH0453050Y2 (en) 1985-11-25 1985-11-25

Country Status (1)

Country Link
JP (1) JPH0453050Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57146439U (en) * 1981-03-09 1982-09-14
JPS58517U (en) * 1981-06-18 1983-01-05 昭和電線電纜株式会社 delay line module

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58517B2 (en) * 1975-10-06 1983-01-06 住友化学工業株式会社 Golden gallium noseizohouhou

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57146439U (en) * 1981-03-09 1982-09-14
JPS58517U (en) * 1981-06-18 1983-01-05 昭和電線電纜株式会社 delay line module

Also Published As

Publication number Publication date
JPH0453050Y2 (en) 1992-12-14

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