JPS6257470U - - Google Patents
Info
- Publication number
- JPS6257470U JPS6257470U JP14573785U JP14573785U JPS6257470U JP S6257470 U JPS6257470 U JP S6257470U JP 14573785 U JP14573785 U JP 14573785U JP 14573785 U JP14573785 U JP 14573785U JP S6257470 U JPS6257470 U JP S6257470U
- Authority
- JP
- Japan
- Prior art keywords
- input
- series
- diode
- bias voltage
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Picture Signal Circuits (AREA)
Description
第１図は本考案のクランプ回路の一実施例を示
す回路図、第２図は第１図の回路動作を説明する
波形図、第３図は従来のクランプ回路を示す回路
図、第４図及び第５図は第３図の回路動作を説明
する波形図である。
２１……入力回路、２２……出力端子、２３，
２４……コンデンサ、２５，２６……抵抗、２７
……バイアス回路、２８，２９……ダイオード。
Fig. 1 is a circuit diagram showing an embodiment of the clamp circuit of the present invention, Fig. 2 is a waveform diagram explaining the circuit operation of Fig. 1, Fig. 3 is a circuit diagram showing a conventional clamp circuit, Fig. 4 and FIG. 5 is a waveform diagram illustrating the circuit operation of FIG. 3. 21...Input circuit, 22...Output terminal, 23,
24... Capacitor, 25, 26... Resistor, 27
...Bias circuit, 28, 29...diode.
Claims (1)
プ回路を直列接続する構成とするものであつて、
２つのクランプ回路は、充電時定数の異なる第１
、第２のコンデンサを前記入出力端子間に直列接
続し、その接続点とアース点又は電源間に抵抗を
接続し、同接続点とバイアス電圧供給回路間に第
１のダイオードを接続し、前記出力端子と前記バ
イアス電圧供給回路間に第２のダイオードを接続
して構成されることを特徴とするクランプ回路。 It has a configuration in which two clamp circuits are connected in series between input and output terminals through which signals are transmitted,
The two clamp circuits have different charging time constants.
, a second capacitor is connected in series between the input and output terminals, a resistor is connected between the connection point and the ground point or the power supply, a first diode is connected between the connection point and the bias voltage supply circuit, and the A clamp circuit comprising a second diode connected between an output terminal and the bias voltage supply circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14573785U JPS6257470U (en) | 1985-09-26 | 1985-09-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14573785U JPS6257470U (en) | 1985-09-26 | 1985-09-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6257470U true JPS6257470U (en) | 1987-04-09 |
Family
ID=31057549
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14573785U Pending JPS6257470U (en) | 1985-09-26 | 1985-09-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6257470U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0392870U (en) * | 1989-10-27 | 1991-09-20 |
-
1985
- 1985-09-26 JP JP14573785U patent/JPS6257470U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0392870U (en) * | 1989-10-27 | 1991-09-20 |
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