JPS627115A - Formation of single crystalline thin film - Google Patents
Formation of single crystalline thin filmInfo
- Publication number
- JPS627115A JPS627115A JP14457285A JP14457285A JPS627115A JP S627115 A JPS627115 A JP S627115A JP 14457285 A JP14457285 A JP 14457285A JP 14457285 A JP14457285 A JP 14457285A JP S627115 A JPS627115 A JP S627115A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon film
- seed
- silicon
- single crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims description 12
- 230000015572 biosynthetic process Effects 0.000 title claims 2
- 239000013078 crystal Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000010408 film Substances 0.000 claims description 67
- 239000004065 semiconductor Substances 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 abstract description 43
- 239000010703 silicon Substances 0.000 abstract description 43
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 40
- 238000000137 annealing Methods 0.000 abstract description 8
- 238000010438 heat treatment Methods 0.000 abstract description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 3
- 238000010894 electron beam technology Methods 0.000 description 9
- 239000007790 solid phase Substances 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- -1 silicon ions Chemical class 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、絶縁膜上に、半導体単結晶薄膜を形成する方
法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for forming a semiconductor single crystal thin film on an insulating film.
(従来技術とその問題点)
絶縁膜上に、単結晶薄膜いわゆるSOI(Semico
n−ductor on In5ulator)膜を形
成する場合、絶縁膜の一部に窓を開け、単結晶基板から
の結晶の情報を伝えるためのいわゆるシードを設けた方
が、SOI膜の結晶方位を制御する場合には効果的であ
る。しかしながら、シードを使ってSOI膜を形成する
場合、シード部とそれ以外のS(M構造を有する領域と
において、放熱速度が異なるために、−回でアニールす
る場合にはそれぞれのアニール条件の重なり合う狭い条
件のみでしかSOI結晶が形成できないという問題があ
った。(早藤(Y、Hayafuji、)et al、
エレクトロケミカルソサイエティ(Electroch
emical 5ociety)Extended a
bstract of 163rd 5ociety
Metting 83−!(1983)P574)例え
ば電子ビームアニールではそれぞれアニール条件が数%
程度しか重ならずマージンが、非常に狭かった。さらに
、シードを用いたSOI試料においては、シード近傍は
、冷却速度が変化したり、また、膜の歪の大きな領域で
もあり、そのために結晶成長を困難にしている。実際、
シード近傍では、サブグレインが発生し易く、また、S
OI膜中に、ボイド(穴)が発生するという問題もある
。(Prior art and its problems) Single crystal thin film so-called SOI (Semiconductor
When forming a n-ductor on insulating film, it is better to open a window in a part of the insulating film and provide a so-called seed to transmit crystal information from the single crystal substrate to control the crystal orientation of the SOI film. Effective in some cases. However, when forming an SOI film using a seed, the heat dissipation rate is different between the seed part and the other region having the S (M structure). There was a problem that SOI crystals could only be formed under narrow conditions. (Y, Hayafuji, et al.
Electrochemical Society (Electroch)
chemical 5ociety) Extended a
bstruct of 163rd 5ociety
Metting 83-! (1983) P574) For example, in electron beam annealing, the annealing conditions are several percent
The margins were very narrow as they only overlapped to a certain extent. Furthermore, in an SOI sample using a seed, the cooling rate changes in the vicinity of the seed, and the film is also a region with large strain, which makes crystal growth difficult. actual,
Near the seed, subgrains are likely to occur, and S
There is also the problem that voids (holes) are generated in the OI film.
(発明の目的)
本発明は、上記のような問題点を解決し、 SOI膜を
溶融・固化し成長させる場合、SOI結晶の形成条件を
広げるとともに、膜中にボイドやサブグレインの発生が
ない単結晶薄膜の形成法を提供するものである。(Objective of the Invention) The present invention solves the above-mentioned problems, expands the conditions for forming SOI crystals when melting and solidifying an SOI film, and eliminates the generation of voids and subgrains in the film. A method for forming a single crystal thin film is provided.
(発明の構成)
本発明は、少なくとも表面に半導体単結晶層を有する基
板上に一部に窓を開けた絶縁膜を形成し、窓の部分赤ら
絶縁膜上に基板と連続した微小半導体単結晶領域をまず
形成し、次に前記試料上に前記微小単結晶領域に一部分
が重なるように半導体薄膜を形成し、前記微小単結晶領
域をシードとして絶縁膜上に付着させた半導体薄膜を溶
融・固化し、絶縁膜上に、半導体単結晶薄膜を形成する
ことを特徴とする単結晶薄膜形成法である。(Structure of the Invention) The present invention forms an insulating film with a window partially formed on a substrate having a semiconductor single-crystal layer on at least the surface, and forms a micro semiconductor layer continuous with the substrate on the insulating film in the window portion. A crystal region is first formed, and then a semiconductor thin film is formed on the sample so as to partially overlap the micro single crystal region, and the semiconductor thin film deposited on the insulating film is melted using the micro single crystal region as a seed. This is a single crystal thin film forming method characterized by solidifying and forming a semiconductor single crystal thin film on an insulating film.
(構成の詳細な説明)
の変化の大きい領域の影響を除く。次に前記微小領域を
基にして、結晶成長を行なうがSOI竺域のみを溶融・
固化し成長させるので5OIa域でのアニール条件にあ
わせるだけでよく、従来に較べてマージンが広くとれる
。従って、サブグレインやボイドの発生も除去できる。(Detailed explanation of the configuration) Excludes the influence of areas with large changes. Next, crystal growth is performed based on the minute region, but only the SOI vertical region is melted and
Since it is solidified and grown, it is only necessary to match the annealing conditions in the 5OIa region, and a wider margin can be obtained compared to the conventional method. Therefore, the occurrence of subgrains and voids can also be eliminated.
(実施例)
以下、本発明の実施例を基に、詳細に説明する。第1図
には、本実施例用いた試料の作製方法を示す。第1図(
a)に示す様に、単結晶シリコン基板1上に熱酸化等の
方法でlpm厚みの酸化膜2を成長させ、酸化膜2の一
部に、ストライプ状に窓を開け、その窓の内部を、選択
的に単結晶シリコンを成長させた。これが、いわゆるシ
ード3となる。次に、シード3を含む様に、0.3pm
厚みのシリコン膜4をストライプ状に付着し、この領域
を単結晶化する。この時、シリコン膜4の幅11として
は、5〜20pm程度とした。シリコン膜4を結晶化す
る方法としては、固相成長法を用いた。シリコシ膜4″
を付着する前に〜lXl0−8Pa程度の高真空中で、
シード3上に付着した自然酸化膜を、加熱処理(約11
00°C)により除去し、基板表面を清浄化した。次に
〜I X 1O−7Paの真空度で、基板温一度゛35
0°Cで80゜4pm厚みの非晶質のシリコン膜を付着
した後、シリコンイオンt I X 10201/am
3の濃度になる様に、シリコン膜中にイオン注入を行な
った。次に、前記シリコン膜を、輻811mのストライ
プ状に加工した後、600°Cで9時間熱処理番行なっ
た。この熱処理によりシリコン膜4は、単結晶成長−し
ていることが、電子千′ヤネリング法を用いて確認で′
きた。固相成長法を用いる場合、イオン注入するイオン
を今回シリコンイオンを用いたが、リンイオンを用いる
と、同様の熱処理条件でも20pm程度までは、単結晶
成長が可能である。(Examples) Hereinafter, the present invention will be described in detail based on Examples. FIG. 1 shows the method for preparing the sample used in this example. Figure 1 (
As shown in a), an oxide film 2 with a thickness of lpm is grown on a single crystal silicon substrate 1 by a method such as thermal oxidation, a striped window is formed in a part of the oxide film 2, and the inside of the window is exposed. , selectively grown single crystal silicon. This becomes the so-called seed 3. Next, add 0.3pm to include seed 3.
A thick silicon film 4 is deposited in the form of a stripe, and this region is made into a single crystal. At this time, the width 11 of the silicon film 4 was approximately 5 to 20 pm. A solid phase growth method was used to crystallize the silicon film 4. Silikoshi membrane 4″
In a high vacuum of ~lXl0-8Pa before attaching the
The natural oxide film deposited on the seed 3 is heated (approximately 11
00°C) to clean the substrate surface. Next, with a vacuum degree of ~I x 1O-7Pa, the substrate temperature was
After depositing an amorphous silicon film with a thickness of 80° and 4 pm at 0°C, silicon ions t I X 10201/am
Ions were implanted into the silicon film to a concentration of 3. Next, the silicon film was processed into a stripe shape with a radius of 811 m, and then heat treated at 600° C. for 9 hours. It was confirmed using the electron tunneling method that the silicon film 4 was grown as a single crystal by this heat treatment.
came. When using the solid phase growth method, silicon ions were used as the ions to be implanted, but if phosphorus ions are used, single crystal growth is possible up to about 20 pm even under similar heat treatment conditions.
一方、シリコン膜4を単結晶化するもう一つの方法とし
て、電子ビームアニール法も行なった。多結晶シリコン
を付着後、幅15pmのストライプ状に加工し、シリコ
ン膜4を形成した。次に加速電圧15kV、ビーム電流
83mAJ走査速度83cm/sec、基板温度600
°Cの条件で、線状電子ビーム(ビーム寸法長辺4mm
X短辺0.3mm)を用いて、シリコン膜4を溶融後詰
晶化した。この時、線状電子ビームは、その短辺方向に
走査し、かつ、走査方向はシードの長辺方向と同じ向き
にした。なお、前記の方法によりシリコン膜4を結晶化
する場合には、結晶化後め膜の平坦性を保つために、酸
化膜と窒化膜の2層をキャップ膜として使用し、アニー
ル後、キャップ膜は除去した。シリコン膜4を結晶化す
る場合、前記のように固相成長を用いる場合には、ボイ
ドの福生はない。一方、電子ビームを用いて結晶化を行
なう場合、電子ビームの走査方向がシードと平行であり
、かつ、成長するシリコン層め幅が、15戸m程度と小
さいために、溶融シリコンが同化する時の溶融シリコン
の移動量は少なく、ボイドの発生は見られなかった。On the other hand, as another method for making the silicon film 4 into a single crystal, an electron beam annealing method was also performed. After depositing polycrystalline silicon, it was processed into stripes with a width of 15 pm to form a silicon film 4. Next, the acceleration voltage was 15 kV, the beam current was 83 mAJ, the scanning speed was 83 cm/sec, and the substrate temperature was 600.
A linear electron beam (beam dimension long side 4 mm) was
After melting, the silicon film 4 was packed and crystallized using the X short side (0.3 mm). At this time, the linear electron beam was scanned in the short side direction thereof, and the scanning direction was set to be the same as the long side direction of the seed. Note that when the silicon film 4 is crystallized by the method described above, two layers of an oxide film and a nitride film are used as a cap film in order to maintain the flatness of the film after crystallization, and after annealing, the cap film is has been removed. When the silicon film 4 is crystallized using solid phase growth as described above, there are no voids. On the other hand, when crystallization is performed using an electron beam, the scanning direction of the electron beam is parallel to the seed, and the width of the silicon layer to be grown is as small as about 15 meters, so when the molten silicon is assimilated. The amount of molten silicon transferred was small, and no voids were observed.
次に、第1図(b)に示す様に、シリコン−膜4上に、
ストライプ状に、0.4pm厚みのシリコン膜6を付着
した。幅12は数百pmていどとした。この時、シリコ
ン膜6の付着条件としては、シリコン膜4上にはエピタ
キシャル成長し、酸化膜2上には、多結晶となる様な条
件を用いた。たとえば通常のSiエピタキシャル成長の
条件でよい。あるいは基板を5006C程度加熱してお
いてSiのMBEを行ってもよい。又は、シリコン膜6
は、非晶質シリコンを付着し、その後、600°C程度
の低温で熱処理を行ない、固相成長によりシリコン膜4
上に、単結晶を成長させても同様な結果が得られた。こ
の時、酸化膜2上に付着したシリコン膜は、多結晶とな
った。次に、この試料上に、全面にわたりキャップ膜を
付着した。Next, as shown in FIG. 1(b), on the silicon film 4,
A silicon film 6 having a thickness of 0.4 pm was deposited in a striped pattern. The width 12 was several hundred pm. At this time, the conditions for depositing the silicon film 6 were such that the silicon film 4 was epitaxially grown and the oxide film 2 was polycrystalline. For example, normal Si epitaxial growth conditions may be used. Alternatively, MBE of Si may be performed after heating the substrate to about 5006C. Or silicon film 6
In this method, amorphous silicon is deposited, and then heat treatment is performed at a low temperature of about 600°C to form a silicon film 4 by solid phase growth.
Similar results were obtained when a single crystal was grown on top of the material. At this time, the silicon film deposited on the oxide film 2 became polycrystalline. Next, a cap film was deposited over the entire surface of this sample.
キャップ膜としては、酸化膜と窒化膜の2層構造のもの
を使用した。The cap film used had a two-layer structure of an oxide film and a nitride film.
次に、この様な試料を線状電子ビームを用いて、シリコ
ン膜6を溶融・固化し、結晶成長を行なった。Next, the silicon film 6 of such a sample was melted and solidified using a linear electron beam, and crystal growth was performed.
電子ビームアニール条件としては、加速電圧15kV、
ビーム電流77mA、ビーム長4mm、ビーム幅0.3
mm走査速度84cm/see、基板温度600°Cを
用いた。また、シリコン膜6の成長方向は、シード3に
垂直方向であり、かつ、シリコン膜6のシード3側から
成長させた。この時、シリコン膜6のうち、シリコン膜
4上のものは、すでに単結晶化しているために(単結晶
領域8)、シリコン膜6は、酸化膜2上にある多結晶の
もののみ一1溶融・再結晶化すれば良い。従って、電子
ビームのアニール条件としては、酸化膜2上の輻12の
部分のシリコンの溶融条件を用いれば良く、従来行なっ
ていた様に、シード部を同時に溶融する必要がなく、本
発明の方法により、SOIの成長条件のマージンが広が
ることになる。さらにまた、通常、ボイ°ドが発生する
領域は、シリコン膜4の領域であり、シリコン膜6を成
長させる場合には、シリコン膜4は全て溶融させる必要
はなくシリコン膜6との接触部分が溶融すればよい。つ
まり、熱の冷却の不均一な領域は溶融しないために、シ
リコン膜6にはボイドの発生は見らムを用いたとき特に
有効である。The electron beam annealing conditions include an accelerating voltage of 15 kV,
Beam current 77mA, beam length 4mm, beam width 0.3
A scanning speed of 84 cm/see and a substrate temperature of 600°C were used. Further, the growth direction of the silicon film 6 was perpendicular to the seed 3, and the silicon film 6 was grown from the seed 3 side. At this time, since the silicon film 6 on the silicon film 4 is already monocrystalline (single crystal region 8), the silicon film 6 is only polycrystalline on the oxide film 2. All you have to do is melt and recrystallize. Therefore, as the electron beam annealing conditions, it is sufficient to use the conditions for melting the silicon at the radius 12 on the oxide film 2, and there is no need to melt the seed part at the same time as in the conventional method. This will widen the margin for SOI growth conditions. Furthermore, the region where voids usually occur is the region of the silicon film 4, and when growing the silicon film 6, it is not necessary to melt all of the silicon film 4, and only the portion in contact with the silicon film 6 can be grown. Just melt it. In other words, since areas where heat is not uniformly cooled do not melt, the generation of voids in the silicon film 6 is particularly effective when using a mirror.
(発明の効果)
結晶化しないために、SOIの成長条件が広がり、SO
I成長の再現性が向上した。(Effect of the invention) Because it does not crystallize, the growth conditions for SOI are expanded, and SOI
The reproducibility of I growth was improved.
第1図(a)、 (b)は、本発明の実施例を示す試料
の断面図である。
1・・・単結晶シリコン基板
2・・・酸化膜
3・・・シード
4・・・シリコン膜
6・・・シリコン膜
8・・・単結晶領域
工業技術院長
等々力達
オ 1 口FIGS. 1(a) and 1(b) are cross-sectional views of a sample showing an example of the present invention. 1...Single crystal silicon substrate 2...Oxide film 3...Seed 4...Silicon film 6...Silicon film 8...Tatsuo Todoroki, Director of the Institute of Industrial Science and Technology, Single Crystal Area
Claims (1)
に窓を開けた絶縁膜を形成し、窓の部分から絶縁膜上に
基板と連続した微小半導体単結晶領域をまず形成し、次
に前記、試料上に前記微小単結晶領域に一部分が重なる
ように半導体薄膜を形成し、前記微小単結晶領域をシー
ドとして絶縁膜上に付着させた半導体薄膜を溶着・固化
し絶縁膜上に、半導体単結晶薄膜を形成することを特徴
とする単結晶薄膜形成法。An insulating film with a window partially opened is formed on a substrate having a semiconductor single crystal layer on at least the surface, a micro semiconductor single crystal region continuous with the substrate is first formed on the insulating film from the window part, and then the , a semiconductor thin film is formed on the sample so as to partially overlap the micro single crystal region, and the semiconductor thin film deposited on the insulating film is welded and solidified using the micro single crystal region as a seed, and the semiconductor mono film is deposited on the insulating film. A single crystal thin film formation method characterized by forming a crystal thin film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14457285A JPS627115A (en) | 1985-07-03 | 1985-07-03 | Formation of single crystalline thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14457285A JPS627115A (en) | 1985-07-03 | 1985-07-03 | Formation of single crystalline thin film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS627115A true JPS627115A (en) | 1987-01-14 |
Family
ID=15365309
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14457285A Pending JPS627115A (en) | 1985-07-03 | 1985-07-03 | Formation of single crystalline thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS627115A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS586121A (en) * | 1981-07-02 | 1983-01-13 | Seiko Epson Corp | Semiconductor substrate |
JPS5893220A (en) * | 1981-11-30 | 1983-06-02 | Toshiba Corp | Preparation of semiconductor single crystal film |
-
1985
- 1985-07-03 JP JP14457285A patent/JPS627115A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS586121A (en) * | 1981-07-02 | 1983-01-13 | Seiko Epson Corp | Semiconductor substrate |
JPS5893220A (en) * | 1981-11-30 | 1983-06-02 | Toshiba Corp | Preparation of semiconductor single crystal film |
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