JPS6257170A - Time base compressing and expanding device for magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To simplify the constitution of a circuit by curtailing the number of parts, by executing a compression and an expansion of a time base by one piece of circuit using an analog delay element. CONSTITUTION:At the time of recording, two kinds of information signals are selected and outputted separately to two pieces of transmission lines by a switching means S1, also the second frequency is selected to (n) times of the first frequency, and a time base compression is executed by a time base converting circuit having CCDs 61-64 being two pairs of analog delay elements whose one pair consists of two pieces per each transmission line. Accordingly, by a switching means S3, two kinds of information signals compress the time base to 1/n times, and also a sequential signal formed by being synthesized in time series alternately is fetched. On the other hand, at the time of reproduction, the sequential signal is selected and outputted to two pieces of transmission lines, respectively, by the means S1, also the second frequency is selected to 1/n times of the first frequency, a time base expansion of (n) times is executed by the time base converting circuit, and two kinds of information signals which have been returned to the original time base from the switching means S3 are separated and outputted to a terminal 11.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a time axis compression/expansion device for a recording/reproducing device.
In particular, in a magnetic recording/reproducing device, two information axis signals are compressed in the time axis and then recorded as signals sequentially, and during playback, the sequential signals are expanded in the time axis to separate the original two information signals. This invention relates to a device for axial compression and expansion.

Conventional technology Two information signals whose time axes have been expanded are synthesized alternately in time series at regular intervals to create a sequential signal, which is modulated using a predetermined modulation method and then recorded on a recording medium. As a recording and reproducing method, the time axis of the sequential signal obtained by demodulating the signal is extended, thereby returning it to the original time axis, and obtaining two separated information signals. In some broadcasting camera-integrated VTRs and the like, a color signal recording and reproducing system of a component recording type in which a luminance signal and a color signal are recorded on separate tracks is used.

This device is transmitted simultaneously with the luminance signal schematically shown in FIG. 8(A), and the two signals schematically shown in FIG. 8(B) and (D)
After compressing the time axes of the species color difference signals (R-Y) and (B-Y) to 1/2, they are synthesized alternately in time series as shown schematically in the same figure (C). Sequential signals. 9th
Figure (A) shows the waveform of the above luminance signal, and Figure (B) shows the waveform of the above sequential signal, where the start point of time axis compression is located 5.3 μs after the leading edge of the horizontal synchronization signal H8. .

Thereafter, the above sequential signals are frequency modulated and then recorded on the magnetic tape by a rotating head.

Further, during this recording, a luminance signal frequency-modulated by another rotary head is recorded simultaneously with the frequency-modulated sequential signal (FM sequential signal@) and forming a separate track.

During reproduction, two recording track groups are scanned separately and simultaneously, and the above-mentioned FM sequential signal and FM luminance signal are reproduced separately and simultaneously.

After the above-mentioned FM sequential signal is FM demodulated, the time axis is expanded twice and returned to the original time axis, and the reproduced color difference signals RY and BY are extracted in parallel by being separated.

Problems to be Solved by the Invention However, in the above-mentioned conventional magnetic recording and reproducing apparatus, the recording system is provided with means for sequentially compressing the two types of color difference signals in the time axis, expanding the reproduced signal in the time axis, and , it is necessary to provide a means for separating two types of color difference signals in the reproduction system, which requires a large number of parts, and the circuit configuration is complex and expensive because it uses digital memory to compress and expand the time axis. There were some problems.

SUMMARY OF THE INVENTION Therefore, the present invention provides a time axis compression/expansion device for a recording/reproducing device that solves the above problems by using an analog delay element to perform both time axis compression and time axis expansion in one circuit. With the goal.

Means for Solving the Problems The time axis compression/expansion device of the recording/reproducing device according to the present invention is as follows:
a first switching means for selectively outputting one of the two types of information signals and the reproduction sequential signal to the two transmission paths; and after writing the signal from the first switching means based on a clock pulse of a first frequency. A time base conversion circuit having a total of two sets of analog delay elements, two for each transmission line read out based on the clock pulse of the second frequency, and a readout output signal of the two analog delay elements of each set. a second switching means for selectively outputting the output signal of the second switching means; a third switching means for selectively outputting the output signal of the second switching means; and a third switching means for selectively outputting the output signal of the second switching means; It consists of a delay circuit that delays an input signal or an output signal by a certain period of time relative to the input signal or output signal.

At the time of action recording, the first switching means selectively outputs two types of information signals to two transmission paths separately, and the second
frequency is n times the first frequency (n is a natural number)
is selected, and the time base conversion circuit performs time base compression by a factor of 1/n. As a result, the third switching means J: compresses the time axis of the two types of information signals to 1/n times, and sequentially extracts signals obtained by alternately synthesizing them in time series. On the other hand, during reproduction, the first switching means selectively outputs the sequential signals to the two transmission paths, and the second frequency is selected to be 1/n times the first frequency, and the time axis is selected. The conversion circuit performs n-fold time axis expansion. As a result, the two types of information signals returned to the original time axis by the second switching means are separated and output.

Embodiments Hereinafter, each embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block system diagram of a first embodiment of the apparatus of the present invention. In the figure, color difference signals R-Y and B-Y, which are examples of two types of information signals, are input to input terminals 1 and 2, respectively, while sequential signals, which will be described later, are input to input terminal 3. . Color difference signal R-Y.

B-Y is supplied to contacts R of switches 4 and 5 constituting the first switching means S1, and the above sequential signals are supplied to contacts P of switches 4 and 5, respectively. Here, the time axis compression/expansion apparatus of the present invention is used, for example, in a recording/reproducing apparatus having a configuration as shown in FIG. 7. First, the configuration of this recording/reproducing apparatus will be explained.

In FIG. 7, during recording, a luminance signal is input to the input terminal 20, and color difference signals R-Y, B- are input to the input terminals 21 and 22.
Y comes and goes. During recording, the luminance signal that has entered the input terminal 20 is supplied to the synchronizing signal separation circuit 24 through the switch 23 connected to the contact REC side, while being supplied to the FM modulator 25 . Recording amplifier 26. During recording, the signal is supplied to the rotary head 28 through the switch 27 connected to the contact REC side. On the other hand, the color difference signal R- inputted to the input terminal 21
Y is supplied to the synchronization signal addition circuit 29, where it is added with the horizontal synchronization signal from the synchronization signal separation circuit 24, and then input to the input terminal 1 of the time axis compression/expansion circuit 30, which is the main part of the present invention.
is supplied to Also, the color difference signal B- from the input terminal 22
Y is supplied to the input terminal 2 of the time axis compression/expansion circuit 30.

On the other hand, the horizontal synchronization signal taken out from the synchronization signal separation circuit 24 is supplied to a clock generator 31 and a control pulse generator 32, respectively. A clock generator 31 generates a high frequency clock that is phase-synchronized with the horizontal synchronization signal and supplies it to a control pulse generator 32 and a clock controller 33, respectively. The control pulse generator 32 generates control pulses for controlling the switching of second and third switching means S2 and S3, which will be described later, of the time axis compression/expansion circuit 30, respectively, to the time axis compression/expansion circuit 30 and the clock controller 33. supply clock controller 3
3 are four types of clock pulses CK1.3 to be described later. CK2. C
K3 and CK4 are generated respectively, and the frequency is set to t.
's or fs/2 at a predetermined timing and supplies it to the time axis compression/expansion circuit 30. Further, a switching control signal from the input terminal 34 is supplied to a time axis compression/expansion circuit 30, which switches a first switching means S1, which will be described later, depending on whether recording or reproduction is being performed.

As will be described later, the time axis compression/expansion circuit 30 compresses the time axis of the color difference signals R-Y and B-Y by 1/2 during recording, and then sequentially compresses them in time series every 1/2 horizontal scanning period. and generates a sequential signal, and outputs this sequential signal to output terminal 1.
Output to 1. This sequential signal is FM converted: A unit 35. Recording amplifier 36. During recording, the signals are supplied to the rotary head 38 through the switches 37 connected to the contact REC side.

The rotating heads 28 and 38 each consist of a pair of rotating heads mounted opposite to each other on the rotating surface of a rotating body such as a rotating drum, and are mounted close to each other. The magnetic tape 39 is wound obliquely around the rotating body over an angular range of over 180 degrees, and is run at a predetermined constant speed. As a result, a frequency modulated luminance signal (FMI!i degree signal) is transmitted onto the magnetic tape 39 by the rotating head 28.
The track recorded by the FM sequential signal and the track recorded by the rotary head 38 are formed simultaneously and separately, and thereafter two tracks are formed for each field.

Next, the operation during reproduction will be explained. During reproduction, the switches 23, 27 and 37 are respectively switched to the contact PB side. As the rotary heads 28 and 38 scan the two tracks separately, the rotary head 28 reproduces an FM luminance signal, and at the same time, the rotary head 38 reproduces an FM sequential signal. The FMii degree signal reproduced by the rotary head 28 is sent to the switch 27. preamplifier 40
The signal is supplied to the FM demodulator 41 through the FM demodulator 41, where it is FM demodulated into a reproduced sequential signal and then output to the output terminal 42. On the other hand, the FM sequential signal reproduced by the rotary head 38 is transmitted to the switch 37. FM demodulator 4 through preamplifier 43
4, where it is FM demodulated and made into a reproduction sequential signal, and then supplied to the input terminal 3 of the time axis compression/expansion circuit 30, while being passed through the switch 23 to the synchronization signal separation circuit 2.
4, where the horizontal synchronizing signal added during recording is separated and extracted, and then supplied to a clock generator 31 and a control pulse generator 32, respectively.

Control pulse generator 32. Each output pulse of the clock controller 33 is supplied to a time axis compression/expansion circuit 30, respectively.

As a result, the time axis compression/expansion circuit 30 doubles the time axis of the input reproduction sequential signal, as will be described later, and separates the reproduction color difference signals R-Y and B-Y from the output terminal 1.
2.13 respectively in parallel and continuously output. The reproduced color difference signal R-Y taken out from the output terminal 12 is supplied to a synchronization signal extraction circuit 45, where the horizontal synchronization signal added during recording is extracted, and then output to the output terminal 46. In addition, the reproduced color difference signal B taken out from the output terminal 13
-Y is output to the output terminal 47.

Returning to FIG. 1 again, first of all, during recording, the switches 4 and 5 constituting the first switching means S1 are connected to the contact point R.
connected to the side. As a result, the color difference signal R-Y that has entered the input terminal 1 is passed through the switch 4 to a charge coupled device (COD), which is an example of an analog delay element.
)6+ and 62, respectively. On the other hand, the color difference signal B-Y that has entered the input terminal 2 is passed through the switch 5 to the CCD 6.
3 and 64, respectively. That is, CCD6+ and CCD62 each having two CCDs on each of the two color difference signal transmission paths.
．． 63 and 64 are provided, and these two sets of CC
D6+ to 64 are the control pulse generators 32 described above.
．． Together with the clock controller 33, it constitutes a time axis conversion circuit.

CCD6+, 62, 63 and 64 are clock pulses C
K1. GK2. When CK3 and CK4 are supplied separately and the clock pulse frequency is fS, one horizontal scanning period (1H
) minutes delay time. - As an example, CCD6+~6
If the number of stages of 4 is 910 stages, the frequency fS is approximately 14 MH which is 910 times the horizontal scanning frequency fH.
It becomes z. The clock pulses CKI and CK3 are switched so that 1H111 periods of frequency t's and 1H periods of frequency fs/2 alternate as shown schematically in 1H units in FIG. , clock pulse CK
2 and CK4 are 1H period of frequency fs and 1H period of frequency fs/2, respectively, as shown schematically in 1H units in Fig. 2 (8).
The 1H period in which the clock pulses CK1 and CK3 are fS is switched so that the H periods alternate with each other, and the clock pulses CK1 and CK3 are fS.
/2, and the one-day period of fs/2 is defined as fs.

Now, the input color difference signals R-Y of CCD6+ and CCD62 are
Figure (C) shows A+, Δ2. ..., and the input color difference signals 8-Y of the CCDs 63 and 64 are shown as B+ and B2 in units of 1H in the figure (G).

It shall be shown as... First 1H of color difference signal R-Y
The period signal A1 is a clock pulse CK with a frequency fs/2.
2, the clock pulse CK is written in half of the total number of stages of the CCD 62, so the clock pulse CK is written in the next 1H period (2H).
When the frequency of 2 is switched to t's, the signal A1 is read out from the CCD 62 as a signal A1' whose time axis is compressed to 172 in a 0.5H period in the latter half of the one day period. At the same time, the 2H input signal A2 is added during this one-day period.
is written to CCD6+ by clock pulse CK1 of frequency f s /2. Furthermore, in the next 1H period (3rd H), the input signal A3 is written to the CCD 62 based on the clock pulse GK2 of frequency fs/2, while the time axis is compressed by 1/2 in the latter half of the 0.5H period. Signal Az' is read out from CCD6+. Hereinafter, in the same manner as above, the frequency fs/2 of CCD 6+ and 62 is
One cCD to which a clock pulse of 1 is supplied performs a peak-in operation, and the other COD reads out a signal whose time axis has been compressed by 1/2, which is repeated every 1H. Second
Figure (D> schematically shows the operation of CCD6+, and Figure (E)
) schematically shows the operation of the CCD 62, W indicates a 1H period during which a write operation is performed, and R indicates a 0 and 5H period during which time-axis compressed signals are read.

The output signals of CCD 6+ and 62 are supplied to switch 7. The switch 7 together with the switch 8 is connected to the second switching means S2.
The control pulse generator 3 described above
The control pulses of frequency fH/2 from CCD 6+ and CCD 62 are used to alternately switch and connect each day so as to selectively output the output signal of the COD which is performing a read operation at clock frequency fS. As a result, as schematically shown in FIG. 2(F), the output signal of the switch 7 is such that the first time-axis compressed color difference signal is taken out every 0.5 days and constitutes the third switching means S3. is supplied to the contact 9a of the switch 9.

On the other hand, like the CCDs 6+ and 62, the CCDs 63 and 64 are also programmed every day so that one performs a write operation and the other performs a read operation, as schematically shown in FIGS. 2(H) and (1). Repeat alternately. Similarly to switch 7, switch 8 receives signals B+', B2', .
It is switched and connected every 1H to the side that is reading out. As a result, a time-base compressed signal is extracted from switch 8 during the same 0.5H period as switch 7, and the signal is 0.58! The signal is supplied to the extension circuit 10, where it is extended by o and sH1. Therefore, as schematically shown in FIG. 2(J), the 0.5H1il delay circuit 10 is delayed by 0.58 with respect to the first time-axis compressed color difference signal (shown in FIG. 2(F)). The second time-base compressed color difference signal is extracted every 0.5H and supplied to the contact 9b of the switch 9.

Switch 9 is activated by a control pulse of frequency f+.
The input signals are alternately selected and output every 0.5 days, such as the input signal of the contact 9a in the second half of the 2H, the input signal of the contact 9b in the first half of the 38th, and the input signal of the contact 9a in the second half of the 38th. As a result, the switch 9 outputs the second signal to the output terminal 11.
The first and second time-axis compressed color difference signals are alternately synthesized in a time-series manner and sequential signals are extracted in the order shown schematically in Figure (K).

Next, the operation during reproduction will be explained. During reproduction, the switches 4 and 5 are respectively connected to the contact P side. As a result, the reproduced sequential signal input to the input terminal 3 is supplied to the CCDs 6+ to 64 through the switches 4 and 5, respectively. C.C.
As schematically shown in FIGS. 3(A) and 3(B), D6+ and 62 alternately switch between frequencies fs and fs/2 every day, and when one is at frequency fS, the other is at fs/2.
It is driven by clock pulses CK1 and CK2 which switch synchronously to be s/2. On the other hand, CCD6
3 and 64, as schematically shown in FIGS. 3(G) and (H), respectively, the frequencies are alternately switched to fs and fs/2 every day, and when one is at the frequency fs, the other is switched. is driven by clock pulses CK3 and CK4 that switch synchronously so that fs/2, but clock pulse CK3 has a frequency switching timing relative to CK2, and CK4 has a frequency switching timing relative to CK1 for a period of 0.5H. Running late.

The input reproduced sequential signal is schematically shown in FIGS. 3(C) and 3(I), and the signal A+' of the first 0.5H period is written to the CCD 63 by the clock pulse CK3 of frequency is. At this time, since the CCD 63 operates as a 1H delay circuit, in order for the input signal A+' to be read from 0006g, a clock pulse CK3 of frequency fs is required for 0.5H period (i.e., 1Hm in total) after A+' has been written. needs to be supplied. And CCD63
Just before the signal A+' is read out from the clock pulse C
Since the frequency of K3 is switched to f/2, A+' begins to be read out with the time axis expanded twice from the time of the frequency switching. Therefore, the signal A1 of the first 1H period of the reproduced color difference signal RY returned to the original time axis is read out from the CCD 63.

During the 0.5H period after the signal A1 starts to be read out, the signal A2' is clocked by the clock pulse CK4 with the frequency fS.
When the signal A1 is written to D6a and read out, the clock pulse CK3 switches to the frequency fs, and writing of the signal A3' to the CCD 63 starts, and at the same time, the clock pulse CK4 changes to the frequency fs/2. The signal A2' is switched and the time axis of the signal A2' is expanded twice and the signal A2' starts to be read out from the CCD 64 as the signal A2 on the original time axis. The switch 8 is set so as to selectively output the output of the CCD 63 or 64 operating with the clock pulse having a frequency of f s / 2 among the clock pulses CK3 and CK4.
Switching connection is made for each H. C0D63.

The operation of 64 is schematically shown in FIGS. 3(J) and (K),
A period indicated by W is a write operation, and a period indicated by R is a read operation. In this way, from the switch 8, the color difference signal RY is returned to the original time axis and is synthesized chronologically in the original order.

On the other hand, the signal B+' in the input reproduction sequential signal has a frequency t'
The clock pulse CK1 is written to the CCD6+ by the clock pulse CK1 of s, and the frequency of the clock pulse CK1 becomes fs/2 just before the signal B+' is read out from the CCD6+ after 1H has elapsed.
From that point on, the time axis is doubled and reading begins.

Also, the incoming signal B2' after a period of one day is then CC
After being written to D62, it is read out at a frequency fs/2. Hereinafter, in the same manner as above, CCD6+ is set as shown in FIG.
), the CCD 62 performs a writing operation for 0.5 days and 11 days, indicated by W, and reads for 1831 days, indicated by R, as schematically shown in FIG. Therefore, C.C.D.
When one of 6+ and 62 is performing a write operation, the other is performing a read operation, and the relationship changes every day. Switch 7, like switch 8, is switched and connected every 1H, and the signals are returned to the original time axis as schematically shown in FIG. 3(F), and the signals are synthesized chronologically in the original order. Take out the color difference signal B-Y.

Here, the Ryokawa power signals of switches 7 and 8 (color difference signal R-
Y, B-Y), the second time axis compressed signal is set to 0.
Since the reproduced color difference signal B-Y is delayed by 0.58 compared to R-Y by the amount of delay of 5 days, the reproduced color difference signal B-Y is delayed by 0.58 in the 0.5 day delay circuit 10 at the time of reproduction. and adjust the time. As a result, the 0.58 delay circuit 10
A reproduced color difference signal R-Y as schematically shown in FIG. 3(L) is outputted to the output terminal 12, and a reproduced color difference signal RY as schematically shown in FIG. 3(F) is outputted from the switch 7 to the output terminal 13. A signal B-Y is taken out.

Next, a second embodiment of the apparatus of the present invention will be described. FIG. 4 shows a block system diagram of the second embodiment of the apparatus of the present invention. In the figure, the same components as in FIGS. 1 and 7 are denoted by the same reference numerals, and the explanation thereof will be omitted as appropriate. This embodiment is characterized in that the 0.5 day delay circuit 15 is arranged on the input side of the CCDs 63 and 64.

The clock pulse frequencies of CCD6+, 62.6s and 64 shown in FIG. 4 are as shown in FIG. 5(A) during recording.

As schematically shown in (B), (G) and (H), it is alternately switched to fs or fs/2 every 1H. Figure 5 (
C) shows the input signal of input terminal 1 (color difference signal R-Y), and (1) shows the input signal of input terminal 2 (color difference signal B-Y) of 1.
It is schematically shown in H units. The time axis compression and expansion operations by the CCDs 6+ to 64 in this embodiment are basically the same as in the first embodiment.

That is, during recording, the CCDs 6+ and 62 operate as shown in FIG.
As shown schematically in D) and (E), during the one-day period indicated by W, the input color difference signal RY is aged based on a clock pulse of frequency f s /2, and 18) In the latter half 0.5H period indicated by R between 91 and 91, the time axis of the color difference signal inputted m is compressed twice and read out based on the clock pulse of frequency fS. CCD6
When one of + and 62 is performing a write operation, the other is performing a read operation, and the write operation and read operation are switched every day. switch 7
is switched every 1H, and as schematically shown in FIG. 5(F), the first color difference signal whose time axis has been compressed by 1/2 is
It is output every 0.5H in the order '+A2' *...

On the other hand, the input color difference signal B is input by the 0.5)1/1 extension circuit 15.
-Y is delayed by 0.5H, as schematically shown in FIG. 5(I), and then supplied to CCDs 63 and 64, respectively.

Clock pulses CK3 and CK4 are shown in FIG. 5 (G) and (
As schematically shown in H), fs/2 or t's is synchronized with the output color difference signal of the 0.5 day delay circuit 15 every 1H.
As shown in the above explanation, the CCD 63 is schematically shown in FIG. 5 (K), and the CCD 64 is schematically shown in FIG. By repeating the readout operation at the frequency fS during the 0.5H period in the latter half of the 1H period, a color difference signal whose time axis is compressed by 1/2 is read out. Therefore, from the switch 8, as schematically shown in FIG. 5(M), the second color difference signal Bl'IB2', . Output every other time.

The switch 9 alternately switches the output signals of the switches 7 and 8 every 0.5H, so that the output terminal 11 has the output signal shown in FIG.
0), AI'*BI'+A2'+82'+・
. . . The first and second time-axis compressed color difference signals are synthesized in time series and sequential signals are extracted alternately every 0.5 days.

Next, during playback, the input terminal 3 shown in FIG. 4 is connected to the input terminal 3 shown in FIG.
Reproduction sequential signals are received in the order schematically shown in C) and (I). This reproduced sequential signal is supplied to the CCDs 6+ and 62 through the switch 4, and is supplied to the CCDs 63 and 64 through the switch 5 and the 0.5H delay circuit 15, respectively. )-1 delayed and supplied.

On the other hand, clock pulses CKI and CK2 are shown in FIG. 6(A).
, as shown in (B) < f s /2 or f
S, and when one side is fs, the other side is fs/
2, and clock pulse CK3 has the same timing and frequency as CK2, and its frequency changes as shown in FIG. 6 (G), and clock pulse CK4 has the same timing and frequency as CK1, as shown in FIG. 6 (H). The frequency changes like this.

As a result, CCD6+, 62 is shown in FIG. 6(E).

(D), and C0D63.64 is in the same figure (K).

As shown schematically in (L), the input sequential signal is written with a clock pulse of frequency fs during the 0.58 period indicated by W, and read out with a clock pulse of frequency f s /2 during the one day period indicated by R. By repeating this process, the color difference signal whose time axis has been expanded twice and returned to its original time axis is separated and output. CCD6+.

62 through the switch 7 to the output terminal 13 as shown in Figure 6 (
As schematically shown in FIG.
4 to the output terminal 12 through the switch 8 (M) in the same figure.
As schematically shown in , the reproduced color difference signal RY is extracted on the original time axis.

Note that the present invention is not limited to the above-mentioned embodiments, and for example, when recording, the write clock frequency is selected to be 1/m times the read clock frequency (where m is an arbitrary integer of 3 or more). It is also possible to take out a signal that has been time-axis compressed twice, and select the read clock frequency to be 1/m times the write clock frequency during reproduction to obtain a signal that has been time-axis expanded by m times. Other charge transfer devices (eg, packet brigade devices) can also be used as analog delay devices. Furthermore, the two signals to be compressed and expanded in the time axis are color difference signals RY.

Not limited to B-Y, ■ signals and Q signals may also be used, and furthermore, ■ brightness signals and color signals, ■ frequency division multiplexed signals consisting of audio signals and color signals and brightness signals, ■ color video signals and audio signals, and other combinations. Any 2N information signal is sufficient.

Also, by changing the capacitance of the analog delay element,
The present invention compresses the time axis of two types of information signals, such as compressing the time axis of 2H minutes to 1/2 and time-division multiplexing within two days, and sequentially converting the two types of information signals into signals for recording and reproduction. It can be applied to all types of recording and reproducing methods.

Effects of the Invention As described above, according to the present invention, time axis compression and time axis expansion can be performed with one circuit using an analog delay element, so the number of parts can be reduced, and moreover, it is possible to reduce the number of components and use an analog memory instead of a digital memory. Since a delay element is used, the circuit structure is simpler and has the advantage that it can be constructed at a significantly lower cost than the conventional one.

[Brief explanation of the drawing]

FIG. 1 is a block system diagram showing a first embodiment of the device of the present invention, FIGS. 2 and 3 are time charts for explaining the operation of the block system shown in FIG. 1 during recording and reproduction, respectively, and FIG. 5 and 6 are time charts for explaining the operation of the block system shown in FIG. 4 during recording and reproduction, respectively, and FIG. 7 is a block system diagram showing the second embodiment of the device of the present invention. A block system diagram showing an example of a recording/reproducing device having
FIG. 8 is a diagram illustrating an example of time axis compression in a conventional device,
FIG. 9 is a diagram showing waveforms of a luminance signal and a sequential signal in a conventional device. 1.2...Color difference signal input terminal, 3...Sequential signal input terminal, 61-64...Charge coupled device (COD), 10.15...0.58 delay circuit, 1
1... Sequential signal output terminal, 12.13... Reproduction color difference signal output terminal, 20... Luminance signal input terminal, 21゜2
2... Color difference signal input terminal, 28.38... Rotating head, 30... Time axis compression/expansion circuit, 32... Control pulse generator, 33... Clock controller, 34... Switching Signal input terminal, 39... Magnetic tape, 46.47... Reproduction color difference signal output terminal, Sl...
・First switching means, S2...Second switching means, S3・
...Third switching means. Patent Applicant: Victor Company of Japan Co., Ltd. Figure 6, Figure 5, Figure 9 @ Proceeding Officer 11 Official Book November 1985 128 1. Indication of the Case 1985 Patent Application No. 195642 2. Name of the Invention Magnetic Recording and Reproducing Device Relationship between time axis compression/expansion device 3 and the case of the person making the amendment Patent applicant address 3-12 Moriya-cho, Kanayō-ku, Yokohama-shi, Kanagawa 221 Name (432) Victor Japan Co., Ltd. Representative Director and President Michi Shishi -Department 4, Agent address: 5-7-6 Kojimachi, Chiyoda-ku, Tokyo 102
, Detailed description of the invention in the specification to be amended. 7. Contents of amendment In the specification, "expansion" written in line 10 of page 3 is corrected to "compression."

Claims (1)

[Claims] During recording, two types of information signals are supplied, and the time axis is
/n (where n is a natural number) times, and then output the sequential signals obtained by synthesizing them alternately in time series as a recording signal, and at the time of reproduction, the reproduced sequential signals are supplied,
In a time axis compression/expansion device of a recording/reproducing apparatus that expands the time axis by n times, branches into two, and separates and outputs the two types of information signals in parallel, the two types of information signals and the reproduction sequential signal are separated. a first switching means for selectively outputting one of the signals to the two transmission paths, and after writing the signals received from the first switching means through the two transmission paths based on a clock pulse of a first frequency; a time base conversion circuit having a total of two sets of analog delay elements, two for each transmission line read out based on a clock pulse of a second frequency;
a second switching means for selectively outputting a read output signal of one of the analog delay elements performing a read operation; and a third switching means for switching and outputting an output signal of the second switching means. , the input signal or the output signal of one of the two sets of analog delay elements is switched to the other of the two sets of analog delay elements so that the time-series synthesized signal is extracted from the second or third switching means. a delay circuit that delays an input signal or an output signal of a set of analog delay elements by a certain period of time relative to the input signal or output signal of the analog delay element, and when recording, the first switching means selectively outputs the two types of information signals, and the second selects a frequency n times as high as the first frequency, and the third switching means compresses the time axis of the two types of information signals to 1/n times, and synthesizes them alternately in time series. extracting the sequential signal consisting of the first frequency, selectively outputting the sequential signal by the first switching means at the time of reproduction, selecting the second frequency to be 1/n times the first frequency, and performing the second switching. A time axis compression/expansion device for a recording/reproducing apparatus, characterized in that the two types of information signals returned to the original time axis by the means are configured to be output separately.