JPS62299035A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate etching accurately following a photoresist pattern and improve yield of MIS transistors by a method wherein nitric acid which is diluted to the concentration of about 60 % or less by diluent such as water or acetic acid is employed as etchant for an amorphous Si layer. CONSTITUTION:Etchant containing fluoric acid and nitric acid is diluted by diluent such as water or acetic acid so as to reduce the nitric acid concentration in the etchant to about 60 % or less. For instance, a transparent electrode 2 is selectively applied and formed on a glass board 1 with, for instance, ITO and then a silicon oxide layer 3 is formed over the whole surface as 1st transparent insulating layer. Then 1st metal layer 4 which serves as a gate electrode and also as a scanning signal line is applied and formed selectively with Cr. After that, a silicon nitride layer 5, which is 2nd transparent insulating layer, and an amorphous silicon layer which contains almost no impurity are formed by plasma CVD and a required photoresist pattern is formed by usual photolithography and etching is carried out with etchant whose composition is HF(46 % concentration):HNO3(70 % concentration): H2O= 1:80:20.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, such as a method of manufacturing a thin film transistor array that constitutes an image display device by combining with a liquid crystal or the like.

One of the methods for constructing a conventional flat display is a method of arranging unit picture elements made of semiconductor switch elements and optical elements in a two-dimensional matrix.

FIG. 3 shows its equivalent circuit, and 14 is an MIS (Meta
l -In5ulator -Sem1conduct
15 is a liquid crystal cell, 4 is a scanning signal line, and 7 is a video signal line. MIS on scanning signal line 4)
Apply gate signals sequentially so that the transistors turn on,
CR is performed by line sequential scanning in which a video signal corresponding to one line is written from the video signal line 7 to the liquid crystal cell 15.
Functions equivalent to T are given.

MIS) The transistor 14 is single crystal SL, polycrystalline Si.

It is manufactured using amorphous S1 or a compound semiconductor as a semiconductor layer. Here, we will discuss a thin film transistor array using amorphous S1, which is said to be relatively easy to reduce cost and increase in area, using Japanese Patent Application Laid-Open No. 59-996.
The method shown in Publication No. 2 will be explained as an example. Second
The figure shows a plan view of the unit picture element of this conventional example, and FIG. 1 shows a sectional view taken along the line AA' of the plan view, and the manufacturing process thereof is as described below.

First, a transparent electrode 2 is selectively deposited on a glass plate 1, and then, for example, a silicon oxide layer 3 is deposited as a first transparent insulating layer over the entire surface. Next, a first metal layer 4, which serves both as a gate electrode and a scanning signal line, is selectively deposited using, for example, Mo. Thereafter, a second transparent insulating layer, such as a silicon nitride layer 6, and an island-shaped amorphous silicon layer 6 containing almost no impurity as a donor or acceptor are selectively deposited on the entire surface by plasma CVD. Subsequently, an opening 13 is formed in the silicon nitride layer 5 and the silicon oxide layer 3 using, for example, a hydrofluoric acid-based etching solution, and a portion of the transparent electrode 2 is exposed. At this time, although not shown, an opening is also formed in the silicon nitride film 5 on the scanning signal line 4 at the end of the integrated circuit. A second metal layer 7, for example, Al, which also serves as the source or drain of the video signal line and the MIS transistor, and a second metal layer 7, which connects the drain or source of the Lvl I S transistor and the transparent electrode 2 through the opening 13. A layer 8, for example AI, is selectively deposited, and at the same time, lead-out electrodes for the scanning signal lines are also formed through the aforementioned openings. A polyimide resin is applied to the glass plate 9 on which the thin film transistor array described above and the second transparent electrode 10 are adhered on one principal surface is cured, and then subjected to alignment treatment, and the liquid crystal 11, for example, twisted nematic liquid crystal, is applied to both substrates. What is necessary is to enclose it in between and further arrange polarizing plates 12 above and below.

Problems to be Solved by the Invention However, in the above-described structure, the island-shaped semiconductor layer 6 is usually formed by first depositing Si on the entire surface of the substrate, forming a desired island-shaped photoresist pattern by photolithography, and then applying fluoronitric acid to form the desired island-shaped photoresist pattern. It was formed by dissolving and removing the unnecessary Si layer other than the photoresist pattern using a hydrofluoric acid etching solution, such as HF.
(9 degrees 46%): HNO3 (concentration 70%) = 1:100
When using a photoresist, the photoresist begins to peel off in just a few seconds, making it impossible to perform etching accurately according to the photoresist pattern, resulting in pattern defects in the semiconductor layer, which is the heart of the MIS transistor, and MISI.
-There was a problem in that transistor defects occurred.

Also, when a metal silicide such as M o S 12 f is used for the first metal layer or the second metal layer, the same problem as above occurs when a fluoro-nitric acid based etching solution such as HF (concentration 46
%): HNO3 (concentration 70%) = 1:100, the photoresist begins to peel off in just a few seconds, making it impossible to etch accurately, and in some cases it can be fatal for image display devices. Is there a problem with disconnection? had.

In view of the above, it is an object of the present invention to provide a method for manufacturing semiconductor devices such as thin film transistor arrays, which prevents the photoresist from peeling off from the underlying semiconductor layer containing 81 as a main component or metal oxide 7 reside, and which has a high yield. .

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention dilutes an etching solution containing hydrofluoric acid and nitric acid with water or a diluent such as acetic acid, so that the nitric acid concentration in the etching solution is approximately 60%. Lower it to below.

Effects of the present invention When etching the structure described above, the adhesion of the photoresist is improved, so that no peeling of the photoresist was observed even after etching for about 5 minutes, and the photoresist pattern was etched as desired. thin film patterns can be obtained, improving the yield of thin film transistor arrays.

Embodiment A method according to an embodiment of the present invention will be explained using the cross-sectional view of a thin film transistor array shown in FIG.

First, a transparent electrode 2 is placed on a glass plate 1 using, for example, ITO (Ind.
After that, a first transparent insulating layer, for example a silicon oxide layer 3, is deposited on the entire surface. Next, a first metal layer 4, which serves as a gate electrode and a scanning signal line, is selectively deposited using, for example, Cr. Thereafter, a second transparent insulating layer such as a silicon nitride layer 5 and an amorphous silicon layer containing almost no impurities as donors or acceptors are formed by plasma CVD. A desired photoresist pattern is formed by normal photolithography, for example, with HF (density 46
%): HNO3 (concentration 70%): H20 = 80:20
Etching with. Thereafter, the photoresist is removed to obtain the island-shaped semiconductor layer 6.

Subsequently, an opening 13 is formed in the silicon nitride layer 6 and the silicon oxide layer 3 to expose a portion of the transparent electrode 2. At this time, although not shown, an opening is also formed in the silicon nitride film 6 on the scanning signal line 4 at the end of this thin film transistor array. Then, a second metal layer 7 that also serves as the source or drain of the video signal line and the MIS transistor, and a second metal layer 8 that connects the drain or source of the MIS transistor and the transparent electrode 2 via the opening 13 are formed, for example. A
At the same time, the lead electrodes of the scanning electrodes are also formed through the openings described above. Thereafter, a liquid crystal display device is constructed using the thin film transistor array according to the present invention, which may be performed in a manner similar to that described in the prior art.

As described above, if nitric acid diluted to approximately 60% or less with water or a diluent such as acetic acid is used as the etching solution for the amorphous Si layer, etching can be performed in accordance with the photoresist pattern, improving the yield of MIS transistors. be able to.

In the above embodiment, in order to improve the ohmic properties between the island-shaped semiconductor layer 6 and the lease/drain wirings 7 and 8, an amorphous Si layer containing P or B as a donor or acceptor is added to them. It is sufficient to intervene between the two. Further, although the first metal layer is a single Cr layer, since Cr tends to form a passive Cr oxide film on its surface, contact resistance with the lead electrode of the scanning electrode may become a problem.

In that case, after depositing Cr on the entire surface, metal silicide such as Mo5t, i is deposited, and by photolithography,
A photoresist pattern of the desired scanning electrode is formed, and M
o S 12 'f: For example, HF (concentration 46 cm):
HNO3 (concentration 70%):H2O,, = 1:80:20
After etching and drying the substrate, baking the substrate at about ISO''C and etching the Cr, MoSi2, which does not easily form an oxide film, is deposited on the Cr surface, so the contact resistance between the scan electrode and the extraction electrode of the scan electrode is It gets lower.

As described in detail, according to the present invention, the adhesion between the semiconductor Si layer and the photoresist is improved, etching can be performed in accordance with the desired photoresist pattern, and pattern defects in the island-shaped semiconductor Si layer are reduced. , MIS) transistor yield can be improved, and its practical effects are significant.

[Brief explanation of drawings]

FIG. 1 is a schematic sectional view of a liquid crystal display device composed of a thin film transistor array, FIG. 2 is a schematic plan view of a unit picture element of the device, and FIG. 3 is an equivalent circuit diagram of the device. 1... Insulating substrate, 2... Transparent electrode,
3...First transparent insulating layer, 4...Scanning line, 6...Second transparent insulating layer, 6...
Island-shaped semiconductor layer mainly composed of Si, 7...signal line, 8...drain electrode, 9...insulating substrate, 10...th 2 transparent electrodes, 11...
...Liquid crystal, 12...Polarizing plate, 13...
...Aperture, 14..., ...MIS transistor, 1
6...Liquid crystal cell.゛ Name of agent: Patent attorney Toshio Nakao and 1 other person
Name 4-11 Cade ・G---ノ! 9 Crystal Sirini〉71

Claims (3)

[Claims] (1) A semiconductor layer containing silicon as a main component is formed on a substrate, and the semiconductor layer is etched using a diluting solution containing hydrofluoric acid and nitric acid to a nitric acid concentration of 60% or less using a resist pattern as a mask. A method for manufacturing a semiconductor device, characterized in that selective removal is performed in a step. (2) A transparent conductive layer is selectively formed on an insulating substrate,
A first transparent insulating layer is formed on the transparent conductive layer, a first metal is selectively formed on the first transparent insulating layer, and a second metal is selectively formed on the first metal layer. An island-shaped semiconductor layer is formed through a transparent insulating layer, and openings are formed in the first and second transparent insulating layers formed on the transparent conductive layer,
One of a pair of second metal layers selectively formed on the island-shaped semiconductor layer so as to partially overlap the first metal layer is in electrical contact with the transparent conductive layer through the opening, The island-shaped semiconductor layer is formed by depositing a semiconductor whose main component is Si on the entire surface of the substrate, forming an island-shaped pattern of photoresist by photolithography, and adjusting the nitric acid concentration of the etching solution to approximately the same level with a diluent such as water or acetic acid. A method for manufacturing a semiconductor device, comprising forming a thin film transistor array by etching with an etching solution containing hydrofluoric acid and nitric acid diluted to 60% or less. (3) The selectively formed first metal layer, the selectively formed second metal layer, or both may be a single layer of metal silicide or a multilayer film of other conductive film and metal silicide. After coating the entire surface of the substrate, a photoresist pattern is formed by photolithography, and the metal silicide is etched using an etching solution containing hydrofluoric acid and nitric acid diluted with a diluent such as water or acetic acid to a nitric acid concentration of approximately 60% or less. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor device is formed by: