JPS62269358A - image sensor - Google Patents
image sensorInfo
- Publication number
- JPS62269358A JPS62269358A JP61115390A JP11539086A JPS62269358A JP S62269358 A JPS62269358 A JP S62269358A JP 61115390 A JP61115390 A JP 61115390A JP 11539086 A JP11539086 A JP 11539086A JP S62269358 A JPS62269358 A JP S62269358A
- Authority
- JP
- Japan
- Prior art keywords
- image sensor
- layer
- current
- amorphous silicon
- common electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/191—Photoconductor image sensors
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
イメージセンサの明電流と暗電流とのレベルを上昇し、
信号の検出を容易にする方法として、絶縁基板上に非晶
質窒化シリコン層と非晶質シリコン層とを層形成し、該
非晶質シリコン層上にコプレナー形の電極を設けたイメ
ージセンサ。[Detailed Description of the Invention] [Summary] Increasing the bright current and dark current levels of an image sensor,
As a method for facilitating signal detection, an image sensor is provided in which an amorphous silicon nitride layer and an amorphous silicon layer are formed on an insulating substrate, and a coplanar electrode is provided on the amorphous silicon layer.
本発明は明電流レベルと暗電流レベルを増加したイメー
ジセンサの構成に関する。The present invention relates to an image sensor configuration with increased bright current level and dark current level.
イメージセンサはファクシミリを始め光学的文字読み取
り装置(略称0CR) 、光学的記号読み取り装置(略
称OMR)などにおける情報の入力系に広く使用されて
いる。Image sensors are widely used as information input systems in facsimile machines, optical character readers (abbreviated as OCR), optical symbol readers (abbreviated as OMR), and the like.
ここで、イメージセンサば非晶質シリコン(以下略して
a−8l)或いはセレン化カドミウム(CdSe)など
の光電材料を用いて光電素子が形成されており、この光
電素子が多数−列に配列してイメージセンサが形成され
ている。Here, in an image sensor, a photoelectric element is formed using a photoelectric material such as amorphous silicon (hereinafter abbreviated as a-8l) or cadmium selenide (CdSe), and a large number of these photoelectric elements are arranged in rows. An image sensor is formed.
そして、使用法としては発光ダイオード(LED)で原
稿を照明し、この原稿からの反射光をセルフォックレン
ズを用いて等倍に結像させ、これを光電素子が受光して
電気信号に変換している。To use it, a light-emitting diode (LED) is used to illuminate the original, and a SELFOC lens is used to form an image at the same magnification of the light reflected from the original, which is then received by a photoelectric element and converted into an electrical signal. ing.
すなわち、イメージセンサは紙送りされてくる原稿を横
方向に走査し、各光電素子が検出している原稿の白黒に
対応する電気信号を順次シフトレジスタに伝送して情報
処理を行うものである。That is, the image sensor horizontally scans a fed document, and sequentially transmits electric signals corresponding to black and white of the document detected by each photoelectric element to a shift register to perform information processing.
本発明は光電素子がa−5iよりなるコプレナー形イメ
ージセン→J゛の改良に関するものである。The present invention relates to an improvement of a coplanar image sensor →J' in which the photoelectric element is made of a-5i.
(従来の技術〕
第2図(A)は従来のコプレナー形イメージセンサの平
面図また同図(B)はこのx−x ′線位置における断
面図である。(Prior Art) FIG. 2(A) is a plan view of a conventional coplanar image sensor, and FIG. 2(B) is a sectional view taken along the line x-x'.
ここで従来の構造は、ガラスあるいはセラミ。The traditional structure here is glass or ceramic.
りなどからなる絶縁基板Iの一トにa−5i層2がプラ
ズマCVD法(化学気相成長法)などの方法で形成され
ており、この上にクローム(Cr)などの金属よりなる
共通電極3と透明導電膜からなる多数のゲート電極4が
パターン形成されており、これにより多数の光電素子が
形成されている。An A-5I layer 2 is formed on one insulating substrate I made of a metal such as chromium (Cr) by a method such as a plasma CVD method (chemical vapor deposition method), and a common electrode made of a metal such as chromium (Cr) is formed on the a-5i layer 2. 3 and a large number of gate electrodes 4 made of a transparent conductive film are patterned, thereby forming a large number of photoelectric elements.
ここで、共通電極3とゲート電極4は共に金属膜よりな
るため、a−5i層2との界面に共にショノ1−キ・バ
リアか生じているが、共通電極3からa−5i層2への
電流方向が順方向になるように電圧を印加する構成をと
るため、この界面での電圧降下は無視することができ、
このため共通電極3はオーミック電極とも言われている
。Here, since the common electrode 3 and the gate electrode 4 are both made of metal films, a barrier is formed at the interface with the a-5i layer 2, but from the common electrode 3 to the a-5i layer 2. Since the voltage is applied so that the current direction is in the forward direction, the voltage drop at this interface can be ignored.
For this reason, the common electrode 3 is also called an ohmic electrode.
−・方、ゲート電極4には逆方向に電圧が印加されてお
り、撒少な逆方向電流(暗電流)が流れているが、透明
導電膜を通して光をバリアに投射すると、キャリアの光
増倍により逆方向電流が増加する(明電流)。- On the other hand, a voltage is applied to the gate electrode 4 in the opposite direction, and a small reverse current (dark current) flows. The reverse current increases (bright current).
ここで、単位の光電素子を構成するゲート電極4は10
0 μm角程度の大きさにパターン形成されているが、
従来の電流値は明電流かto−” A程度、また暗電流
は10−” A程度であり、明暗電流比は3桁の値が得
られるものX絶対値が少なく、そのため駆動用1cの設
計に当たって大きな制限を伴っていた。Here, the number of gate electrodes 4 constituting a unit photoelectric element is 10
Although the pattern is formed to a size of approximately 0 μm square,
Conventional current values are bright current or about to-" A, and dark current is about 10-" A, and the bright/dark current ratio can obtain a three-digit value. It was accompanied by major limitations.
以上記したように従来のコプレナー形イメージセンサは
約3桁の明暗電流比が得られるもの\、電流の絶対値が
低いために検出回路の形成が容易でない。As described above, although the conventional coplanar image sensor can obtain a brightness/dark current ratio of about three digits, it is not easy to form a detection circuit because the absolute value of the current is low.
そこで、明電流および暗電流の絶対値を高め、検出回路
の設計を容易にすることが課題である。Therefore, the challenge is to increase the absolute values of the bright current and dark current and to facilitate the design of the detection circuit.
c問題点を解決するだめの手段〕
上記の問題は絶縁基板」二に形成した非晶質シリコン薄
層上に金属膜よりなる共通電極と透明導電膜よりなる個
別電極とを設けてなるコプレナー形イメージセンサにお
いて、前記非晶質シリコン薄層を非晶質の窒化シリコン
薄膜上に形成する構造をとることにより解決することが
で、きる。[Means to Solve Problem C] The above problem is solved by the coplanar type in which a common electrode made of a metal film and individual electrodes made of a transparent conductive film are provided on a thin amorphous silicon layer formed on an insulating substrate. This problem can be solved by forming the amorphous silicon thin layer on an amorphous silicon nitride thin film in the image sensor.
本発明はコプレナー形構造をとるイメージセンサにおい
て、明電流および暗電流の絶対値が低い理由はゲート電
極4と共通電極3との間にあるa−5i層2の抵抗が高
いからである。In the image sensor of the present invention having a coplanar structure, the reason why the absolute values of bright current and dark current are low is that the resistance of the a-5i layer 2 between the gate electrode 4 and the common electrode 3 is high.
そこでシヨツトキ・バリアの形状を変えずに電流の絶対
値を増す方法として、a −5i層の下に非晶質の窒化
シリコン(a −5iN )層を設け、この界面に電流
の通過が容易なチャネルを設けることにより、電流の絶
対値を増すもザのである。Therefore, as a method to increase the absolute value of the current without changing the shape of the shot barrier, an amorphous silicon nitride (a-5iN) layer is provided under the a-5i layer, and a current can easily pass through this interface. By providing a channel, the absolute value of the current can be increased.
すなわち、絶縁基板の上にa−5iN層を設け、その上
に従来のようにa−5i層を設けると、a−5iN層の
中には正孔を生ずるような欠陥、例えばSi原子のダン
グリングホント(Dangling−bond)が存在
し、そのため境界部のa −Si層に電子が集まり易く
なり所謂るチャネルを生じて低抵抗化するのである。That is, if an a-5iN layer is provided on an insulating substrate and an a-5i layer is provided on top of it as in the conventional method, defects that generate holes, such as dangling Si atoms, may occur in the a-5iN layer. There is a dangling bond, which makes it easier for electrons to gather in the a-Si layer at the boundary, creating a so-called channel and lowering the resistance.
これにより従来に較べて直列抵抗が減少し、明電流値お
よび暗電流値が増加することになる。This results in a decrease in series resistance and an increase in bright current value and dark current value compared to the prior art.
第1図(A)は本発明を実施したイメージセンサの平面
図、また同図(B)はごのx−x ’線における断面図
である。FIG. 1(A) is a plan view of an image sensor embodying the present invention, and FIG. 1(B) is a sectional view taken along line xx'.
このイメージセンサの製造法を説明すると次のようにな
る。The method of manufacturing this image sensor will be explained as follows.
厚さl xmのガラス基板5の上にa−5iN(正確に
はa −3ix N1−X : H)層6をプラズマC
VD法により約3000人の厚さに形成し、次にこの上
にメタルマスクを用い、同じ方法によりa−5i(正確
にはa −5i : II)を約3000人の厚さに蒸
着し、長さ2301厘1幅60mmのa−31層7を形
成した。A layer 6 of a-5iN (accurately a-3ix N1-X: H) is deposited on a glass substrate 5 having a thickness of l x m using plasma C.
It is formed to a thickness of about 3000 mm using the VD method, and then a-5i (accurately a-5i: II) is evaporated to a thickness of about 3000 mm using the same method using a metal mask. An A-31 layer 7 having a length of 230 mm and a width of 60 mm was formed.
次にこの上にCrを約1000人の厚さにマスク蒸着し
て幅1w、長さ216 mmの共通電極3を作り、また
同様に酸化インジウム(InzO:+)と酸化錫(Sn
02)との固溶体(略称ITO)を700−1000
人の厚さにマスク蒸着して100μm角のゲート電極4
をパターン形成した。Next, a common electrode 3 with a width of 1 W and a length of 216 mm was made by vapor depositing Cr to a thickness of approximately 1000 mm on top of this, and indium oxide (InzO:+) and tin oxide (Sn) were similarly deposited.
02) (abbreviated as ITO) at 700-1000
A gate electrode 4 of 100 μm square is formed by mask vapor deposition to the thickness of a person.
was formed into a pattern.
このようにし′C作ったイメージセンサの個々の光電素
子につい(明電流と暗電流を測定したところ、明電流は
1O−7A程度、また暗電流は10−” A程度と従来
に較べ約3桁向トすることができた。When we measured the bright current and dark current of each photoelectric element of the image sensor made in this way, the bright current was about 10-7A, and the dark current was about 10-''A, which is about 3 orders of magnitude higher than conventional methods. I was able to face the situation.
C発明の効果〕
以−F記したように本発明の実施により明電流値と暗電
流値のレベル向−にが可能となり、検出回路の設計が容
易となった。C. Effects of the Invention] As described below, by implementing the present invention, it has become possible to adjust the bright current value and the dark current value, and the design of the detection circuit has become easier.
第1図は本発明に係るイメージセンサの平面図と断面図
、
第2図は従来のイメージセンサの平面図と断面図、
である。
図において、
1.5は絶縁基板、 2,7はa−3i層、3は共通
電極、 4はゲート電極、6はa−3iN層、
である。FIG. 1 is a plan view and a sectional view of an image sensor according to the present invention, and FIG. 2 is a plan view and a sectional view of a conventional image sensor. In the figure, 1.5 is an insulating substrate, 2 and 7 are a-3i layers, 3 is a common electrode, 4 is a gate electrode, and 6 is an a-3iN layer.
Claims (1)
よりなる共通電極と透明導電膜よりなるゲート電極とを
設けてなるコプレナー形イメージセンサにおいて、 前記非晶質シリコン薄層が非晶質の窒化シリコン薄層上
に形成されてなることを特徴とするイメージセンサ。[Scope of Claim] A coplanar image sensor comprising a common electrode made of a metal film and a gate electrode made of a transparent conductive film on an amorphous silicon thin layer formed on an insulating substrate, comprising the steps of: An image sensor characterized in that the thin layer is formed on an amorphous silicon nitride thin layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61115390A JPS62269358A (en) | 1986-05-19 | 1986-05-19 | image sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61115390A JPS62269358A (en) | 1986-05-19 | 1986-05-19 | image sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62269358A true JPS62269358A (en) | 1987-11-21 |
Family
ID=14661360
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61115390A Pending JPS62269358A (en) | 1986-05-19 | 1986-05-19 | image sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62269358A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5821559A (en) * | 1991-02-16 | 1998-10-13 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
US5894151A (en) * | 1992-02-25 | 1999-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having reduced leakage current |
US6028333A (en) * | 1991-02-16 | 2000-02-22 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
US6709907B1 (en) | 1992-02-25 | 2004-03-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor |
US6943764B1 (en) | 1994-04-22 | 2005-09-13 | Semiconductor Energy Laboratory Co., Ltd. | Driver circuit for an active matrix display device |
US6953713B2 (en) | 1992-05-29 | 2005-10-11 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device and semiconductor memory having thin-film transistors |
US7145173B2 (en) | 1994-04-22 | 2006-12-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor integrated circuit |
-
1986
- 1986-05-19 JP JP61115390A patent/JPS62269358A/en active Pending
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5821559A (en) * | 1991-02-16 | 1998-10-13 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
US6028333A (en) * | 1991-02-16 | 2000-02-22 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
US5894151A (en) * | 1992-02-25 | 1999-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having reduced leakage current |
US6709907B1 (en) | 1992-02-25 | 2004-03-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor |
US7148542B2 (en) | 1992-02-25 | 2006-12-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of forming the same |
US7649227B2 (en) | 1992-02-25 | 2010-01-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of forming the same |
US6953713B2 (en) | 1992-05-29 | 2005-10-11 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device and semiconductor memory having thin-film transistors |
US7223996B2 (en) | 1992-05-29 | 2007-05-29 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
US6943764B1 (en) | 1994-04-22 | 2005-09-13 | Semiconductor Energy Laboratory Co., Ltd. | Driver circuit for an active matrix display device |
US7145173B2 (en) | 1994-04-22 | 2006-12-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor integrated circuit |
US7166862B2 (en) | 1994-04-22 | 2007-01-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor integrated circuit |
US7477222B2 (en) | 1994-04-22 | 2009-01-13 | Semiconductor Energy Laboratory Co., Ltd. | Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device |
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