JPS62208621A - Epitaxial growth of gainp and structure thereof - Google Patents
Epitaxial growth of gainp and structure thereofInfo
- Publication number
- JPS62208621A JPS62208621A JP61050891A JP5089186A JPS62208621A JP S62208621 A JPS62208621 A JP S62208621A JP 61050891 A JP61050891 A JP 61050891A JP 5089186 A JP5089186 A JP 5089186A JP S62208621 A JPS62208621 A JP S62208621A
- Authority
- JP
- Japan
- Prior art keywords
- epitaxial layer
- substrate
- value
- layer
- gainp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000013078 crystal Substances 0.000 claims abstract description 45
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000010030 laminating Methods 0.000 claims abstract description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 31
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 10
- 150000001875 compounds Chemical class 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 229910000673 Indium arsenide Inorganic materials 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 229910005540 GaP Inorganic materials 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 150000004820 halides Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Landscapes
- Junction Field-Effect Transistors (AREA)
- Recrystallisation Techniques (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
３元混晶の化合物半導体ＧａｘＩｎ１−ウＰのエピタキ
シャル成長層にドナ不純物をドープする場合、混晶比率
Ｘが０．５２以上となると、深い準位の濃度が急増する
ことが判明したので、本発明ではＸ値を０．５０以下に
抑えることにより深い準位の濃度を低減し、またこれに
よって起こる基板との格子定数のずれを防くためにＧａ
ＩｎＡｓ基板を用いて解決を図った。[Detailed Description of the Invention] [Summary] When doping the epitaxially grown layer of the ternary mixed crystal compound semiconductor GaxIn1-UP with donor impurities, when the mixed crystal ratio X becomes 0.52 or more, the concentration of deep levels increases. In order to reduce the concentration of deep levels by suppressing the
We attempted to solve this problem by using an InAs substrate.
本発明は、ＧａＩｎＰのエピタキシャル成長方法とその
構造に関する。The present invention relates to a GaInP epitaxial growth method and its structure.
３元化合物半導体ＧａＩｎＰは、可視光領域の発光素子
、あるいは超高速デバイスの材料として有望視されてい
る。The ternary compound semiconductor GaInP is seen as a promising material for light-emitting elements in the visible light region or ultrahigh-speed devices.
通常ＧａＩｎＰ工ピタキシヤル層は、ＧａＡｓを基板と
して成長させるが、成長に当たってＧａＡｓ基板と格子
整合をとることが必要であり、そのためＧａｘ Ｉ ｎ
＋−ｘＰのＸ値は０．５２に選ばれる。Usually, a GaInP pitaxial layer is grown using GaAs as a substrate, but it is necessary to achieve lattice matching with the GaAs substrate during growth.
The X value of +-xP is chosen to be 0.52.
上記Ｘ値によるＧａ）１１ｎ＋−ｘＰエピタキシャル層
は、ＳまたはＳｉ等のドナ不純物を添加すると深い準位
の濃度が急変する組成領域にある。The Ga)11n+-xP epitaxial layer with the above-mentioned X value is in a composition region where the deep level concentration changes rapidly when donor impurities such as S or Si are added.
深い単位の濃度が高いと、添加したドナ不純物の活性化
率が低下し、また結晶温度によってキャリヤ濃度が太き
（変化する。従って深い準位の濃度を出来るだけ低くす
るのが望ましい。If the concentration in the deep unit is high, the activation rate of the added donor impurity will decrease, and the carrier concentration will increase (change) depending on the crystal temperature. Therefore, it is desirable to make the concentration in the deep level as low as possible.
従来の技術でのＧａＩｎＰのエピタキシャル成長法の一
例を第３図により説明する。An example of a conventional GaInP epitaxial growth method will be explained with reference to FIG.
エピタキシャル成長法としてはＬＰＥ法、ＭＯＣＶＤ法
、ＭＢＥ法、ハライドＶＰＥ法等の何れかの方法が選ば
れる。As the epitaxial growth method, one of the LPE method, MOCVD method, MBE method, halide VPE method, etc. is selected.
結晶基板としては、ＧａＡｓ１板１を用い、この上にＧ
ａＡｓエピタキシャル層２を積層する。A GaAs 1 plate 1 is used as the crystal substrate, and a G
An aAs epitaxial layer 2 is laminated.
その後、ＧａＸＩｒ＋＋−ｘＰ エピタキシャル層３
を成長させる。この場合混晶比率Ｘは、０．５２に選ば
れる。これはＧａＡｓ結晶の格子定数に整合するＧａＩ
ｎＰ結晶のＸ値が０．５２であることによる。After that, GaXIr++-xP epitaxial layer 3
grow. In this case, the mixed crystal ratio X is selected to be 0.52. This is GaI which matches the lattice constant of GaAs crystal.
This is because the X value of the nP crystal is 0.52.
これによりエピタキシャル層のへテロ接合面での結晶転
位欠陥の発生を防止している。This prevents crystal dislocation defects from occurring at the heterojunction surface of the epitaxial layer.
上記に述べた、従来の技術にょるＧａＡｓ基板上にＧａ
ｌｎＰ層をエピタキシャル成長させる方法では、Ｘ値を
０．５２に選定することが必要である。Ga
In the method of epitaxially growing the lnP layer, it is necessary to select the X value to be 0.52.
この状態ではＳあるいはＳｔをドナとして用いてドープ
廿るＧａｌｎＰ層では、添加したドナ原子の１０〜２０
％が深い準位を形成することが判明した。In this state, in a GalnP layer doped using S or St as a donor, 10 to 20 of the added donor atoms
% was found to form a deep level.
ドナ原子の浅い単位に対する深い単位の比率は、Ｘ値が
０．５２付近よりＸ値と共に急増する。The ratio of deep units to shallow units of donor atoms increases rapidly with the X value from around 0.52.
このためドナ添加量を増加してもキャリヤの濃度の増大
は期待出来ず、キャリヤ濃度の正確なる制御を必要とす
るデバイスでは不都合を生ずる。Therefore, even if the amount of donor added is increased, an increase in the carrier concentration cannot be expected, which is inconvenient for devices that require accurate control of carrier concentration.
特に、低温での動作を必要とするＨＥＭＴ等のデバイス
の半導体層としては不適当である。In particular, it is unsuitable as a semiconductor layer for devices such as HEMTs that require operation at low temperatures.
前項で説明せるドナ原子の深い準位の比率は、Ｘ値を０
．５２より小にすると急激に低下し、０．５０になると
殆ど浅い準位のみとなることが判明したのでＧａＩｎＰ
のＸ値としては、０．５０以下の値に選定する。The ratio of the deep level of the donor atom explained in the previous section is
．． It was found that when the value is smaller than 52, the level decreases rapidly, and when it becomes 0.50, there is almost only a shallow level, so GaInP
The X value is selected to be 0.50 or less.
この場合、ＧａＩｎＰ工ピタキシヤル層の格子定数は増
加するので、従来の如＜ＧａＡｓ基板上に成長させると
格子定数の差による整合不良が発生する。In this case, the lattice constant of the GaInP epitaxial layer increases, so if it is grown on a GaAs substrate as in the conventional case, mismatching will occur due to the difference in lattice constant.
従ってＧａＡｓにＩｎＡｓの僅か混入せる３元化合物混
晶ＧａＩｎＡｓを基板に用いて格子定数の整合をとる。Therefore, a ternary compound mixed crystal GaInAs, in which a small amount of InAs is mixed in GaAs, is used for the substrate to match the lattice constants.
即ち、本問題は、Ｇａ、Ｉｎ＋−ｙＡｓ結晶基板を用い
て、該基板上にＧａｘ Ｉ ｒ＋、−、Ｐをエピタキシ
ャル層を積層するに当たり、混晶比率Ｘを０．５０以下
とし、該基板の混晶比率ｙをエピタキシャル層と格子整
合せる結晶組成を用いることにより解決される。That is, this problem is solved by using a Ga, In+-yAs crystal substrate, and when laminating an epitaxial layer of Gax I r+,-, P on the substrate, the mixed crystal ratio X is set to 0.50 or less. This problem can be solved by using a crystal composition that lattice-matches the mixed crystal ratio y with the epitaxial layer.
また、前記と同一の混晶比率でＧａｙＴ １ｌ−ｙＡｓ
結晶基板とＧａＸＩｎ＋−Ｘｐエピタキシャル層との間
に、Ｇａ、Ｉｎ＋−ｙＡｓのエピタキシャル層を成長さ
せても良い。Furthermore, with the same mixed crystal ratio as above, GayT 1l-yAs
An epitaxial layer of Ga, In+-yAs may be grown between the crystal substrate and the GaXIn+-Xp epitaxial layer.
更に、同様前記ＧａｙＩｎ＋−ｙＡｓ結晶基板を用いＧ
ａｘＩｎ１−ｘＰエピタキシャル層とＧａｙＩ ｎ、−
ｙＡｓエピタキシャル層を多層積層せることも可能であ
る。Furthermore, using the same GayIn+-yAs crystal substrate, G
axIn1-xP epitaxial layer and GayIn,-
It is also possible to stack multiple yAs epitaxial layers.
ＧａＸ１ｎ、−ｘＰエピタキシャル層の深い準位のドナ
濃度を低減するため、Ｘ値を小さく選定する。In order to reduce the donor concentration in the deep level of the GaX1n, -xP epitaxial layer, the X value is selected to be small.
これにより発生する格子定数の不整合は、基板としてＧ
ａｙＩｎ＋−ｙＡｓを用い、更に基板のｙ値を格子整合
せる値に選んで解決を図るものである。The lattice constant mismatch caused by this is caused by the G
This problem is solved by using ayIn+-yAs and selecting the y value of the substrate to a value that allows lattice matching.
本発明による一実施例を図面により詳細説明する。 An embodiment according to the present invention will be described in detail with reference to the drawings.
本発明では基板としてＧａｙＩｎｌ−ｙＡｓ結晶を用い
る。Ｇａ１ｎＡｓ結晶は混晶比率ｙ値が０．９８程度の
ものは市販されているが、結晶成長技（ホテの向上に伴
ってＸ値０．９０程度のものも製作可能となっている。In the present invention, a GayInl-yAs crystal is used as the substrate. Ga1nAs crystals with a mixed crystal ratio y value of about 0.98 are commercially available, but as crystal growth techniques have improved, crystals with an x value of about 0.90 can also be produced.
Ｇａ１ｎＡｓ基板はＧａＡｓ基板に比して転位密度が遥
かに小さいという利点も有する。The Ga1nAs substrate also has the advantage of having a much lower dislocation density than the GaAs substrate.
第１図の断面に示すごとく、Ｇａｏ、 ９８１ ｎｏ、
０２ＡＳ基板４を用いて、同しｙ値の組成をもつＧａ
ｏ、ｑｓＩｎｏ、。２ＡＳ工ピタキシヤル層５を成長さ
せる。As shown in the cross section of Figure 1, Gao, 981 no.
Using the 02AS substrate 4, Ga having the same y-value composition
o, qsIno,. 2AS pitaxial layer 5 is grown.
次いで、Ｇａｏ、 ｓｏ Ｉ ｎｏ、 ５０ Ｐエピタ
キシャル層６を成長させる。上記の成長方法でＧａ１ｎ
Ａｓ工ピタキシヤル層５は必ずしも必要な条件ではない
。Next, a Gao, so I no, 50 P epitaxial layer 6 is grown. By the above growth method, Ga1n
The As pitaxial layer 5 is not necessarily a necessary condition.
バルク結晶基板４上に、直接ＧａＩｎＰ工ピタキシヤル
層６を積層するよりも純度の高い成長層が得られる。A growth layer with higher purity can be obtained than by directly stacking the GaInP epitaxial layer 6 on the bulk crystal substrate 4.
上記説明では一例として、Ｘ値として０．５０、ｙ値と
して０．９８を使用したが、Ｘ値としては０．５０以下
であれば構わない。Ｘ値が他の値をとった場合、ｙ値の
決定は格子定数が整合する如く選定を行う。In the above description, as an example, the X value is 0.50 and the y value is 0.98, but the X value may be 0.50 or less. When the X value takes another value, the y value is selected so that the lattice constants match.
簡単にｙ値を決定する方法を第２図により説明する。横
軸に混晶比率Ｘ、ｙをとり、縦軸に格子定数をとる。A method for simply determining the y value will be explained with reference to FIG. The horizontal axis represents the mixed crystal ratios X and y, and the vertical axis represents the lattice constant.
混晶比率が０あるいは１の場合の格子定数は、ＩｎＰ、
ＩｎＡｓ 、ＧａＰ、ＧａＡｓの場合になるので既知で
あり、混晶の場合はその中間をほぼ直線的に変化すると
して結ぶとＧａＩｎＰとＧａ Ｉ ｎＡｓの混晶の格子
定数特性が得られる。When the mixed crystal ratio is 0 or 1, the lattice constant is InP,
This is known since it applies to InAs, GaP, and GaAs, and in the case of mixed crystals, the lattice constant characteristics of GaInP and GaInAs mixed crystals can be obtained by connecting the intermediate values as changing almost linearly.
Ｘ値が０．５０以下の例えば０．４５とすると、乙の場
合のＧａＩｎＰ特性のＡ点より横軸に平行にＧａ１ｎＡ
ｓ特性との交点Ｂを求めで、Ｂ点のｙ値が０．９３とし
て決定される。If the X value is 0.50 or less, for example 0.45, Ga1nA is
By finding the intersection B with the s characteristic, the y value of point B is determined to be 0.93.
以上の説明では、基板上に単層のＧａＩｎＰ工ピタキシ
ヤル層を成長させる場合について述べたが、本発明は単
層のエピタキシャル成長に制約されるものでなく、既に
説明せる混晶比率条件を温泉しておればＧａＩｎＰ、Ｇ
ａ１ｎＡｓのエピタキシャル層を複数層成長せしめるこ
とも問題はない。In the above explanation, a case has been described in which a single-layer GaInP epitaxial layer is grown on a substrate, but the present invention is not limited to single-layer epitaxial growth, and the mixed crystal ratio conditions described above are If GaInP, G
There is no problem in growing a plurality of epitaxial layers of a1nAs.
上記に述べたエピタキシャル層にＡｊ２ＧａｌｎＰ等の
４元化合物半導体を含めた多層エピタキシャル層を形成
する場合も、格子定数の整合条件さえ合致すれば問題が
ない。Even when forming a multilayer epitaxial layer including a quaternary compound semiconductor such as Aj2GalnP in the epitaxial layer described above, there is no problem as long as the lattice constant matching conditions are met.
以上に説明せるごとく、本発明のエピタキシャル成長方
法を適用することによりＧａＩｎＰエピタキシャル層で
のドナ原子が深い単位となる割合は著しく減少し、発光
素子、高速ｉ能素子として性能の向上に寄与する所大で
ある。As explained above, by applying the epitaxial growth method of the present invention, the ratio of donor atoms forming deep units in the GaInP epitaxial layer is significantly reduced, which greatly contributes to improved performance as a light emitting device and a high-speed ionic device. It is.
第１図は本発明にかかわるＧａＩｎＰの成長方法を説明
する断面図、
第２図は本発明の格子整合せる混晶比率の決定を説明す
る図、
第３図は従来のＧａＩｎＰの成長方法を説明す断面図を
示す。
図面において、
１はＧａＡｓ基板、
２はＧａＡｓエピタキシャル層、
３．６はＧａＩｎＰエピタキシャル層、４はＧａ１ｎＡ
ｓ基＋反、
５はＧａＩｎＡｓエピタキシャル層、Figure 1 is a cross-sectional view explaining the GaInP growth method according to the present invention, Figure 2 is a diagram explaining the determination of the mixed crystal ratio for lattice matching according to the present invention, and Figure 3 is a diagram explaining the conventional GaInP growth method. A cross-sectional view is shown. In the drawings, 1 is a GaAs substrate, 2 is a GaAs epitaxial layer, 3.6 is a GaInP epitaxial layer, and 4 is a Ga1nA layer.
s group + anti, 5 is GaInAs epitaxial layer,
Claims (6)
用いて、該基板上にＧａ＿ｘＩｎ＿１＿−＿ｘＰエピタ
キシャル層（６）を積層するに当たり、 該エピタキシャル層の混晶比率ｘを０．５０以下とし、
該基板（４）の混晶比率ｙを、該エピタキシャル層（６
）と格子整合せる結晶組成を用いることを特徴とするＧ
ａＩｎＰのエピタキシャル成長方法。(1) Using a Ga_yIn_1_-_yAs crystal substrate (4) and laminating a Ga_xIn_1_-_xP epitaxial layer (6) on the substrate, the mixed crystal ratio x of the epitaxial layer is set to 0.50 or less,
The mixed crystal ratio y of the substrate (4) is
) is characterized by using a crystal composition that is lattice matched to
A method for epitaxial growth of aInP.
ａ＿ｘＩｎ＿１＿−＿ｘＰエピタキシャル層との間に、
Ｇａ＿ｙＩｎ＿１＿−＿ｙＡｓのエピタキシャル層（５
）の成長工程を加えることを特徴とする特許請求範囲第
（１）項記載のＧａＩｎＰのエピタキシャル成長方法。(2) The Ga_yIn_1_-_yAs crystal substrate and the G
Between the a_xIn_1_-_xP epitaxial layer,
Epitaxial layer of Ga_yIn_1_-_yAs (5
2. A GaInP epitaxial growth method according to claim (1), characterized in that the growth step (1) is added.
いて、Ｇａ＿ｘＩｎ＿１＿−＿ｘＰエピタキシャル層と
Ｇａ＿ｙＩｎ＿１＿−＿ｙＡｓエピタキシャル層を多層
積層せることを特徴とする特許請求範囲第（１）項記載
のＧａＩｎＰのエピタキシャル成長方法。(3) The GaInP epitaxial growth method according to claim (1), characterized in that a Ga_xIn_1_-_xP epitaxial layer and a Ga_yIn_1_-_yAs epitaxial layer are laminated in multiple layers using the Ga_yIn_1_-_yAs crystal substrate.
＿１＿−＿ｘＰエピタキシャル層（６）を、該エピタキ
シャル層と格子整合せる混晶比率ｙよりなるＧａ＿ｙＩ
ｎ＿１＿−＿ｙＡｓ結晶基板（４）上に成長せしめたこ
とを特徴とするＧａＩｎＰのエピタキシャル成長層の構
造。(4) Ga_xIn with a mixed crystal ratio x of 0.50 or less
Ga_yI having a mixed crystal ratio y that lattice-matches the _1_-_xP epitaxial layer (6) with the epitaxial layer.
The structure of an epitaxial growth layer of GaInP, which is grown on an n_1_-_yAs crystal substrate (4).
ａ＿ｘＩｎ＿１＿−＿ｘＰエピタキシャル層との間に、
Ｇａ＿ｙＩｎ＿１＿−＿ｙＡｓのエピタキシャル層（５
）を積層せることを特徴とする特許請求範囲第（４）項
記載のＧａＩｎＰのエピタキシャル成長層の構造。(5) The Ga_yIn_1_-_yAs crystal substrate and the G
Between the a_xIn_1_-_xP epitaxial layer,
Epitaxial layer of Ga_yIn_1_-_yAs (5
) The structure of the GaInP epitaxially grown layer according to claim (4), characterized in that the GaInP epitaxial growth layer is laminated.
、Ｇａ＿ｘＩｎ＿１＿−＿ｘＰエピタキシャル層とＧａ
＿ｙＩｎ＿１＿−＿ｙＡｓエピタキシャル層を多層積層
せることを特徴とする特許請求範囲第（５）項記載のＧ
ａＩｎＰのエピタキシャル成長層の構造。(6) On the Ga_yIn_1_-_yAs crystal substrate, a Ga_xIn_1_-_xP epitaxial layer and a Ga
G according to claim (5), characterized in that _yIn_1_-_yAs epitaxial layers are laminated in multiple layers.
Structure of an epitaxially grown layer of aInP.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5089186A JP2533086B2 (en) | 1986-03-07 | 1986-03-07 | Method and structure for epitaxial growth of GaInP |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5089186A JP2533086B2 (en) | 1986-03-07 | 1986-03-07 | Method and structure for epitaxial growth of GaInP |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62208621A true JPS62208621A (en) | 1987-09-12 |
| JP2533086B2 JP2533086B2 (en) | 1996-09-11 |
Family
ID=12871355
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5089186A Expired - Lifetime JP2533086B2 (en) | 1986-03-07 | 1986-03-07 | Method and structure for epitaxial growth of GaInP |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2533086B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5221367A (en) * | 1988-08-03 | 1993-06-22 | International Business Machines, Corp. | Strained defect-free epitaxial mismatched heterostructures and method of fabrication |
| US6555850B1 (en) | 1999-02-19 | 2003-04-29 | Sumitomo Electric Industries, Ltd. | Field-effect transistor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5172291A (en) * | 1974-12-20 | 1976-06-22 | Fujitsu Ltd |
-
1986
- 1986-03-07 JP JP5089186A patent/JP2533086B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5172291A (en) * | 1974-12-20 | 1976-06-22 | Fujitsu Ltd |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5221367A (en) * | 1988-08-03 | 1993-06-22 | International Business Machines, Corp. | Strained defect-free epitaxial mismatched heterostructures and method of fabrication |
| US6555850B1 (en) | 1999-02-19 | 2003-04-29 | Sumitomo Electric Industries, Ltd. | Field-effect transistor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2533086B2 (en) | 1996-09-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5770868A (en) | GaAs substrate with compositionally graded AlGaAsSb buffer for fabrication of high-indium fets | |
| KR100319300B1 (en) | Semiconductor Device with Quantum dot buffer in heterojunction structures | |
| US5599389A (en) | Compound semiconductor and method of manufacturing the same | |
| JPS63169717A (en) | Semiconductor device | |
| EP0249371A2 (en) | Semiconductor device including two compound semiconductors, and method of manufacturing such a device | |
| US5001521A (en) | Semiconductor substrate including strained layer superlattice structure layer | |
| KR101069571B1 (en) | High electron mobility epitaxial substrate | |
| KR101032010B1 (en) | Compound Semiconductor Epitaxial Substrate and Manufacturing Method Thereof | |
| JPS62208621A (en) | Epitaxial growth of gainp and structure thereof | |
| US20060192228A1 (en) | Compound semiconductor epitaxial substrate and method for manufacturing same | |
| US7550786B2 (en) | Compound semiconductor epitaxial substrate | |
| JP2000124444A (en) | Semiconductor device and epitaxial wafer | |
| JP3044835B2 (en) | Magnetoelectric conversion element | |
| JPH0289325A (en) | Compound semiconductor structure and its formation method | |
| JPS63143810A (en) | Vapor growth of compound semiconductor | |
| JP3255798B2 (en) | Compound semiconductor device and method of manufacturing the same | |
| JPH02303068A (en) | Semiconductor lamination structure and semiconductor element having same | |
| JPH02159718A (en) | compound semiconductor crystal | |
| JP3399044B2 (en) | Hall element and method of manufacturing the same | |
| JPH09246526A (en) | Gallium / Indium / Phosphorus High Electron Mobility Transistor | |
| JPH05291137A (en) | Semiconductor material and its manufacture | |
| JPH05175226A (en) | Semiconductor substrate | |
| JPH08330236A (en) | Organometal vapor growth method | |
| JPH07135304A (en) | Compound semiconductor device, method of manufacturing the same, and method of measuring defect in compound semiconductor layer | |
| JPH08208397A (en) | Vapor growth method of compound semiconductor |