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JPS6217959B2 - - Google Patents

Info

Publication number
JPS6217959B2
JPS6217959B2 JP13433481A JP13433481A JPS6217959B2 JP S6217959 B2 JPS6217959 B2 JP S6217959B2 JP 13433481 A JP13433481 A JP 13433481A JP 13433481 A JP13433481 A JP 13433481A JP S6217959 B2 JPS6217959 B2 JP S6217959B2
Authority
JP
Japan
Prior art keywords
capacitor
voltage
transistor
transistors
capacitors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13433481A
Other languages
Japanese (ja)
Other versions
JPS5836171A (en
Inventor
Seiya Matsuzawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP13433481A priority Critical patent/JPS5836171A/en
Publication of JPS5836171A publication Critical patent/JPS5836171A/en
Publication of JPS6217959B2 publication Critical patent/JPS6217959B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Amplifiers (AREA)

Description

【発明の詳細な説明】 本発明は高圧直流電圧を低圧直流電圧に変換す
る、比較的小容量のトランジスタチヨツパ装置に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a relatively small capacity transistor chopper device for converting a high DC voltage into a low DC voltage.

船舶あるいは車輛等において、一次電源として
蓄電池を搭載するものがあるが、船舶または車輛
などの様に、そのスペースが限られるものでは、
搭載する電気機器を小形にするために、電源電圧
を高圧化する場合がある。またこれ等の電気機器
を制御するため、およびその制御装置の制御電源
として比較的小容量の直流電源が必要であり、こ
のため高圧直流電圧を低圧直流電圧に変換する小
容量のチヨツパ装置が用いられている。
Some ships and vehicles are equipped with storage batteries as a primary power source, but in ships and vehicles where space is limited,
The power supply voltage may be increased to make the installed electrical equipment more compact. In addition, a relatively small-capacity DC power source is required to control these electrical devices and as a control power source for the control device, and therefore a small-capacity chopper device that converts high-voltage DC voltage to low-voltage DC voltage is used. It is being

従来この種のチヨツパ装置を半導体素子によつ
て構成する場合、サイリスタ等の小容量高耐圧の
素子は入手し難く、高耐圧のものは大容量となる
ため高価となる。またトランジスタを使用する場
合は耐圧の不足から直列接続で使用することにな
るが、トランジスタのターンオフタイムのバラツ
キが大きく、トランジスタの分担電圧を均等にす
る分圧回路の損失が増大し、トランジスタの損失
も増大させるという欠点があつた。
Conventionally, when this type of chopper device is constructed from semiconductor elements, small-capacity, high-voltage elements such as thyristors are difficult to obtain, and high-voltage elements have a large capacity and are therefore expensive. In addition, when using transistors, they are connected in series due to the lack of withstand voltage, but the turn-off time of the transistors varies widely, and the loss of the voltage divider circuit that equalizes the shared voltage of the transistors increases. It also has the disadvantage of increasing the amount of

本発明は上記の事情に鑑みてなされたもので、
分圧回路の損失を軽減すると共に分圧精度を向上
させ、高効率の直列トランジスタチヨツパ装置を
提供することを目的とする。
The present invention was made in view of the above circumstances, and
It is an object of the present invention to provide a highly efficient series transistor chopper device that reduces loss in a voltage dividing circuit and improves voltage dividing accuracy.

図は本発明の一実施例を示す図である。 The figure shows an embodiment of the present invention.

図において、Bは直流電源、Lは負荷、FDは
フリーホイールダイオード、Q1,Q2は主トラ
ンジスタで、図示しない駆動回路によりON,
OFFされる。C1,C2は分圧コンデンサで、
ダイオードD1,D2により主トランジスタQ
1,Q2のターンオフ直後の分担電圧がコンデン
サC1,C2の充電電圧で制限される。抵抗R
3,R4はコンデンサC1,C2の充電電圧の不
平衡を検出し、トランジスタQ3、またはQ4を
ONとして放電抵抗R1またはR2を介してコン
デンサの充電電圧を放電する構成となつている。
ここでコンデンサC1とC2、放電抵抗R1とR
2、および抵抗R3とR4の値はそれぞれ等しく
選定されている。
In the figure, B is a DC power supply, L is a load, FD is a freewheeling diode, and Q1 and Q2 are main transistors, which are turned on and off by a drive circuit (not shown).
It will be turned off. C1 and C2 are voltage dividing capacitors,
Main transistor Q by diodes D1 and D2
The shared voltage immediately after turn-off of C1 and Q2 is limited by the charging voltage of capacitors C1 and C2. Resistance R
3, R4 detects the unbalance of the charging voltage of capacitors C1 and C2, and connects transistor Q3 or Q4.
When turned ON, the charging voltage of the capacitor is discharged via the discharge resistor R1 or R2.
Here, capacitors C1 and C2, discharge resistors R1 and R
2, and the values of resistors R3 and R4 are each chosen to be equal.

いま、トランジスタQ1,Q2はOFFとすれ
ば、コンデンサC1,C2は直流電源B→ダイオ
ードD1→コンデンサC1→コンデンサC2→ダ
イオードD2→負荷L→直流電源Bの経路で充電
され、コンデンサC1とコンデンサC2の充電電
圧の和は直流電源電圧Edとなつている。この時
コンデンサC1とコンデンサC2の充電電圧VC1
およびVC2が等しいとする。
Now, if transistors Q1 and Q2 are turned off, capacitors C1 and C2 are charged along the path of DC power supply B → diode D1 → capacitor C1 → capacitor C2 → diode D2 → load L → DC power supply B, and capacitor C1 and capacitor C2 The sum of the charging voltages is the DC power supply voltage Ed. At this time, the charging voltage of capacitor C1 and capacitor C2 V C1
and V C2 are equal.

次にトランジスタQ1,Q2がONになると、
コンデンサC1とC2の電荷はコンデンサC1→
抵抗R3→抵抗R4→コンデンサC2→コンデン
サC1の経路で放電されるが、コンデンサC1と
C2の値が等しく選定されているので、各コンデ
ンサの充電電圧はVC1=VC2の関係にある。
Next, when transistors Q1 and Q2 turn on,
The charges of capacitors C1 and C2 are capacitor C1→
It is discharged along the path of resistor R3→resistor R4→capacitor C2→capacitor C1, but since the values of capacitors C1 and C2 are selected to be equal, the charging voltage of each capacitor has a relationship of V C1 =V C2 .

次に再びトランジスタQ1とQ2がOFFにな
るが、この時トランジスタのターンオフタイムの
ばらつきによりトランジスタQ1がtsecだけ先に
ターンオフしたとすると、この期間負荷電流IL
は直流電源B→ダイオードD1→コンデンサC1
→トランジスタQ2→負荷L→直流電源Bの経路
で流れコンデンサC1を充電する。この期間のコ
ンデンサC1の充電電圧の増加分△VCは △VC=I×t/C1 となる。コンデンサC1の電圧がコンデンサC2
の電圧より△VCだけ上昇すると抵抗R3,R4
の分圧電圧はコンデンサC1,C2の分圧電圧よ
り高くなり、トランジスタQ3をONにする。こ
の時トランジスタQ3のベース電流IBは、トラ
ンジスタQ3のベース・エミツタ間電圧を無視す
れば IB=VC1/R−VC2/R ここで、△VC=VC1−VC2,R3=R4であるか
ら IB=VC1−VC2/R=△V/R となる。すなわち、トランジスタQ3はコンデン
サC1の充電電圧VC1がコンデンサC2の充電電
圧VC2より高くなると、ON状態になり、コンデ
ンサC1の電荷を抵抗R1を介して放電し続け、
C1とVC2が等しくなつた時点で、トランジスタ
Q3はOFF状態に戻る。コンデンサC2の充電
電圧VC2がコンデンサC1の充電電圧VC1より高
くなつた場合も同様にトランジスタQ4がオンに
なり、VC2=VC1になるまで、抵抗R2を介して
コンデンサC2の電荷を放電する。
Next, transistors Q1 and Q2 are turned off again, but at this time, assuming that transistor Q1 is turned off earlier by tsec due to variations in the turn-off time of the transistors, the load current I L during this period
is DC power supply B → diode D1 → capacitor C1
→ Transistor Q2 → Load L → DC power supply B flows and charges the capacitor C1. The increase in the charging voltage of the capacitor C1 during this period ΔV C is ΔV C =I L ×t/C1. The voltage of capacitor C1 is the voltage of capacitor C2
When the voltage increases by △V C , the resistors R3 and R4
The divided voltage becomes higher than the divided voltage of capacitors C1 and C2, turning on transistor Q3. At this time, the base current I B of the transistor Q3 is, if the voltage between the base and emitter of the transistor Q3 is ignored, I B =V C1 /R 3 -V C2 /R 4Here , △V C =V C1 -V C2 , Since R 3 =R 4 , I B =V C1 -V C2 /R 3 =ΔV C /R 3 . That is, when the charging voltage V C1 of the capacitor C1 becomes higher than the charging voltage V C2 of the capacitor C2, the transistor Q3 turns on and continues to discharge the charge of the capacitor C1 via the resistor R1.
When V C1 and V C2 become equal, transistor Q3 returns to the OFF state. Similarly, when the charging voltage V C2 of capacitor C2 becomes higher than the charging voltage V C1 of capacitor C1, transistor Q4 turns on and discharges the charge of capacitor C2 via resistor R2 until V C2 = V C1 . do.

以上の説明の如く、本発明は直列に接続された
2個の主トランジスタから成る直列トランジスタ
チヨツパ装置において、各主トランジスタの分担
電圧を正確に平衡させることができるので、トラ
ンジスタの耐圧を十分生かすことができ、高電圧
入力のトランジスタチヨツパ装置を構成すること
が可能となる。またそれぞれの分圧回路は、主ト
ランジスタのターンオフタイムの差によるコンデ
ンサの不平衡電圧のみを抵抗を介して放電するだ
けなので、その電力損失は極めて少なく、高効率
のトランジスタチヨツパ装置を提供することがで
きる。
As described above, in a series transistor chopper device consisting of two main transistors connected in series, the present invention can accurately balance the shared voltages of each main transistor, so that the withstand voltage of the transistor can be sufficiently increased. This makes it possible to construct a transistor chopper device with high voltage input. In addition, each voltage divider circuit discharges only the unbalanced voltage of the capacitor due to the difference in turn-off time of the main transistors through the resistor, so the power loss is extremely small, providing a highly efficient transistor chopper device. be able to.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本発明のトランジスタチヨツパ装置の一
実施例を示す図である。 B…直流電源、L…負荷、FD…フリーホイー
ルダイオード、Q1,Q2…主トランジスタ、C
1,C2…分圧コンデンサ、D1,D2…ダイオ
ード、R1,R2…放電抵抗、R3,R4…抵
抗、Q3,Q4…トランジスタ。
The drawing shows an embodiment of the transistor chopper device of the present invention. B...DC power supply, L...load, FD...freewheel diode, Q1, Q2...main transistor, C
1, C2...Voltage dividing capacitor, D1, D2...Diode, R1, R2...Discharge resistor, R3, R4...Resistor, Q3, Q4...Transistor.

Claims (1)

【特許請求の範囲】[Claims] 1 直列に接続された2個の主トランジスタと、
コンデンサが互いに接続されるように、それぞれ
主トランジスタに並列接続された2組のダイオー
ドとコンデンサの直列回路と、それぞれのコンデ
ンサに抵抗を介し、エミツタが互いに接続される
ように並列接続された相補型トランジスタと、互
いに接続された相補型トランジスタのベースと前
記ダイオードとコンデンサの接続点の間に接続さ
れた2個の抵抗器を具備し、コンデンサにより分
圧された2個の主トランジスタの分担電圧が等し
くなるようにしたことを特徴とするトランジスタ
チヨツパ装置。
1 two main transistors connected in series,
A series circuit of two sets of diodes and capacitors, each connected in parallel to the main transistor so that the capacitors are connected to each other, and a complementary type in which each capacitor is connected in parallel through a resistor so that the emitters are connected to each other. The transistor includes two resistors connected between the bases of the complementary transistors connected to each other and the connection point of the diode and the capacitor, and the shared voltage of the two main transistors divided by the capacitor is A transistor chopper device characterized in that the transistors are made equal to each other.
JP13433481A 1981-08-28 1981-08-28 Transistor chopper Granted JPS5836171A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13433481A JPS5836171A (en) 1981-08-28 1981-08-28 Transistor chopper

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13433481A JPS5836171A (en) 1981-08-28 1981-08-28 Transistor chopper

Publications (2)

Publication Number Publication Date
JPS5836171A JPS5836171A (en) 1983-03-03
JPS6217959B2 true JPS6217959B2 (en) 1987-04-20

Family

ID=15125908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13433481A Granted JPS5836171A (en) 1981-08-28 1981-08-28 Transistor chopper

Country Status (1)

Country Link
JP (1) JPS5836171A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2547106B1 (en) * 1983-05-30 1985-07-12 Cem Comp Electro Mec BALANCING DEVICE OF SERIAL CONNECTED SWITCHES

Also Published As

Publication number Publication date
JPS5836171A (en) 1983-03-03

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