JPS62173547A - Data processor - Google Patents

Abstract

PURPOSE:To improve the secrecy and to avoid the easy rewriting of the important data by using the data written to the specific address of a nonvolatile memory as a key word to release a write protecting mechanism. CONSTITUTION:A specific address set by an address setter 15 is compared with the address of a nonvolatile memory 13 outputted from a central processing unit CPU by an address comparator 11. When a writing action is given to the specific address set by the setter 15, a key data reading controller 12 is actuated by the output of the comparator 11. Then the key data on the specific address of the memory 13 is supplied to a data comparator 14 and compared with the data delivered from the CPU. When the coincidence is secured between both data, a write protection mode register 22 is switched to a writable mode from a write protection mode. Then the write signal is supplied to the memory 13 from an AND gate 23.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data processing device using nonvolatile memory.

[Conventional technology]

2. Description of the Related Art Conventionally, some data processing apparatuses using battery-backed nonvolatile memory or electrically erasable ROM have a protection mechanism for protecting data against unintended writing.

[Problem that the invention seeks to solve]

The above-mentioned conventional write protection mechanism performs the write protection operation using a write inhibit register.

If a third party learns of the existence of this write-protected register, it is easy to remove the write-protection function and prevent highly confidential data from being stored in the non-volatile memory device. The drawback was that it could not be used for storage purposes.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data processing device that eliminates these drawbacks, improves confidentiality, and prevents important data from being easily rewritten.

[Means for solving problems]

The configuration of the present invention is that, in a data processing device having a non-volatile memory in which write-protection key data is stored in advance at a specific address, an address comparison is performed in which an address input from an address setting means is compared with a specific address of the memory. a data comparing means for comparing stored data for the specific address of the memory with data to be written; and a write control for permitting writing to the memory when there is a matching output from the data comparing means. means and
The apparatus is characterized in that it includes a succession control means for permitting reading of data other than the specific address when there is a match output from the address comparison means and no match output from the data comparison means, and protects the memory.

r Example] Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing a write protection mechanism of a nonvolatile memory device according to an embodiment of the present invention. In the figure, 11
is an address comparator, which compares the address of the address setter 15 and the address of the nonvolatile memory 13 output from the central processing unit. Reference numeral 12 denotes a key data read controller for write protection, which inputs data from the nonvolatile memory 13 to the data comparator 14 when a write operation is performed to the address set by the address setter 15 in the write protection mode. Control the output of key data for write protection. This data comparator 14 compares the data output from the central processing unit with the key data for read write protection from the non-volatile memory 13, and when they are equal, writes the write protection mode register 22. Set from protected mode to writable mode.

AND gate 23 supplies a write signal to nonvolatile memory 13 in the writable mode. AND gate 16,
The inverter 17 and the AND gate I/18 are for prohibiting key data for write protection from being read out to the outside in the write protection mode. One inverter and an AND gate 20 prohibit reading of key data for write protection of the key data read controller 12 in the write enable mode.

〔Effect of the invention〕

As explained above, the present invention improves confidentiality compared to conventional write protection mechanisms by using data written to a specific address in nonvolatile memory as a keyword for canceling the write protection mechanism. do. Furthermore, since it is possible to change this keyword in a timely manner, it is possible to further enhance confidentiality, and it is possible to easily realize a data processing device that can store important data that cannot be easily rewritten. I can do it.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a data write protection mechanism according to an embodiment of the present invention. 11... Address comparator, 12... Read controller,
13... Non-volatile memory, 14... Data comparator,
15... Address enactor, 16, 18, 20.23.
...AND gate, 17.19...Inverter, 21
...OR gate, 22...mode register.

Claims (1)

[Claims] In a data processing device having a non-volatile memory in which write-protection key data is stored in advance at a specific address, an address comparing means for comparing an address input from an address setting means and a specific address of the memory, and the memory data comparison means for comparing the stored data for the specific address of the memory and the data to be written;
a write control means for permitting writing to the memory when there is a match output from the data comparison means; and a write control means for permitting writing to the memory when there is a match output from the address comparison means and when there is no match output from the data comparison means, reading data other than the specific address; 1. A data processing device, comprising: read control means for permitting readout, and protects the memory.