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JPS62128597A - Multilayer printed wiring board - Google Patents

Multilayer printed wiring board

Info

Publication number
JPS62128597A
JPS62128597A JP60269011A JP26901185A JPS62128597A JP S62128597 A JPS62128597 A JP S62128597A JP 60269011 A JP60269011 A JP 60269011A JP 26901185 A JP26901185 A JP 26901185A JP S62128597 A JPS62128597 A JP S62128597A
Authority
JP
Japan
Prior art keywords
printed wiring
multilayer printed
wiring board
conductor
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60269011A
Other languages
Japanese (ja)
Inventor
辛島 義久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Condenser Co Ltd filed Critical Hitachi Condenser Co Ltd
Priority to JP60269011A priority Critical patent/JPS62128597A/en
Publication of JPS62128597A publication Critical patent/JPS62128597A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は多層印刷配線板にrIJるものである。[Detailed description of the invention] (Industrial application field) The present invention applies to multilayer printed wiring boards.

(従来の技術) 機器の小型化に住い、3層以上の多層印刷配線板のス°
j要が増加している。
(Conventional technology) In order to miniaturize equipment, the speed of multilayer printed wiring boards with three or more layers has increased.
The number of j-points is increasing.

従来、多層印刷配線板にJ3いて、導体m間をコンデン
サにより接続する回路、例えばグランドや電源に対づる
パスコン等を用いる場合がある。これは、基板の内層と
外層とを接続するためにスルー jj、−ルをX2 +
Jるどとbに接続パッドを設【ノ、f−ップクイブのコ
ンデンリを半田付けする(に成となっている。
Conventionally, a circuit such as a bypass capacitor connected to a ground or a power source is sometimes used in a multilayer printed wiring board to connect the conductors m using a capacitor. This is done by connecting the inner and outer layers of the board through the x2 +
Install the connection pads on J-rudo and b.

(発明が解決しようとする問題点) しかし、このような構成の回路では、他の電子部品の実
装面積が縮少し、また、(を碩[生も低い1ぺ点があっ
た。
(Problems to be Solved by the Invention) However, in a circuit with such a configuration, the mounting area of other electronic components is reduced, and there is also a low 1 point.

本発明は、以上の欠点を改良し、高密度1ヒか容易で信
頼性を向[しうる多膚印計り配線板の1ヱ(1ζを目的
とするものである。
The object of the present invention is to improve the above-mentioned drawbacks, and to create a multi-print measuring wiring board that is easy to use and has improved reliability.

(1111題点を解決づろ];めの手段)本発明は、上
記の目的を達成でるために、?8 ’J層を介して導体
を3層以上に積層した多層印刷配線板にJ3いて、$8
縁否の一部を形成づるlO誘電゛競の物質と、該物質を
挟持する導7r1層とからなるコンデン奮すを設けるこ
とを特徴とする多層印刷配線板を提供するものである。
(Means for solving the 1111 problem) In order to achieve the above object, the present invention has the following features. 8' J3 is a multilayer printed wiring board in which three or more layers of conductors are laminated via the J layer, $8
The present invention provides a multilayer printed wiring board characterized in that it is provided with a condenser layer consisting of a lO dielectric material forming a part of the border and a conductor layer sandwiching the material.

(作用) 本発明は、外部からコンデン)Jを取り付()ることな
く、絶11層の一部を形成する高誘電率の物買と、該動
71を挟持する導電苦とにより」ンデンリを形成してい
るため、他の1子部品の実装面(^を拡大でき、(ε・
11↑1も向上ザる。
(Function) The present invention provides a high dielectric constant material that forms a part of the absolute layer 11 and a conductive material that sandwiches the conductive layer 71 without attaching the condenser layer 71 from the outside. , it is possible to enlarge the mounting surface (^) of another single child component, and (ε・
11↑1 also improved.

(実帷(?1) 以下、本発明を図示の実施例に基づいて説明する。(Actual mail (?1) Hereinafter, the present invention will be explained based on illustrated embodiments.

1は、スルーホールであり、モの周面に無電解めっき等
により導体2が形成されている。3及び4は基1反5の
表面に設置)られた信号用の導体である。6及び7は基
板5の表面に設けられた半田レジストである。)8及び
9は基板5の内部に設【プられた電源用及びグランド用
の導体である。10及び11はj9143と導体8及び
導体4と導体9の間にfa層されたシート状等の絶縁層
である。12は待に導体3と導体8との間に設けられた
円形や角形状の高誘電率シートあるいは印刷物からなる
絶縁層である。13は内層の導体8及び9間を絶縁しう
る紙フエノール樹脂積層板や紙エボヤシ樹脂積項(反、
ガラスエポキシ樹脂積層板等からなる絶縁層である。
1 is a through hole, and a conductor 2 is formed on the circumferential surface of the hole by electroless plating or the like. 3 and 4 are signal conductors installed on the surface of the base 1 and 5. 6 and 7 are solder resists provided on the surface of the substrate 5. ) 8 and 9 are conductors for power supply and ground provided inside the board 5. Reference numerals 10 and 11 are sheet-like insulating layers formed between the j9143 and the conductor 8, and between the conductor 4 and the conductor 9. Reference numeral 12 denotes an insulating layer formed between the conductor 3 and the conductor 8 and made of a circular or angular high dielectric constant sheet or printed material. 13 is a paper phenol resin laminate or a paper ebony resin product term (reverse,
This is an insulating layer made of a glass epoxy resin laminate or the like.

丈なわら、上記実施例にJ、れば、(ご8用の・り休3
と電源用の導体8との間に部分的に高誘Iπ十のシート
を;2けているために、この間で]ンデン寸が形成され
る。それ故に、外部からコンデンリを接続することなく
、実技面積の拡大がはかれ、(3頼性が向[する。
If the above example is J, (for
Since a sheet of high dielectric constant Iπ0 is partially placed between the conductor 8 and the power supply conductor 8, a gap is formed between the conductor 8 and the conductor 8 for power supply. Therefore, the practical area can be expanded without connecting condensers from the outside, and reliability can be improved.

なお、上記実施例では4層の多層1反を示したが3層あ
るいは5層以上でもよい。
In addition, in the above embodiment, a multi-layer structure of 4 layers was shown, but 3 layers or 5 or more layers may be used.

(発明の効果) 以上の通り、本発明によれば、外部からコンデン1fを
取り付けることなく、コンデンサを内蔵させているため
に他の電子部品の実技面積を拡大でき、信頼性を向上し
つる多層印刷配線数がIIPられる。
(Effects of the Invention) As described above, according to the present invention, since the capacitor 1f is built-in without attaching the capacitor 1f from the outside, the practical area of other electronic components can be expanded, reliability can be improved, and multilayer The number of printed wiring is IIP.

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案実施例の断面図を示す。 2、  3.  4.  8.  9  ・・・ 導 
体 、    5 ・・・ 基 1反 、10.11,
12.13・・・絶縁層。
The figure shows a sectional view of an embodiment of the present invention. 2, 3. 4. 8. 9... Guidance
Body, 5...Group 1 anti, 10.11,
12.13...Insulating layer.

Claims (1)

【特許請求の範囲】[Claims] (1)絶縁層を介して導体を3層以上に積層した多層印
刷配線板において、絶縁層の一部を形成する高誘電率の
物質と、該物質を挟持する導電層とからなるコンデンサ
を設けることを特徴とする多層印刷配線板。
(1) In a multilayer printed wiring board in which three or more layers of conductors are laminated with an insulating layer interposed therebetween, a capacitor consisting of a material with a high dielectric constant forming part of the insulating layer and a conductive layer sandwiching the material is provided. A multilayer printed wiring board characterized by:
JP60269011A 1985-11-29 1985-11-29 Multilayer printed wiring board Pending JPS62128597A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60269011A JPS62128597A (en) 1985-11-29 1985-11-29 Multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60269011A JPS62128597A (en) 1985-11-29 1985-11-29 Multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPS62128597A true JPS62128597A (en) 1987-06-10

Family

ID=17466423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60269011A Pending JPS62128597A (en) 1985-11-29 1985-11-29 Multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPS62128597A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01189998A (en) * 1988-01-26 1989-07-31 Matsushita Electric Works Ltd Lcr multilayer board
JPH02116195A (en) * 1988-10-26 1990-04-27 Matsushita Electric Ind Co Ltd Multilayer thick film hybrid integrated circuit
JP2001015928A (en) * 1999-07-02 2001-01-19 Ibiden Co Ltd Multilayer printed wiring board and its manufacture
US6214445B1 (en) 1998-12-25 2001-04-10 Ngk Spark Plug Co., Ltd. Printed wiring board, core substrate, and method for fabricating the core substrate
JP2008205457A (en) * 2007-02-16 2008-09-04 Samsung Electronics Co Ltd Multilayer printed circuit board

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01189998A (en) * 1988-01-26 1989-07-31 Matsushita Electric Works Ltd Lcr multilayer board
JPH02116195A (en) * 1988-10-26 1990-04-27 Matsushita Electric Ind Co Ltd Multilayer thick film hybrid integrated circuit
US6214445B1 (en) 1998-12-25 2001-04-10 Ngk Spark Plug Co., Ltd. Printed wiring board, core substrate, and method for fabricating the core substrate
JP2001015928A (en) * 1999-07-02 2001-01-19 Ibiden Co Ltd Multilayer printed wiring board and its manufacture
JP2008205457A (en) * 2007-02-16 2008-09-04 Samsung Electronics Co Ltd Multilayer printed circuit board
JP4675387B2 (en) * 2007-02-16 2011-04-20 三星電子株式会社 Multilayer printed circuit board
US8194416B2 (en) 2007-02-16 2012-06-05 Samsung Electronics Co., Ltd. Multilayer printed circuit board having electromagnetic wave reduction member

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