JPS62120041A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a U-shaped groove and to form an impurity region on the entire surface of the U-shaped groove by anisotropically etching a semiconductor substrate with etching gas including an impurity diffusing source gas while holding the substrate at a predetermined high temperature state. CONSTITUTION:CF4+O2 gas 7 and BF3 gas 8 fed into a chamber 3 becomes a plasma state by a high frequency power source 6, and are emitted to a wafer 5 by applying a voltage to an electrode 4. Thus, the ionized boron ions are first adhered to a silicon substrate 1. Then, since the substrate 1 is heated by a heater 9 to a high temperature, the adhered boron ions are diffused in the substrate to form a P-type region. The activated radical F generated by the ionization of the CF4 gas anisotropically etches the substrate 1 tom form a U-shaped groove. The substrate 1 is simultaneously etched with the adherence and diffusion of the boron ions and the radical F.

Description

[Detailed Description of the Invention] [Required] A method for manufacturing a semiconductor device, which includes mixing an etching gas with a source gas for impurity diffusion to diffuse impurities over the entire surface including the sidewalls of a trench. The U-groove can be formed easily.

[Industrial application field]

This article relates to a method of manufacturing a conductor device, and in particular to a method of manufacturing a conductor device in which a U-groove is formed by dry etching.

[Conventional technology]

Conventionally, there is a U-groove element isolation method as one of the element isolation techniques, but one of its requirements is that it is necessary to form a U-groove in a silicon substrate. FIG. 3 is a diagram explaining a conventional method of forming a U-groove, in which 1 is a silicon substrate, 2 is an insulating film used as a mask when etching the substrate, and CF4+02 gas is used for etching. The silicon substrate 1 is etched by the activated radicals F generated by the plasma. At this time, if the etching is made anisotropic, a U groove is formed.

[Problem that the invention seeks to solve]

By the way, in order to complete the isolation between the elements, it is necessary to
It is necessary to form an impurity region over the entire surface of the trench. Conventionally, impurity regions have generally been formed by ion implantation. However, with the ion implantation method, even if it is possible to implant impurities into the base of the U-groove, it is difficult to implant them into the sidewalls.Therefore, since an impurity region cannot be formed on the sidewalls, it is not possible to prevent the generation of leakage current. There is.

Unhappened II was created in view of the problems of the conventional example, and is a semiconductor device that makes it possible to form a U-groove and to form an impurity region on the entire surface of the U-groove including the sidewalls. The purpose is to provide a manufacturing method.

[Means for solving problems]

The present invention performs anisotropic etching using an etching gas containing a source gas for impurity diffusion while holding a semiconductor substrate at a constant high temperature, thereby simultaneously forming a U-groove and etching the entire surface of the U-groove. It is characterized by forming an impurity region.

[Effect]

A U-groove is formed in the substrate by etching with an etching gas. At the same time, the impurity diffusion gas adheres to the surface of the U-groove and diffuses into the substrate, making it possible to form an impurity region over the entire surface of the U-groove.

〔Example〕

Next, refer to the diagram and select tree 9. An example of a river will be explained. FIG. 1 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention, in which 3 is a chamber, 4 is an electrode, and 5
6 is a wafer on which a U-groove is to be formed, and 6 is a high frequency power source. 7 is CFs+02 gas for etching,
8 is BF3 gas for impurity diffusion, 9 is wafer 5
This is a heater that heats the water to around 1000°C.

Further, FIGS. 2(L) and 2(b) are cross-sectional views showing how a U-groove is formed in the semiconductor substrate l of the wafer 5 by this manufacturing method.

The operation of the embodiment will be explained with reference to FIGS. 1 and 2. CF4 introduced into Changhe- +0
7 Gas 7 and BF3 Gas 8 has a high 1.1 wave 'r(f.

The plasma is brought into a plasma state by the source 6, and the wafer 5 is further irradiated by the voltage applied between the electrodes 4.

As a result, the dissociated poron ions are first released as "silicon", (
Since the zero-order silicon substrate l attached to the surface of the plate l is heated by the heater 9 and is in a high temperature state, the attached poron ions diffuse into the substrate and form a P layer region (
Figure 2(a)).

On the other hand, activated radicals F generated by gas dissociation into CF anisotropically etch the silicon substrate 1 to form a U-groove.

The adhesion and diffusion of the poron and ions and the etching of the silicon substrate 1 by the activated radicals F are performed simultaneously.

(FIG. 2(b)), that is, poron ions adhere and diffuse at the bottom of the U groove to form a P layer region, and are etched at the same time. At this time, since the impurity concentration on the surface of the silicon substrate 1 is always maintained at a high concentration by the supply of poron ions, it is possible to increase the etching rate. On the other hand, U
Since the side wall portion of the groove is hardly etched by the activated radicals F (anisotropic etch song), the poron ions adhering to that portion diffuse into the interior of the substrate 1 to form a P-type diffusion region. In this way, a P layer region can be formed on the sidewall of the U groove.

As explained above, according to the embodiment, the P layer region can be formed not only at the bottom of the U-groove but also on the sidewalls. Therefore, if the wooden embodiment is used to form a U-groove for isolation between elements, leakage current can be reduced. It is possible to separate the particles of high-grade soil that does not occur. Furthermore, by applying the present invention to the formation of 8-pieces used for memories, etc., the formation of 8-pieces having a predetermined volume μ value in a small area becomes f'fim.

Further, according to the embodiment, since the U-groove formation and the impurity region formation are performed simultaneously, M fl is aimed at improving the manufacturing efficiency of the flat conductor device.

Although the embodiment described the formation of the P layer region, by changing the type of source gas for impurity diffusion, N
Formation of the mold region also results in l'T 71. Further, in the embodiment, the impurity region was formed on the side wall of the U-groove by keeping the silicon substrate 1 at a high temperature, but if the purpose is to speed up etching, the silicon substrate 1 may be kept at a temperature at which impurities do not diffuse. Just lower the temperature.

〔Effect of the invention〕

As explained above, according to the present invention, the semiconductor substrate is held at a constant high temperature and anisotropic etching is performed using an etching gas containing a source gas for impurity diffusion.
While forming the groove, it is possible to simultaneously form an impurity region over the entire surface of the U-groove, including the gs wall. Therefore, the manufacturing efficiency of semiconductor devices can be greatly improved.

[Brief explanation of drawings]

1 and 2 are diagrams illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating a method of manufacturing a conventional semiconductor device. ■...Silicon substrate (semiconductor substrate) 2...Insulation 13...Chamber 4...Electrode 5...Wafer 6...High frequency power supply 7...CFa +02 Gas (etching gas )
8... BF3 gas (gas for impurity diffusion source) 9.
・・Heater '1- Agent Patent attorney Sadamu Igeta ' CF4-102qs (α) Hon 3-colored black can 110 Fig. 2

Claims (1)

[Claims] By performing anisotropic etching using an etching gas containing a source gas for impurity diffusion while holding the semiconductor substrate at a constant high temperature, an impurity region is formed on the entire surface of the U-groove at the same time as the U-groove is formed. 1. A method of manufacturing a semiconductor device, characterized by forming a semiconductor device.