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JPS62114313A - Variable gain amplifier - Google Patents

Variable gain amplifier

Info

Publication number
JPS62114313A
JPS62114313A JP25368185A JP25368185A JPS62114313A JP S62114313 A JPS62114313 A JP S62114313A JP 25368185 A JP25368185 A JP 25368185A JP 25368185 A JP25368185 A JP 25368185A JP S62114313 A JPS62114313 A JP S62114313A
Authority
JP
Japan
Prior art keywords
circuit
diodes
diode
variable gain
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25368185A
Other languages
Japanese (ja)
Inventor
Yasutoku Miyahara
泰徳 宮原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP25368185A priority Critical patent/JPS62114313A/en
Publication of JPS62114313A publication Critical patent/JPS62114313A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To secure a frequency characteristic for a high gain and attain a wide-band frequency characteristic and a wide variable gain width by providing a peaking circuit consisting of a diode and a capacitor in a diode circuit of a gain control circuit connected to a differential amplifier. CONSTITUTION:A series circuit of resistances R1 and R2 of an attenuating circuit 1b of a gain control circuit 1 is connected between emitters of differential pair of transistors TRs Q3 and Q4 of a differential amplifier 2 of a variable gain amplifier. Anodes of diodes D1 and D2 of a diode circuit 1c of the circuit 1 are connected to emitters of TRs Q3 and Q4, and diodes D3 and D4 are connected in series to diodes D1 and D2, and a capacitor C is connected between the connection point of diodes D1 and D2 and that of diodes D3 and D4. TRs Q1 and Q2 of a differential control circuit 1a of the circuit 1 are connected to the connection point of diodes D3 and D4 and that of resistances R1 and R2. The circuit 1c is operated as a peaking circuit in case of a high gain to provide the amplifier with a wide-band frequency characteristic and a wide variable gain width.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は利得可変増幅器に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a variable gain amplifier.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来、利得可変増幅器として第2図に示すものが知られ
ている(特開昭57−211814号公報参照)。
Conventionally, a variable gain amplifier shown in FIG. 2 has been known (see Japanese Patent Laid-Open No. 57-211814).

図示の増幅器は、差動制御回路1a、減衰器M lb 
The illustrated amplifier includes a differential control circuit 1a, an attenuator Mlb
.

ダイオード回路ICからなる利得制御回路1を有し。It has a gain control circuit 1 consisting of a diode circuit IC.

減衰回路1bの減衰器用、 R,は、入力信号Slの供
給を受は出力信号8.を出力する差動増幅器2の差動ト
ランジスタQ、 、 Q、の夫々のエミッタ電極に直列
に接続されている。前記利得制御回路1の制御端子3に
制御信号S3が印加されると、ダイオード回路1aのダ
イオードD、 、 D、の接続対向点4及び減衰回路1
bの減衰器)1.、 、 R,の接続中間点5の電流が
変化し、差動増幅器2の入力電流が増減して利得が制御
される。
R, for the attenuator of the attenuation circuit 1b receives the supply of the input signal Sl, and receives the output signal 8. It is connected in series to the emitter electrodes of the differential transistors Q, , Q, of the differential amplifier 2 which outputs . When the control signal S3 is applied to the control terminal 3 of the gain control circuit 1, the connection point 4 of the diodes D, , D of the diode circuit 1a and the attenuation circuit 1
b attenuator) 1. , , R, changes the current at the connection intermediate point 5, the input current of the differential amplifier 2 increases or decreases, and the gain is controlled.

この利得可変増幅器の最大利得0厘及び最小利得G閤は
次式で示される。
The maximum gain 0 and minimum gain G of this variable gain amplifier are expressed by the following equations.

RL G鱈=□ T 4・□ I。R.L. G cod=□ T 4・□ I.

C RL:コレクタ抵抗(R8,瓜) 凡E:エミッタ抵抗(R1+ FL2)上式より明らか
な様に、抵抗几りを大きく、また抵抗RBを小さく設定
することにより、上述した利得可変増幅器は広い可変幅
を有するが、差動トランジスタQ、、Q、のペース容量
やコレクタ容量の影響でその周波数特性が低下してしま
うという欠点を併せ持つものであった。
C RL: Collector resistance (R8, Gourd) E: Emitter resistance (R1 + FL2) As is clear from the above formula, by setting the resistance large and the resistance RB small, the variable gain amplifier described above can be widened. Although it has a variable width, it also has the drawback that its frequency characteristics deteriorate due to the influence of the pace capacitance and collector capacitance of the differential transistors Q, , Q.

〔発明の目的〕[Purpose of the invention]

本発明は上述の従来の問題点に鑑み成されたもので、広
帯域な周波数特性を有すると共に広い可変利得幅を持つ
利得可変増幅器を得ることを目的とする。
The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to obtain a variable gain amplifier having wide frequency characteristics and a wide variable gain width.

〔発明の概要〕[Summary of the invention]

本発明に係る利得可変増幅器は1例えば第1図に示す如
く利得制御回路上のダイオード回路lc内のダイオード
D、、D!に直列番こダイオードD、、D、を付加し、
さらにコンデンサCを並設することにより、高利得時に
動作するピーキング回路を構成し。
The variable gain amplifier according to the present invention includes diodes D, D! in a diode circuit lc on a gain control circuit, for example, as shown in FIG. Add series diodes D, , D, to
Furthermore, by arranging a capacitor C in parallel, a peaking circuit that operates at high gain is constructed.

広帯域な周波数特性と広い可変利得幅の双方を得ること
を可能としたものである。
This makes it possible to obtain both broadband frequency characteristics and a wide variable gain width.

〔発明の実施例〕[Embodiments of the invention]

第1図に本発明の一実施例を示す。第2図に示した従来
の利得可変増幅器と異なる点は、ダイオード回路ICの
構成にある。すなわち、ダイオードD、、D、の各々に
直列にダイオードD、、D、を付加し。
FIG. 1 shows an embodiment of the present invention. The difference from the conventional variable gain amplifier shown in FIG. 2 lies in the configuration of the diode circuit IC. That is, diodes D, , D, are added in series with each of the diodes D, , D.

さらに前記ダイオードD、、D、と並列にコンデンサC
を付設しダイオード回路1cが構成されている。
Further, a capacitor C is connected in parallel with the diodes D, ,D.
A diode circuit 1c is constructed by adding .

上述の如く構成された利得可変増幅器によれば6差動制
御回路1aの制御トランジスタQ、、Q*のオン・オン
に応じ、ダイオード回路IC側に電流が流れると(高利
得時)、コンデンサCの作用により高−波における帰還
量が低減し、帯域特性の補償(ピーキング)が行なわれ
、広帯域な同波数特性を得ることができる。また、減衰
回路Ib側に電流が流れる場合(低利得時)には、上記
の帯域特性補償は行なわれないため、従来回路同様広い
可変利得幅を維持することができる。
According to the variable gain amplifier configured as described above, when current flows to the diode circuit IC side (at high gain) in accordance with the on/off of the control transistors Q, , Q* of the six differential control circuits 1a, the capacitor C Due to this action, the amount of feedback in high waves is reduced, compensation (peaking) of band characteristics is performed, and wide band characteristics of the same wave number can be obtained. Further, when current flows to the attenuation circuit Ib side (at low gain), the band characteristic compensation described above is not performed, so that a wide variable gain width can be maintained as in the conventional circuit.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、広帯域な周波数特
性と広い可変利得幅の双方を兼ね備えた利得可変増幅器
を提供することができる。
As explained above, according to the present invention, it is possible to provide a variable gain amplifier that has both broadband frequency characteristics and a wide variable gain width.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例に係る利得可変増幅器の構成
図、第2図は従来の利得可変増幅器の構成図。 1・・・利得制御回路、   2・・・差動増幅器。 D、〜D、・・・夕°イオード、  C・・・コンデン
サ。 R,、、R,・・・抵 抗、     Q、、Q、・・
・制御トランジスタ。 Q、 、 Q、・・・差動トランジスタ。 第1図
FIG. 1 is a block diagram of a variable gain amplifier according to an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional variable gain amplifier. 1... Gain control circuit, 2... Differential amplifier. D, ~D,... evening ion, C... capacitor. R,,,R,...Resistance, Q,,Q,...
・Control transistor. Q, , Q,...Differential transistor. Figure 1

Claims (1)

【特許請求の範囲】[Claims] 差動増幅器を構成する差動対トランジスタの一方のエミ
ッタ電極と、他方のエミッタ電極との間を接続する2つ
の直列抵抗と、前記一方のエミッタ電極にアノード端が
接続される第1のダイオードと、この第1のダイオード
のカソード端にアノード端が接続される第2のダイオー
ドと、この第2のダイオードのカソード端にカソード端
が接続される第3のダイオードと、この第3のダイオー
ドのアノード端にカソード端が接続されアノード端が前
記他方のエミッタ電極に接続される第4のダイオードと
、前記第1、第2のダイオードの接続点と前記第3、第
4のダイオードの接続点との間を接続するコンデンサと
、前記直列抵抗の中間接続点ならびに前記第2、第3の
ダイオードの接続点における電流を制御信号に応じて差
動的に変化させる電流変化手段とを備え、前記制御信号
の増減により利得が変化するように構成したことを特徴
とする利得可変増幅器。
two series resistors connected between one emitter electrode and the other emitter electrode of a differential pair transistor constituting a differential amplifier; a first diode whose anode end is connected to the one emitter electrode; , a second diode whose anode end is connected to the cathode end of this first diode, a third diode whose cathode end is connected to the cathode end of this second diode, and an anode of this third diode. a fourth diode whose cathode end is connected to the other end and whose anode end is connected to the other emitter electrode; and a connection point between the first and second diodes and a connection point between the third and fourth diodes. and a current changing means for differentially changing the current at the intermediate connection point of the series resistor and the connection point of the second and third diodes according to the control signal, A variable gain amplifier characterized in that the gain is changed by increasing or decreasing the gain.
JP25368185A 1985-11-14 1985-11-14 Variable gain amplifier Pending JPS62114313A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25368185A JPS62114313A (en) 1985-11-14 1985-11-14 Variable gain amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25368185A JPS62114313A (en) 1985-11-14 1985-11-14 Variable gain amplifier

Publications (1)

Publication Number Publication Date
JPS62114313A true JPS62114313A (en) 1987-05-26

Family

ID=17254674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25368185A Pending JPS62114313A (en) 1985-11-14 1985-11-14 Variable gain amplifier

Country Status (1)

Country Link
JP (1) JPS62114313A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5949286A (en) * 1997-09-26 1999-09-07 Ericsson Inc. Linear high frequency variable gain amplifier
US6473253B1 (en) 1999-04-28 2002-10-29 Koninklijke Philips Electronics N.V. Read channel with programmable bandwidth control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5949286A (en) * 1997-09-26 1999-09-07 Ericsson Inc. Linear high frequency variable gain amplifier
US6473253B1 (en) 1999-04-28 2002-10-29 Koninklijke Philips Electronics N.V. Read channel with programmable bandwidth control

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