JPS62110799U - - Google Patents
Info
- Publication number
- JPS62110799U JPS62110799U JP19946885U JP19946885U JPS62110799U JP S62110799 U JPS62110799 U JP S62110799U JP 19946885 U JP19946885 U JP 19946885U JP 19946885 U JP19946885 U JP 19946885U JP S62110799 U JPS62110799 U JP S62110799U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- program
- writing
- written
- configuration information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Description
第１図は本考案の一実施例を示すブロツク図、
第２図は本考案に係るメモリ装置に対してプログ
ラム書込みを行うプログラム書込み装置の一構成
例を示すブロツク図、第３図は第２図示の装置に
よる書込み処理手順の一例を示すフローチヤート
である。
１……メモリ装置、２……プログラム書込み装
置、３……ＥＰＲＯＭ、４……構成情報格納部、
５，１５……デコーダ、６……書込み制御部、７
……コネクタ。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing an example of a configuration of a program writing device that writes a program to a memory device according to the present invention, and FIG. 3 is a flowchart showing an example of a write processing procedure by the device shown in FIG. . 1...Memory device, 2...Program writing device, 3...EPROM, 4...Configuration information storage unit,
5, 15...Decoder, 6...Write control unit, 7
……connector.
Claims (1)
と、該メモリの記憶容量および／または前記書込
み時の書込み電圧に関する情報を含めたメモリ構
成情報を格納する格納手段とを具えたことを特徴
とするメモリ装置。 A memory device comprising: a nonvolatile memory into which a program can be written; and storage means for storing memory configuration information including information regarding the storage capacity of the memory and/or the write voltage at the time of writing. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19946885U JPS62110799U (en) | 1985-12-27 | 1985-12-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19946885U JPS62110799U (en) | 1985-12-27 | 1985-12-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62110799U true JPS62110799U (en) | 1987-07-15 |
Family
ID=31161119
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19946885U Pending JPS62110799U (en) | 1985-12-27 | 1985-12-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62110799U (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5624661A (en) * | 1979-08-07 | 1981-03-09 | Nec Corp | Memory device address assigning system |
| JPS56118157A (en) * | 1980-02-21 | 1981-09-17 | Nec Corp | Memory unit |
| JPS58111168A (en) * | 1981-12-25 | 1983-07-02 | Canon Inc | Information transmitting device |
| JPS59107491A (en) * | 1982-12-10 | 1984-06-21 | Nippon Telegr & Teleph Corp <Ntt> | Ic card |
| JPS59148963A (en) * | 1983-02-14 | 1984-08-25 | Fujitsu Ltd | Storage device control method |
-
1985
- 1985-12-27 JP JP19946885U patent/JPS62110799U/ja active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5624661A (en) * | 1979-08-07 | 1981-03-09 | Nec Corp | Memory device address assigning system |
| JPS56118157A (en) * | 1980-02-21 | 1981-09-17 | Nec Corp | Memory unit |
| JPS58111168A (en) * | 1981-12-25 | 1983-07-02 | Canon Inc | Information transmitting device |
| JPS59107491A (en) * | 1982-12-10 | 1984-06-21 | Nippon Telegr & Teleph Corp <Ntt> | Ic card |
| JPS59148963A (en) * | 1983-02-14 | 1984-08-25 | Fujitsu Ltd | Storage device control method |