JPS6198245A - Ultrasonic tomographic apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an ultrasonic tomographic apparatus, and particularly relates to a technique that is effective when applied to a reception focusing technique.

[Background technology]

As shown in FIG. 9, a conventional array-type ultrasonic tomography device amplifies analog signals output from each transducer of an array-type ultrasonic probe using amplifiers 100A to 100N.
These amplified analog signals are converted into analog/digital (hereinafter simply referred to as A/D) converters 101A to 10.
1N, and after storing the converted digital signals in the line memories 102A to 102N, the addition circuit 103 performs phasing and addition, and the phasing and addition signal is compressed by the logarithmic amplifier 104. Detection circuit 10
5 is configured to display the detected signal on a television monitor 107 through an image memory 106.

Such an ultrasonic tomographic apparatus 1, for example, uses a digital phasing method in a diagnostic ultrasonic apparatus that requires high-speed signal processing. After amplification, the A/D converters 101A to 101N perform A/D conversion, so either (1) the dynamic range of the A/D converter must be sufficiently large, or (2) the received signal amplifier or /
A method is used in which the number of channels of the D converter is increased to increase the dynamic range through an additive effect.

In such a digital phasing method, for example.

In the method (1) above, an A/D converter whose sampling rate is twice the maximum frequency f of the ultrasonic reception signal is required according to Shannon's sampling theorem. Twice the maximum frequency f, makes the center frequency f.

If ft is half of the frequency band, then formula (1)
It is expressed as

2fM=2 (fo+f+)""" (1) Formula (
In 1), for example, fo “5M [Hzl, f
+ = 2M [If Hzl, sampling rate is 2f
, requires 14M[Hzl.

At present, the only high-speed A/D converter available is a parallel comparison method.
As the number of bits increases, the circuit scale increases exponentially. Therefore, there is a problem that the circuit configuration becomes complicated and expensive.

The technology related to the parallel comparison type A/D converter is described in 1, for example, "Transistor Technology J, 1, published by CQ Publishing Co., Ltd.
December 982 issue (Special feature A-D/D-A conversion technology), P
See description below.

[Purpose of the invention]

The purpose of the present invention is to develop a technology that can obtain a sufficient dynamic range and good S/N ratio even with an inexpensive and simple A/D converter in the digital phasing method of an array-type ultrasonic tomography apparatus. It is about providing.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] A brief outline of one typical invention disclosed in this application is as follows.

That is, in an array type ultrasonic tomography device, a compression circuit for compressing an analog signal is provided before an A/D conversion circuit for converting an analog signal into a digital signal, and the A/D conversion circuit for compressing an analog signal is provided.
By providing a decompression circuit that decompresses the output digital signal of the D converter, sufficient dynamic range and good S/N can be obtained even with an inexpensive and simple A/D converter configuration. .

[Structure of the invention]

The configuration of the present invention will be explained below along with examples.

In addition, in all the figures for explaining an example.

Components having the same function are given the same reference numerals, and repeated explanations thereof will be omitted.

[Embodiment 1] FIG. 1 is a diagram for explaining a digital phasing method in an array type ultrasonic tomography apparatus according to Embodiment I of the present invention, and is a block diagram showing a schematic configuration thereof.

In FIG. 1, IA to IN are amplifiers 2A to 2 that amplify received signals from an array type probe (not shown).
N is a compression circuit that compresses a signal, and uses, for example, a logarithmic amplifier having compression characteristics as shown in FIG. Second
In the example shown in the figure, for an input voltage of 60 [dB], 48
The output voltage is compressed to [dB]. 3A to 3N is A/
It is a D converter, and for example, an 8-bit one is used. .

4A to 4N are phasing angle line memories, which are used to store the output signals of the A/D converters 3A to 3N and perform focusing. 5A to 5N are decompression circuits for restoring compressed signals to their original state, and use, for example, an antilogarithmic amplifier having expansion characteristics as shown in FIG. This extended property is.

As shown in Fig. 3, the compression property is expanded symmetrically with the compression property shown in Fig. 2, so in this example, 48 [d
B] Expanded to an output voltage of 60[dB] relative to the input voltage. 6 is an adder circuit, and 7 is a compression circuit for compressing the added signal, using a logarithmic amplifier, for example. 8 is a detection circuit for detecting the output of the compression circuit 7 and separating the ultrasonic signals; 9 is an image memory for storing the output of the detection circuit 8; 10 is a display device such as a television monitor; 11 is the aforementioned A; A control circuit for controlling the /D converters 3A to 3N, and 12 a phasing control circuit for controlling the line memories 4A to 4N.

Next, the operation of the array type ultrasonic tomography apparatus of this embodiment will be explained.

In FIG. 1, a signal transmitted by an ultrasonic transmitter is reflected within a living body, received by n transducers, and converted into an electric signal to become an ultrasonic reception signal. This received signal is amplified by n preamplifiers IA to IN, and is further amplified by compression circuits 2A to 2N, for example, 20 [
dB] compressed. Here, it is assumed that there are n signals that are simultaneously received by the vibrator.

The compressed analog signal is converted into an 8-bit set A by a clock signal generated by the control circuit 11.
/ D ′J-m ′3 A 7! l”!! 3
N ”'Q T & 99 /L/ (F! % K
'&; After being converted, the signals are stored in the phasing line memories 4A to 4N for focusing, and the phasing control circuit 12 sets a delay time necessary for focusing for each signal. The phased digital signal is converted into a real signal by decompression circuits 5A to 5N, and then sent to an adder circuit 6.
and digital addition is performed in this adder circuit 6. This digitally added signal is compressed by a compression circuit 7, and an ultrasonic signal is detected by a detection circuit 8 and stored in an image memory 9, as in the conventional apparatus.

The ultrasound tomographic image converted into a standard television (TV) signal by the image memory 9' is displayed as an image on a display device 10 such as a television monitor.

According to the present embodiment I, when the dynamic range after the adder circuit 6 is set to 70 [dB], for example, one channel is A dynamic range of 60 [dB] per unit is sufficient. In other words, the circuit at the stage before the adder circuit 6 only needs to have a dynamic range of 60 [dB]. Therefore, an 8-bit high-speed A/D converter 3A
1 to 3N are each 46 [dB], so at the input stage of the adder circuit 6, 60 [dB]
In order to
There must be a cold of 6 [dB] or more. In this embodiment I, the compression circuit (logarithmic amplifier) is 20[dB] from 2A to 2N.
] It's like making money.

Therefore, 8-bit high-speed A/D converters 3A to 3N
A sufficient dynamic range, for example, a dynamic range of 70 [dB] or more can be obtained. Furthermore, since the compression circuits 2A and 2N increase the amplification factor for small voltage signals, the A/D converters 3A to 3N
This is advantageous against mixing of clock noise and other noises, and with an 8-bit A/D converter, the noise margin can be increased by about 4 to 16 times compared to the conventional device.

FIG. 4 is a diagram for explaining a digital phasing method in an array type ultrasonic tomography apparatus according to Embodiment 2 of the present invention, and is a block diagram showing a schematic configuration thereof.

The array-type ultrasonic tomography apparatus of the present embodiment (2) includes a detection circuit 8 from the decompression circuits 5A to 5N of the embodiment (2) shown in FIG.
Perform the predetermined calculations up to
3, and this ROM 13, as shown in FIG.
It is connected between the phasing line memories 4A to 4N and the image memory 9.

In this way, the circuit configuration can be simplified by inputting the respective outputs of the phasing line memories 4A to 4N to the ROM 13 and configuring the ROM 13 to output image signals corresponding to the respective input signals. can.

FIG. 5 is a diagram for explaining a digital phasing method in an array type ultrasonic tomography apparatus according to Embodiment 2 of the present invention, and is a block diagram showing a schematic configuration thereof.

FIG. 6 is a diagram showing a specific circuit configuration of a linear approximation type compression circuit, and FIGS. 7 and 8 are diagrams showing linear approximation type compression characteristics and linear approximation type inverse compression characteristics, respectively.

As shown in FIG. 5, the array type ultrasonic tomography apparatus of this embodiment (2) uses linear approximation type compression circuits 14A to 14N as the compression circuits of the embodiment (2) shown in FIG. The circuit 18 configuration is simplified using approximate type decompression ROMs 15A to 15N.

The specific configuration of the linear approximation type compression circuit 14A is as follows.
As shown in the figure, a constant voltage Vcc (for example, +1[Vl
~-1 [Vl) through voltage dividing resistors RI and R.

The voltage is divided by a voltage divider 20 consisting of a group of resistors R2, and the respective divided voltages vt to v255 are outputted to the output terminals 14A to 14.
The configuration is such that it is output from A25-;. Then, one voltage divider 20 is arranged so that the divided voltages vI to v255 are arranged on a predetermined compression characteristic polygonal line as shown in FIG.
Bias voltage sources 21 and 22 are connected to predetermined locations of the resistor group.

The output terminals 14A I to 14A2ss are A/D
It is connected to the reference voltage input terminal of the comparator 23 of the converter 3A.

Then, the output signal of the preamplifier 1A inputted to the input terminal 24 is converted to the divided voltage Vl to v255 by the comparator 23.
, and an output as shown in FIG. 7 can be obtained. The output of the comparator 23 is input to an encoder 25 and is configured to be converted into a digital signal.

The linear approximation type compression circuits 14B to 14N have the same configuration as the linear approximation type compression circuit 14A.

In addition, the linear approximation type decompression ROMs 15A to 15N
The table is created by performing predetermined calculations on the inverse compression characteristic curve as shown in FIG. 8, which is completely opposite to the compression characteristic curve of the linear approximation type compression circuit 14A.

According to the present embodiment (2), for example, if a linear approximation type compression circuit 14A having a compression characteristic polygonal line as shown in FIG. 7 is used, for an input signal in the range of 0 to 0.5 [Vl, An output signal with a voltage 473 times that of the input signal is output. That is, it is possible to detect even signals with small input voltages that could not be detected using conventional dynamic ranges. This is because the input signal in the range of 0 to 0.5 [Vl is compressed within a certain range.

〔effect〕

As explained above, according to the novel technology disclosed in this application, the following effects can be obtained.

(1) By compressing the signal using a compression circuit such as a logarithmic amplifier before performing A/D conversion, it is possible to obtain a dynamic range equivalent to 10 to 12 bits, which was previously required, with an accuracy of about 8 bits. . In other words, cheap A
A sufficient dynamic range can be obtained with the /D converter.

(2) According to (1) above, the amplification factor for small voltage signals is increased in the compression circuit, which is advantageous against mixing of clock noise of the A/D converter and other noises. For example, an 8-bit A/D converter has advantages such as a noise margin that is approximately 4 to 16 times greater than conventional devices.

Although the present invention has been specifically described above with reference to Examples, it goes without saying that the present invention is not limited to the above-mentioned Examples, and can be modified in various ways without departing from the spirit thereof.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining a digital phasing method in an array type ultrasonic tomography apparatus according to an embodiment of the present invention, and is a block diagram showing a schematic configuration thereof. 2 and 3 are diagrams showing logarithmic compression characteristics and inverse logarithmic compression characteristics. FIG. 4 is a diagram for explaining a digital phasing method in an array type ultrasonic tomography apparatus according to Embodiment 2 of the present invention, and is a block diagram showing a schematic configuration thereof. FIG. 5 is a diagram for explaining a digital phasing method in an array type ultrasonic tomography apparatus according to Embodiment 2 of the present invention, and is a block diagram showing a schematic configuration thereof. FIG. 6 is a diagram showing a specific circuit configuration of a linear approximation type compression circuit. Figures 7 and 8 are diagrams showing linear approximation type compression characteristics and linear approximation type inverse compression characteristics, respectively, and Figure 9 explains the problems of the conventional digital phasing method in array type ultrasonic tomography equipment. This is a diagram for In the figure, IA to IN... preamplifier, 2A to 2N...
...Compression circuit, 3A to 3N...A/D converter, 4A
From 4N to phasing line memory, from 5A to 5N...
・Decompression circuit, 6... Addition circuit, 7... Logarithmic amplifier, 8... Detection circuit, 9... Image memory, lO...
Display device. 11... control circuit, 12... phasing control circuit, 13.
... ROM, 14A to 14N... Linear approximation type compression circuit, 15A to 15N... Linear approximation type decompression ROM
It is.

Claims (1)

[Claims] (1) Amplify the analog signal output by each transducer of the array type ultrasonic probe, convert the amplified analog signal to a digital signal, perform phasing and addition of the converted digital signal, and In an ultrasonic tomography apparatus that compresses a phased and summed signal and displays the detected signal as an image through an image memory, a compression circuit that compresses an analog signal is installed before an analog-to-digital conversion circuit that converts the analog signal into a digital signal. and the analog
An ultrasonic tomography apparatus comprising a decompression circuit that decompresses an output digital signal of a digital conversion circuit.