JPS6190444A - Manufacture of thin film - Google Patents

Abstract

PURPOSE:To enable the prevention of hillock generation by a method wherein the peak of the distribution of implanted depths of the impurity which is ion- implanted into a metallic wiring layer is set at more than a range within 800Angstrom . CONSTITUTION:Diffused regions 1a and 1b doped with an impurity of reverse conductivity type are formed in a substrate 1 made of semiconductor substance, and field oxide films 2 and PSG films 3 are formed on the substrate 1. Further, the first metals layers 4 which are the first layers of the multilayer wiring are formed thereon, and the second metal layers 6, 10 which are the second layers of the multilayer wiring are formed via PSG films 5 produced as the interlayer insulation layer. Pure aluminum or the alloy of aluminum and silicon is used as the metal layer. After the formation of the layers 4, ion implantation of the impurity from the exposed surface side in such a manner that its distribution peak is within about 800Angstrom from the surface can prevent the generation of hillocks even on later heat treatment. At this time, the dosage is set at approx. 10<15>/cm<2> or more in case the ion-implanted impurity is As, P, or Br, and at 10<14>/cm<2> or more in case of Ar and BF2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a thin film, and in particular, a method for manufacturing a thin film suitable for use as a wiring layer in semiconductor devices such as LSI and VLSI. It is related to.

As the degree of integration of semiconductor devices improves, the width of the wiring layers for interconnecting the various active regions formed in the semiconductor substrate is narrowed, and the spacing between adjacent wiring layers is minimized. It is necessary to do so. Furthermore, a multilayer wiring technique is also used in which wiring layers are stacked several times with intervening glabellar insulating layers interposed therebetween. Conventionally, such a wiring layer has been formed by depositing aluminum by sputtering, vapor deposition, etc., and patterning it.

Especially when forming wiring layers with metals such as aluminum,
whiskers (vhisks+r) and hillocks (hil)
It is known that an abnormal part called "Lock" is formed. A whisker is a needle-like abnormality, and a hillock is a raised abnormality. With the increasing integration of semiconductor devices,
These abnormal portions are more likely to cause short circuits or disconnections between wiring lines.

Regarding voice ker, methods for preventing its occurrence have been proposed in Japanese Patent Application Laid-Open Nos. 57-183053 to 57-183056, and it has been reported that voice ker can be prevented by relatively deep ion implantation of impurities. ing. Although these bulletins also mention hillocks,
There is no detailed explanation of the technique for preventing the occurrence of hillocks themselves; rather, the authors report that although hillocks do occur in ion-implanted Al films, it has been confirmed that voice cars do not occur.

By the way, according to the findings of the present inventors, the occurrence of voice ker is not observed in the production of metal wiring for recent semiconductor devices using aluminum, particularly an alloy of aluminum and silicon rather than pure aluminum.
It is becoming more important to prevent the occurrence of hillocks. Regarding such hillocks, for example, journal
of Applied Physics, Volume 52, No. 7.
T, J, F published in July 1981 literature
Aith's paper describes that protrusions called hillocks occur on the surface of pure A1. A method to prevent such hillocks is the LSI Data Handbook (Science Forum).

As described on pages 316-323, there are some methods in which Cu, Mg, etc. are mixed in as impurities, but they involve problems in the process and cannot be said to be sufficient.

The present invention has been made in view of the above points, and it is an object of the present invention to eliminate the drawbacks of the prior art as described above, and particularly to provide a technique capable of preventing the occurrence of hillocks.

(2) As a result of intensive research, the inventor has learned that the occurrence of hillocks in metal wiring layers in semiconductor devices can be prevented by ion-implanting impurities. As a result of this, we have succeeded in preventing the occurrence of hillocks regardless of the type of impurity by setting the depth of impurity ion implantation into the metal wiring layer, and in particular by setting the peak of the distribution of the implanted impurity to within 800 m from the surface. It has been discovered that this is almost completely preventable. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings, particularly when the present invention is applied to a wiring layer of a semiconductor device.

FIG. 1 is a cross-sectional view of an arbitrary semiconductor device provided with multilayer wiring, and the multilayer wiring is suitable for manufacturing by applying the present invention. As shown in the figure, a substrate 1 made of a semiconductor material such as silicon is doped with impurities of opposite conductivity type (
Diffusion regions 1a and 1b are formed, and other well-known buried layers, channel stoppers, etc. may also be formed. On the substrate 1, a field oxide film 2 usually made of Sin is formed to a thickness of about 9,000 mm, and on top of that a PSG film 3 is formed to a thickness of about a,00 mm. has been done. On the PSG film 3, a first metal layer 4, which is the first layer of the multilayer wiring, is formed to a thickness of about 6,000 layers, and a PSG layer of about 8,000 layers as an interlayer insulating layer is formed.
A second metal layer 6.10, which is the second layer of the multilayer wiring, is formed with a thickness of about 9,000 wafers through the SG film 5. The top layer is a passivation layer approximately 7,000 thick. Also, about 500 gate oxide films 8 and about 3
, 500 polysilicon gates 9 are provided. Pure aluminum or an alloy of aluminum and silicon is used as the metal layer.

In the configuration shown in FIG. 1, the first metal 4 and the second metal 10 on the left side are interconnected by a through conductor via a contact hole, but the first metal 4 and the second metal 6 on the right side are interlayered. It is assumed that they are separated from each other by an insulating layer 5. This place.

In this case, if the impurity ions are not implanted to a predetermined implant depth as in the present invention after forming the first metal layer 4, the first metal layer 4 will be damaged when the entire structure is heat-treated.
Hillocks 5a may occur on the surface of the metal layer 5, penetrate the interlayer insulating layer 5, and short-circuit the first metal 4 and the second metal 6. In the present invention, after the first metal 4 is formed as a layer from a selected material, impurities are ion-implanted from the exposed surface side so that the distribution peak is within about 800 nm from the surface, and then heat treatment is performed. However, it is possible to prevent such hillocks from occurring.

In other words, the occurrence of hillocks is thought to be due to a crystal growth orientation in a specific direction being defined in the metal film when it is formed, and anisotropic growth occurring along this orientation during heat treatment. As a result of research, such crystal orientation can be completely destroyed by implanting impurity ions at a relatively shallow depth, with a peak within 800 nm (preferably within 500 nm) from the surface after metal film formation, resulting in random amorphous It is thought that the formation of hillocks can be prevented by having a qualitative structure. The other parts of the structure shown in FIG. 1 can be formed using techniques commonly used in semiconductor manufacturing, such as photolithography, etching, etc. as appropriate.

Figure 2 shows the results when the dose of impurities (arsenic, phosphorus, boron, argon, B F2) ion-implanted into the metal film after forming an aluminum metal film on a component such as a semiconductor device is changed. The number of hillocks generated on the surface of a metal film is counted and the measurement results are plotted. still,
In this example, a PSG film of 7,0
00 to 9,000 mm thick, and then Al/Si is deposited thereon to a thickness of 7,000 to 9,000 mm by DC magnetron sputtering. Ion implantation (10” ~ 2X
10" ion number/cI112), pattern formation and heat treatment (430°C) are performed, and then S
Observation and analysis were performed using EM, XMA, etc.

The horizontal axis of the graph in Figure 2 is the dose (1/cm"), and the vertical axis is the number of hillocks (number of hillocks/cm"). The number of hillocks having a larger dimension compared to a predetermined significant reference dimension was counted.

In the case of arsenic, phosphorus, and boron, by setting the dose to about 10"/cm" or more, on the other hand, in the case of Ar and BF, by setting the dose to about 1014/cd or more, hillocks can be practically eliminated. It can be seen that it is possible to suppress the occurrence of this problem and make it practically problem-free. Also, 5 X
It has been shown that by setting the dose to IQ15-10"/am" or more, it is possible to almost completely prevent the occurrence of hillocks, regardless of the type of impurity. In the case of FIG. 2, the reference height was set at 2,000 people, and the number of hillocks with a height higher than that was counted. Hillocks with a height higher than this may cause problems such as coverage, so it is necessary to prevent this from occurring.

Figures 3 and 4 show the results of SIMS analysis of the distribution of impurities ion-implanted into the Al/Si layer described above, and in each figure, the horizontal axis represents the ion implantation of the Al/Si layer. The depth from the exposed surface side is shown, and the vertical axis shows the doping concentration (number of ions/cJ) of impurities implanted by ion implantation. The graph in FIG. 3 shows the distribution after arsenic ion implantation according to the present invention and the distribution after heat treatment after ion implantation.

Note that the dose of arsenic ion implantation is I x 10” (1/
cJ), implantation energy was 50 Kev, and heat treatment was performed at 450° C. for 30 minutes. As is clear from the graph of FIG. 3, the peak of the distribution within the Al/Si layer after arsenic ion implantation according to the present invention is located near the surface, and is about 100 to 300 peaks. On the other hand, even after heat treatment, the peak of the distribution is 500-70
It can be seen that the number of people is around 0.

The graph in Figure 4 shows experimental data when argon and BF2 are used as impurities, and the distribution after ion implantation of BF2 under the same conditions is slightly closer to the surface than in the case of arsenic in Figure 3. However, the peak of the distribution is located at approximately the same position as the distribution of arsenic. BF
Since the distribution after ion implantation of No. 2 is similar to that of arsenic, it is expected that the distribution after heat treatment will also be similar to that of arsenic. The graph in FIG. 4 also shows the distribution when argon is used. Although the peak of the distribution is not clearly shown when argon is used, it can be seen that the peak exists extremely close to the surface. In the case of argon, the peak of the distribution is 1 from the surface both after ion implantation and after ion implantation and heat treatment.
It appears that the peak exists within 0.000 people, but it is difficult to specify the position of the peak within the accuracy of this experiment.

From the above experimental data, the impurities used in the present invention (
When ions of arsenic, phosphorus, boron, argon, B F2) are implanted into a conductive thin film, the peak of the distribution is 800 people (
It can be seen that by performing ion implantation so that the position is within (taking into account various fluctuation factors), it is possible to almost completely suppress the occurrence of significant hillocks even if heat treatment is performed thereafter.

It should be noted that a complete theoretical analysis has not been conducted regarding the fact that it is possible to suppress the occurrence of hillocks by having the peak of the distribution of ion-implanted impurities present at a relatively shallow position. However, other observational experiments such as electron microscope observation and electron beam analysis pattern observation have confirmed that hillock occurrence can be suppressed.

As described in detail above, according to the present invention, it is possible to completely prevent the occurrence of hillocks on the surface of thin films such as metal films, and especially when applied to semiconductor wiring layers. In addition, it is possible to improve the reliability of wiring and extend its life.

Furthermore, it is possible to prevent the occurrence of short circuits between wiring layers such as multilayer wiring, and it is possible to improve the yield of semiconductor devices. Furthermore, the coverage of the insulating layer formed on the metal film is extremely good, and problems such as peeling of the film due to penetration of etching solution do not occur. Furthermore,
Since no hillocks occur, the etching becomes sharper and contributes to finer patterns. Since only the dose amount needs to be controlled without depending on the energy level or the type of impurity, it is possible to carry out the process extremely easily and with high reproducibility. Furthermore, since the peak of the distribution is located at a relatively shallow position, it is advantageous in terms of process implementation. Furthermore, the range of impurities that can be used is expanded, which is also advantageous in carrying out the process.

Although specific embodiments of the present invention have been described in detail above, the present invention should not be limited only to these specific examples, and various modifications may be made without departing from the technical scope of the present invention. Of course, it is possible.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view showing a typical semiconductor device p structure with multilayer wiring, and Figure 2 is a plot of experimental results of the present invention, showing the relationship between dose amount and number of hillocks. Graph diagram, Figure 3 is a graph diagram showing the distribution of arsenic,
Figure 4 is a graph showing the distribution of BF2 and Ar,
It is. (Explanation of symbols) 4: First metal layer 5: Interlayer insulating layer 5a: Hillock 6: Second metal layer Patent applicant Ricoh Radio 2 Co., Ltd. Figure 1 and Figure 2 Dose (cm) ) Fig. 4 0 1,000 2.000 3,000 depth test)

Claims (1)

[Scope of Claims] 1. A thin film manufacturing method comprising the steps of: forming a thin film made of a selected material on a structure; and doping an impurity from the exposed surface side of the thin film by ion implantation. The peak of the implantation distribution is 800 mm from the surface.
A method characterized by implanting ions so that the ions are located within Å. 2. The method according to claim 1, wherein the structure is a semiconductor device, and the thin film is a wiring layer made of a conductive material. 3. The method according to claim 1, wherein the conductive material is aluminum or an aluminum alloy. 4. In claim 1, the impurity is phosphorus,
A method characterized by using arsenic, boron, argon, BF_2, etc.