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JPS6175986A - Loading medium for integrated circuit element - Google Patents

Loading medium for integrated circuit element

Info

Publication number
JPS6175986A
JPS6175986A JP59197874A JP19787484A JPS6175986A JP S6175986 A JPS6175986 A JP S6175986A JP 59197874 A JP59197874 A JP 59197874A JP 19787484 A JP19787484 A JP 19787484A JP S6175986 A JPS6175986 A JP S6175986A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit element
card
base
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59197874A
Other languages
Japanese (ja)
Inventor
Mamoru Namikawa
並河 守
Yoshiaki Makino
牧野 吉明
Yasuta Taketomi
武富 保太
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Infomedia Co Ltd
Original Assignee
Tokyo Magnetic Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Magnetic Printing Co Ltd filed Critical Tokyo Magnetic Printing Co Ltd
Priority to JP59197874A priority Critical patent/JPS6175986A/en
Publication of JPS6175986A publication Critical patent/JPS6175986A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772Physical layout of the record carrier
    • G06K19/07728Physical layout of the record carrier the record carrier comprising means for protection against impact or bending, e.g. protective shells or stress-absorbing layers around the integrated circuit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

PURPOSE:To prevent the mechanical breakdown of the IC (integrated circuit) elements within a card by securing an approximately discontinuous state between the base part including the IC elements and other parts and therefore absorbing the external force by the discontinuous part. CONSTITUTION:The IC elements 7 are arrayed on a substrate 2, and pierced slits 3-5 and 6 are provided around the elements 7. In such a constitution, no external force is applied to the elements 7 even in case of a card and the substrate 2 are bent by the external force. This prevents the mechanical breakdown of the IC7.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はカード状またはシート状基体に集積回路素子を
装着あるいは埋設し、記録、読み出し、計算制御あるい
はこれらの礪能を複合した媒体に関するものである。
[Detailed Description of the Invention] Industrial Application Field The present invention relates to a medium in which an integrated circuit element is mounted or embedded in a card-like or sheet-like substrate, and has recording, reading, calculation control, or a combination of these functions. .

従米技術 集積回路索子を装χiまたは埋設したカード状、あるい
はシート状媒体は音声信号あるいは1hl($!倍信号
人出)J媒体(例えば実開昭58−138164)とし
て用いられようとしている。
A card-like or sheet-like medium equipped with or embedded with conventional technology integrated circuit cables is about to be used as an audio signal or a 1hl ($! double signal turnout) J medium (for example, Utility Model Publication No. 58-138164).

また、事務省力、駅務省ツバ金融事務省力、パーソナル
・コンピュータなどに用いられるカードとして用いられ
る兆が見えて米だ。これらについては、特公昭53−6
491、特開昭53−37332、特公昭5G−196
65、特開昭56−26451、特開昭57−4817
5、特開昭57−210494、待11tl昭56−3
8651、特開昭57−29498などにその基本構成
、gi造法などが述べられている。
In addition, there are signs that it will be used as a card for administrative labor saving, station ministry, financial administrative labor saving, personal computers, etc. Regarding these, please refer to
491, JP 53-37332, JP 5G-196
65, JP-A-56-26451, JP-A-57-4817
5, Japanese Patent Application Publication No. 57-210494, waiting 11tl 1982-3
8651 and JP-A-57-29498, etc., the basic structure, GI manufacturing method, etc. are described.

カード状、シート状基体は一般に人力により端末磯、あ
るいは書き込み、読み出し磯、入出力磯などに装着され
るので、外力などにより基体の長手方向、幅方向あるい
は任意の方向に′f!!面、折り曲げなどの外力を受け
る機会が多(存在する。そのような場合、外力の影響を
最も受けるのは第6図で示すと基体1の幅方向の中心線
Y−Y′線と長手方向の中心線x−x’iの交点Oの付
近である。
Generally, card-like or sheet-like substrates are manually attached to terminal blocks, writing/reading blocks, input/output blocks, etc.; ! There are many opportunities to receive external forces such as surface bending and bending. This is near the intersection O of the center line x-x'i.

すなわちカードあるいはシート状基体の中心部付近が一
般的に湾曲、または折り曲げの力の影響をうけやすい6 集積回路は固体素子であり柔軟性のほとんどないものな
ので、外ツバ特に折り曲げ、湾曲などの応力が大きくな
ると破壊、断線、リードワイアの接触不良などをおこし
やすくなる。
In other words, the center area of a card or sheet-like substrate is generally susceptible to bending or bending forces.6 Since integrated circuits are solid-state devices and have almost no flexibility, the outer ribs are particularly susceptible to bending or bending forces. If this becomes large, breakage, wire breakage, poor contact with the lead wire, etc. are likely to occur.

この欠点を除くために特公昭53−29260の提案が
なされており、現在試作あるいは市場にではじめている
集積回路装着のカードはほぼこの提案の位置に集積回路
が位置している。
In order to eliminate this drawback, a proposal was made in Japanese Patent Publication No. 53-29260, and cards equipped with integrated circuits currently being prototyped or on the market have integrated circuits located almost in the position proposed by this proposal.

すなわち第6図で説明するとカード基体の幅方向、長手
方向の中心線Y−Y’、x−x’の交点Oを避けた位置
すなわちカード本体の偏心さrLrこ位置に集積回路を
設ける補遺になっており、府述した基体自体の湾曲、折
り曲げの影響をできるだけ避けるようにしである。
In other words, as explained in Fig. 6, the integrated circuit is installed at a position away from the intersection O of the center lines Y-Y' and xx' in the width direction and longitudinal direction of the card body, that is, at an eccentric position rLr of the card body. This is to avoid the effects of curvature and bending of the base body itself as much as possible.

従来技術の問題、α しかしながら、集積回路を含む媒体には、磁気記録用媒
体、あるいは光記録用媒体が併設される機会が多い、こ
れは前記した省力化システムには既に磁気システムが広
範に普及しており、ついでまた光記録システムが一部に
利用されようとしている理由による。光記録も磁気記録
も一般にはカードまたはシートにストライブ状に付加さ
れる。
Problems with the Prior Art α However, there are many cases in which a magnetic recording medium or an optical recording medium is attached to a medium containing an integrated circuit. This is why optical recording systems are being used in some areas. Both optical and magnetic recordings are generally applied in stripes to cards or sheets.

このような状況下にあっては、集積回路の記録(記憶)
、入出力、および論理演fr、慨能と磁気媒体あるいは
光媒体の記録、再生成能を同一媒体にfノ1設して集積
回路用端末機、磁気記録再生用端末磯、あるいは光記録
再生端末−に共用しうるような媒体(カード状、シート
状あるいはディスク状ら含めて)が要求される。
Under these circumstances, integrated circuit records (memory)
, input/output, logic performance, and magnetic or optical media recording and reproducing capabilities are installed on the same medium to create a terminal for integrated circuits, a terminal for magnetic recording and reproducing, or an optical recording and reproducing function. A medium (including card, sheet, or disk) that can be shared by terminals is required.

+iiJ述の従来技術のように第6図において集積回路
索子7(8は外部端末成の入出力端子に接続するための
7の入出力端子)を例えばカード状基体の偏心した図の
位置にするとその位置によっては点線で示す磁気ストラ
イプ(あるいは光記録媒体ストライブ)mと重なる場合
がある。磁気ストライプをカードの上下端付近に平行に
第6図のm、m′のように設置する場合には、限定され
たカード状基体の大きさでは、x−x’、あるいはy 
 y’の中4線かそれに近い位置、あるいはカードの中
心位置かそれに近い位置に集積回路素子を付設せざるを
得ない。
+ii As in the prior art described in J, in FIG. 6, the integrated circuit cable 7 (input/output terminal 7 for connecting to the input/output terminal of the external terminal component) is placed, for example, at the eccentric position of the card-like base as shown in the figure. Then, depending on its position, it may overlap with the magnetic stripe (or optical recording medium stripe) m shown by the dotted line. When magnetic stripes are installed parallel to the top and bottom edges of the card as indicated by m and m' in FIG.
The integrated circuit element must be attached at or near the middle four lines of y', or at or near the center of the card.

発明が解決しようとする問題、弘 本発明はこのような基体の中心部またはその付近に集積
回路素子を位置させても基体の装着または埋設した集積
回路素子に、基体の湾曲、折り曲げなどの外力がかかっ
たとき、その影響を除去または低減しうる保、!!溝構
造提供するものである。
Problems to be Solved by the Invention: Even if the integrated circuit element is located at or near the center of the base body, the integrated circuit element attached to or embedded in the base body is not affected by external forces such as bending or bending the base body. protection that can eliminate or reduce its effects when ! It provides a groove structure.

問題、弘を解決する手段 よって本発明の目的を要約すれば、カード(あるい(九
シート、ディスク)などの中心部、または中心部付近に
集積回路索子を装着、または埋設しても、カードの外力
などによる湾曲、折り曲げなどの影響により、前記回路
素子の破壊、断線、接触不良などを防止する媒体基体の
補遺を提供するものである。勿論、本発明の構成を実施
すれば基体の中心部以外何れの位置にあっても同様の作
用効果のあることは論をまたない。すなわち、集積jt
J路素子を含むバ体部分を他の66分と不連続に近い状
態にすれば、外部より基体に加えられた力は、その不連
続部分で遮断あるいは弱められて集積回路素子に破壊そ
の他の不都合が生じないようになるわけである。
To summarize the purpose of the present invention in terms of means for solving the problem, even if an integrated circuit cord is mounted or buried in or near the center of a card (or (nine sheets, disk), etc.), This provides a supplement to the medium substrate that prevents the circuit elements from being destroyed, disconnected, poor contact, etc. due to the effects of bending, bending, etc. due to external forces of the card.Of course, by implementing the structure of the present invention, the substrate There is no doubt that the same effect can be obtained at any position other than the center.In other words, the accumulation jt
By making the base part including the J-path element almost discontinuous with the other 66 parts, the force applied to the base body from the outside will be blocked or weakened at the discontinuous part, causing damage or other damage to the integrated circuit element. This will prevent any inconvenience from occurring.

本発明の実施例および作用効果 本説明に記述する実施例は通常バンクカード、あるいは
フレノットカードなどのようにJIS規格またはISO
規格に規定される、あるいはそれに類似の硬質塩化ビニ
ル樹脂をカード基体としたちのに関して述べるが、基体
が池の合成FJRJ板、金属あるいは紙、合成紙などに
ついても同様な効果のあることはいうまでもない。また
説明図の断面図において基体の厚さは説明上、基体面積
に比して拡大して示しである。
Embodiments and Effects of the Present Invention The embodiments described in this explanation are generally JIS or ISO standard bank cards, Frenot cards, etc.
We will discuss using hard vinyl chloride resin specified in the standard or similar to it as a card base, but it goes without saying that the same effect can be achieved with synthetic FJRJ boards, metal, paper, synthetic paper, etc. as the base. Nor. Further, in the cross-sectional views of the explanatory drawings, the thickness of the base body is shown enlarged compared to the base area for the sake of explanation.

実施例1 @1図におけるaはカードを上面より見た説明図、bは
Y−Y’部の断面図である。m、m’は磁気記録再生の
機能を付加されたストライブである。
Example 1 @1 In the figure, a is an explanatory view of the card seen from the top, and b is a cross-sectional view of the Y-Y' section. m and m' are stripes to which a magnetic recording/reproducing function is added.

2は基体、点、197は集積回路素子で、その端子は8
に示される。その位置は1県方向x−x’、使手方向Y
−Y′の交点、すなわちカード基体の中心Oの点にほぼ
集積回路素子の中心が位置するような位置、すなわち外
力の一番影響するところに位置させである。これらの集
積回路素子、端子などをカード基体2に装着または埋設
する技術については当業者の持つ一般的な常法なのでこ
こに詳細については省略する。3.4.5および6は基
体2に貫通した#I艮い孔で、カード外周のパン千打抜
の場合、同時に打抜いてもよいし、現用する8!械的切
削法あるいはレーザービーム加工によって形成しても良
い。この貫通孔(スリット)はそれを作成する加工法に
もよるが、例えばレーザービーム加工の場合は、集積回
路素子の外縁(点線)より約2u以上はなして加工すれ
ば集積回路素子の損傷を及ぼすことはない。貫通孔は本
実施例では長小判形をとっであるが、その幅は一般のバ
ンクカード、フレノットカードに用いる槙/i!(厚さ
0.7−〇、論層)硬質塩化ビニル基体であれば、tt
S2図に示すように長平方向に折り曲げたときを例にと
れfr O,2a+z以」二あれば十分である。幅方向
についても同じである。
2 is the base, a point, 197 is an integrated circuit element, and its terminal is 8
is shown. Its position is 1 prefecture direction x-x', user direction Y
-Y', ie, the center O of the card base, is located at a position where the center of the integrated circuit element is approximately located, ie, at a location where external forces are most affected. Techniques for mounting or embedding these integrated circuit elements, terminals, etc. in the card base 2 are common techniques known to those skilled in the art, and therefore detailed description thereof will be omitted here. 3. 4. 5 and 6 are #I holes penetrating the base 2, and in the case of punching out the outer circumference of the card, they may be punched out at the same time, or 8! It may be formed by mechanical cutting or laser beam processing. This through hole (slit) depends on the processing method used to create it, but in the case of laser beam processing, for example, if the through hole (slit) is processed at a distance of about 2u or more from the outer edge (dotted line) of the integrated circuit element, it may damage the integrated circuit element. Never. In this embodiment, the through-hole has a long oval shape, but its width is the same as that used for general bank cards and Frenot cards. (thickness 0.7-〇, theoretical layer) If it is a hard vinyl chloride base, tt
Taking as an example the case where it is bent in the longitudinal direction as shown in Fig. S2, it is sufficient to have fr O, 2a+z or more. The same applies to the width direction.

このような貫通孔をあけた場合、第2図に示すように、
カードの使手方向の断面で説明するとカードにF、F’
、F″のような力が矢印のように加わったとき、カード
は模型的には図のように曲がり、集積回路素子に加わる
曲げの力は3.4の貫通孔で遮断、または低減されるの
で、素子の破壊その他の不都合はほとんど避けられる。
When such a through hole is made, as shown in Figure 2,
To explain it in terms of the cross section of the card in the user's direction, the card has F, F'
, F'' is applied as shown by the arrow, the card bends as shown in the figure, and the bending force applied to the integrated circuit element is blocked or reduced by the through hole 3.4. Therefore, destruction of the element and other inconveniences can be largely avoided.

磁気ストライプをもつカード、例えばJISB9560
 4.2.5項の規定でカーリング(カード力反り)は
最大2IIffと規定され、実際に一般の端末そ戊のカ
ード読取代は磁気カードの長手H向のカーリング(磁気
カードの反りの測定はカードのエンボ人文字の凸部を子
たんな面と接しない向きで平たん面に置いて行なう、)
が4ug以上のときは読取I)が不安定lこなる。しか
し7u程度のカーリングがあっても読取り得るものもあ
るので、実際には7zz程度のカーリングまで素子の破
壊や不都合がなければ実用と支障はない。
Cards with magnetic stripes, e.g. JISB9560
According to the provisions of Section 4.2.5, curling (card force warping) is specified as a maximum of 2IIff, and in fact, the card reading fee of a general terminal is curling in the longitudinal H direction of a magnetic card (measuring the warping of a magnetic card is Place the convex part of the embossed character on the card on a flat surface so that it does not touch the small side.)
When the value is 4ug or more, reading I) becomes unstable. However, there are some that can be read even if there is curling of about 7u, so in reality, curling of about 7zz does not pose a problem in practical use as long as it does not destroy the element or cause any inconvenience.

集積回路素子への曲げの力の影響は同じ曲げ具合でも素
子の大ささく面積、長さおよび幅)とカードの大きさく
面積、長さおよび幅)の比により異なってくるが現状の
常識的な水準により見て回路素子部の面積(第1図aに
おける7の点m)は一般に30X30zy内外に設計さ
れるので本発明により十分素子の破壊、不都合をほとん
ど防止し得る。
The effect of bending force on an integrated circuit element varies depending on the ratio of the element's size (area, length, and width) to the card's size (area, length, and width), even if the degree of bending is the same. Considering the standard, the area of the circuit element portion (point m at 7 in FIG. 1a) is generally designed to be around 30 x 30 zy, so the present invention can sufficiently prevent most of the damage and inconvenience of the element.

またPISi図dに示すように例えば艮小判型貫通孔3
を3′のようにほぼ円形の貫通孔の連続で形成し3.4
.5および6の代りに形成しても良い。
In addition, as shown in PISi figure d, for example, the oval shaped through hole 3
3.4 is formed by a series of approximately circular through holes like 3'.
.. 5 and 6 may be formed instead.

なお第1図aにおける13は集積回路索子部分が基体に
接続される槁となっている部分であるが、素子への曲げ
の影響力をできるだで低減させるため1二は、実用的な
比械的強度が保持しうる範囲でできるだけ小さな面積が
好ましい。
Note that 13 in FIG. 1a is the part that connects the integrated circuit cord part to the substrate, but 12 is a practical part in order to reduce the influence of bending on the element as much as possible. It is preferable that the area be as small as possible within a range that can maintain specific mechanical strength.

実施例2 第1図Cは同図aおよびbにおいて採用した貫通孔3.
4.5および6の代りに貫通しない穴、または溝で基体
の曲げの力が集積回路素子にかかるのを防市または低減
させるような補遺を示すものである。同図すにおける貫
通孔3の代りに溝9およびり゛を、4の代りに溝10お
よV10′を5の代りに溝11および11′を6の代り
に溝12および12″を基体の表裏に加工したものであ
る。勿論洛の代わりに間隔をおいた不貫通孔の連続体(
第1図d1:類似した)でも良い。
Embodiment 2 FIG. 1C shows the through hole 3.
4.5 and 6 are replaced by non-through holes or grooves to prevent or reduce the bending forces of the substrate on the integrated circuit element. In the same figure, grooves 9 and 10 are used instead of through holes 3, grooves 10 and V10' are used instead of 4, grooves 11 and 11' are used instead of 5, and grooves 12 and 12'' are used instead of 6. It is machined on the front and back.Of course, instead of holes, it is a series of blank holes spaced apart (
(Fig. 1 d1: similar) may be used.

上下溝の底面との開隔p(同図C)は成賊的強度の許さ
れる限り、小さいHが本発明の目的に対して好ましい。
For the purpose of the present invention, it is preferable that the gap p (C in the figure) between the upper and lower grooves and the bottom surface is as small as H as long as the structural strength is acceptable.

この溝は片側であってもその深さにより効果をあげるこ
とができる。
Even if this groove is on one side, the effect can be increased depending on its depth.

実施例3 第3図において2は実施例1および2に述べたのと同じ
ような硬質塩化ビニルの積層またはJ′lt層基体で、
厚さは一般的に0.7〜0.8IL時には1.5〜2.
081位まで用いられる。7の点腺内は集積回路素子で
カード状基体のほぼ中心に位置しておつ、8は集積回路
素子の入出力端子で2と連続した基体7′の表面に形成
されている。14は基体2に打抜き法または切削、また
はレーザービーム加工などによって形成された幅1.0
zy程度の円形z(′ζでその一部は13′部分で途切
れておす7゛と基体2はここで一体となっている。13
゛部分は幅方向中心線Y−Y’、長さ方向中心ax−x
’のズ点OよりみるとY−Y’とほぼ45度の角度をな
す線上にある。
Example 3 In FIG. 3, 2 is a hard vinyl chloride laminate or J'lt layer substrate similar to that described in Examples 1 and 2;
The thickness is generally 1.5-2.
It is used up to the 081st position. Inside the dot 7 is an integrated circuit element located approximately at the center of the card-like base body, and at 8 is an input/output terminal of the integrated circuit element formed on the surface of the base body 7' continuous with 2. 14 is a width 1.0 formed on the base 2 by punching, cutting, laser beam processing, etc.
A circle z of about zy ('ζ, part of which is interrupted at the 13' part, and the base 2 is integrated here. 13
゛The width direction center line Y-Y', the length direction center line ax-x
When viewed from point O of ', it lies on a line that makes an angle of approximately 45 degrees with Y-Y'.

本実施例では幅方向、あるいは良さ方向の湾曲に対して
はこの位置が集積回路素子に対するi肖述のような悪影
響が最も少ない。
In this embodiment, this position has the least adverse effect on the integrated circuit element with regard to curvature in the width direction or the height direction.

実施例4 第4図は前記実施例と異なった方法を用いて集積回路素
子に加わる基体の湾曲によるS影響を可及的避けうるよ
うにしたものである。同図eはその平面図、fはY−Y
’力向の断面図である。16は集積回路素子を装着また
は埋設した基体である。
Embodiment 4 FIG. 4 shows a method different from the previous embodiment in which the S effect due to curvature of the substrate applied to the integrated circuit element can be avoided as much as possible. In the same figure, e is the plan view, and f is Y-Y.
'It is a sectional view of the force direction. Reference numeral 16 denotes a base body on which an integrated circuit element is mounted or embedded.

集積回路素子は点線19で示す円形で示した。The integrated circuit elements are shown as circles indicated by dotted lines 19.

17は基体16の表面に形成された素子19の入出力の
端子である。
Reference numeral 17 indicates input/output terminals of the element 19 formed on the surface of the base 16.

18はピアノ線あるいは燐青謂線などの弾性のあるワイ
アで基体15の厚さが0.7〜2.01位の範囲であり
、基体16もそれとほぼ同等であれば直径0.2IK〜
0.61のものが好ましい。この線は金属あるいは合一
に系ワイアのみでなく、高分子樹脂のサラン系、ポリエ
ステル系、ナイロン系その他各種適合しうるちのが採用
し得る。
18 is an elastic wire such as piano wire or phosphor blue wire, and if the thickness of the base body 15 is in the range of 0.7 to 2.01 mm, and the base body 16 is also approximately the same, the diameter is 0.2 IK ~
A value of 0.61 is preferred. This wire can be made of not only metal or bonded wire, but also polymeric resins such as saran, polyester, nylon, and other compatible materials.

基体16は本実施例によればワイア18で基体15に図
のように結合される。20は基体16の外縁(本例では
円形)と基体15の内周(本例では円形)の開にできた
間隔で、必要により任意な開14[”をとりうる。なお
、ワイア18は本例では直線状になっているが、同図g
に示す18゛のようにこれをコイル状、あるいはS字状
などの形状にして基体16が基体15に対して、ある程
度自在に可動しうるようにすれは、基体15の湾曲に対
して集積回路素子の受けるiり述のような悪影響はさら
に低減される。18、または18″などの弾性ワイアを
もってカード状基体15に基体16を結合させる方法に
ついては当業者の通常採用している技術的内容なのでこ
こに詳述は行なわない。
According to this embodiment, the base body 16 is connected to the base body 15 by wires 18 as shown. Reference numeral 20 denotes an open space between the outer edge of the base 16 (circular in this example) and the inner periphery of the base 15 (circular in this example), and can take an arbitrary opening 14 ['' if necessary. In the example, it is straight, but in the same figure
As shown in Fig. 18, it is possible to make the integrated circuit into a coil shape or an S-shape so that the base body 16 can move relative to the base body 15 with some degree of freedom. The adverse effects on the device as described above are further reduced. The method of bonding the substrate 16 to the card-like substrate 15 using a 18" or 18" elastic wire is a technical matter commonly employed by those skilled in the art, and therefore will not be described in detail here.

一般的にワイア18、あるいは18゛などは集積回路素
子の存在する基体16を作成するとき、モールド方式な
どを採用するなら、端子の形成などと同時に基体16に
固定しうるので、ワイア18と基体16の一体プロック
があらかじめ出来てそれを基体15の中の円形孔に装着
する自動生産はに適合させることができる。
In general, when creating the base 16 on which the integrated circuit element exists, the wire 18 or 18゛ can be fixed to the base 16 at the same time as forming terminals if a molding method is used. Automatic production in which 16 integral blocks are prefabricated and fitted into circular holes in the base body 15 can be adapted.

実施例5 第5図は第4図の変形例である。同図りは組立てのため
の斜視図、1は集積回路素子部分とその周辺の部分図で
ある。21はカード状基体で図に示すような変形の円形
貫通孔26が形成されている6その孔には図のように2
2のような嵌合孔が図では4個形成さhている。基体2
4は集積回路素子を内部にvc着した基体で基体21と
ほぼ同質の材料、例えば硬質塩化ビニル板などで形成さ
れており、25は集積回路素子の入出力端子である。
Embodiment 5 FIG. 5 is a modification of FIG. 4. The figure is a perspective view for assembly, and 1 is a partial view of the integrated circuit element portion and its surroundings. 21 is a card-like base in which a circular through hole 26 of the shape shown in the figure is formed.
In the figure, four fitting holes such as 2 are formed. Base body 2
Reference numeral 4 denotes a base body to which an integrated circuit element is attached via VC, and is made of substantially the same material as the base body 21, such as a hard vinyl chloride plate. Reference numeral 25 represents input/output terminals of the integrated circuit element.

23は基体21に形成された嵌合孔に嵌合しうるような
形状に加工された嵌合片で基体24に一体的に形成され
ている。前記した嵌合孔22と嵌合片23は同図1(部
分図)に示すように嵌合され、接着剤、あるいは熱融着
などの方式で基体21とノ、(体24は一体に結合され
、26に示すような貫通孔が形成される。この貫通孔に
より実施例4に述べtこと同じ効果が、カード状基本2
]の幅方向、あるいは長手方向湾曲に対してその影響を
集積回路素子を含む基体24に及ぼすことを怪滅させ素
子の破壊、断線などの故障率を除去あるν・は低減させ
ることができる。
Reference numeral 23 is a fitting piece processed into a shape that can be fitted into a fitting hole formed in the base body 21, and is formed integrally with the base body 24. The fitting hole 22 and the fitting piece 23 described above are fitted as shown in FIG. A through hole as shown in 26 is formed.With this through hole, the same effect as described in Example 4 can be obtained from the card-like base 2.
] It is possible to reduce the influence of the curve in the width direction or the longitudinal direction on the base body 24 containing the integrated circuit element, thereby eliminating the failure rate such as destruction of the element or disconnection.

発明の効果 A+f JETの実施例の解説、その他に記したように
、カード状、シート状、あるいはディスク状の基体(板
)に集積回路素子を装着または埋設したとき、それらの
基体が長手方向、あるいは幅方向などに湾曲、折り曲げ
があったとき固体素子の集積回路素子に破壊、断線など
のS影響を及ぼすことが多い。本発明は集積回路素子が
存在する部分を基体(&)の一部より切りはなし、間接
的に実施例に述べたように基体と一体化させ、前述の湾
曲、折り曲げの影響が回路素子に及ぼす影響を排除 ま
たは低減させる効果があり、実開上極めて有効である。
Effects of the Invention A+f As described in the explanation of the JET embodiment and elsewhere, when integrated circuit elements are mounted or embedded in a card-shaped, sheet-shaped, or disk-shaped substrate (board), the longitudinal direction of the substrate Alternatively, when the solid-state integrated circuit element is bent or bent in the width direction, it often causes damage to the solid-state integrated circuit element, such as breakage or disconnection. In the present invention, the part where the integrated circuit element is present is cut out from a part of the base (&), and is indirectly integrated with the base as described in the embodiment, so that the influence of the above-mentioned curving and bending does not affect the circuit element. It has the effect of eliminating or reducing the impact, and is extremely effective in practical applications.

なお、本発明の記述において、集積回路素子の端子をす
べて集積回路素子を含む基体においたが、端子はカード
状基本の端面、周辺その他何れの部分にもワイアリング
で延長して形成させても良いことは勿論である。
In the description of the present invention, all the terminals of the integrated circuit element are placed on the base including the integrated circuit element, but the terminals may also be formed on the end face of the card-like base, the periphery, or any other part by extending with wiring. Of course it's a good thing.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1お上V第2の実施例を示す平面図
、Y−Y’線の断面図、および貫通孔部分の拡大図。第
2図は本発明の媒体を長手方向【こ曲げた場合の状態を
示す説明図。第3図は本発明の第3の実施例を示す平面
図、第4図は本発明の第4の実施例を示す正面図Y−Y
’線の断面図および基体間結合部分の部分図である。第
5121は本発明の!jS5の実施例を示す斜視図およ
び集積回路部分とその周辺部分の部分図JS6図は従来
の集積回路装着媒体の1例を説明するrこめの概略図。 特許出願人  東京磁気印刷株式会社 代表者        平賀 口太部 オ 1 図 m、m’−−一 磁気ストライブ オ 2 図 オ 3 図 X′ 14−−−− F”l形溝 オ 4 図 +9.−一−−−果偉口閉索号 20、−−−−一間隔 オ 5 図
FIG. 1 is a plan view, a sectional view taken along the Y-Y' line, and an enlarged view of a through hole portion, showing a first embodiment of the present invention. FIG. 2 is an explanatory view showing the state when the medium of the present invention is bent in the longitudinal direction. FIG. 3 is a plan view showing the third embodiment of the present invention, and FIG. 4 is a front view Y-Y showing the fourth embodiment of the present invention.
FIG. 2 is a cross-sectional view of the ' line and a partial view of the inter-substrate bonding portion. No. 5121 is of the present invention! A perspective view showing an embodiment of JS5 and a partial view of an integrated circuit portion and its surroundings. FIG. JS6 is a schematic diagram illustrating an example of a conventional integrated circuit mounting medium. Patent applicant Tokyo Magnetic Printing Co., Ltd. Representative Hiraga Mouth part O 1 Figure m, m'--1 Magnetic stripe O 2 Figure O 3 Figure X' 14----- F"l-shaped groove O 4 Figure +9.-1 ---Guowei mouth closing code 20, ----One interval o 5 Fig.

Claims (8)

【特許請求の範囲】[Claims] (1) カード状又はシート状基体に集積回路素子を装
着又は埋設した集積回路素子装着媒体において、集積回
路素子周辺の基体部分に単数又は複数個の集積回路素子
保護構造を設けたことを特徴とする集積回路素子装着媒
体。
(1) An integrated circuit device mounting medium in which an integrated circuit device is mounted or embedded in a card-like or sheet-like substrate, characterized in that one or more integrated circuit device protection structures are provided in the base portion around the integrated circuit device. integrated circuit element mounting medium.
(2) 前記保護構造が、基体厚み方向の貫通孔である
ことを特徴とする特許請求の範囲第1項記載の集積回路
素子装着媒体。
(2) The integrated circuit device mounting medium according to claim 1, wherein the protective structure is a through hole extending in the thickness direction of the substrate.
(3) 前記保護構造が、基体を貫通しない穴又は溝で
あることを特徴とする特許請求の範囲第1項記載の集積
回路素子装着媒体。
(3) The integrated circuit device mounting medium according to claim 1, wherein the protective structure is a hole or groove that does not penetrate the base.
(4) 前記溝が一部を残して集積回路素子を取り囲む
連続溝であることを特徴とする特許請求の範囲第3項記
載の集積回路素子装着媒体。
(4) The integrated circuit device mounting medium according to claim 3, wherein the groove is a continuous groove that surrounds the integrated circuit device with a portion remaining.
(5) 前記保護構造において、集積回路素子を含む基
体と集積回路素子を含まない基体が分離されており、両
基体間に結合部材を設けたことを特徴とする特許請求の
範囲第1項記載の集積回路素子装着媒体。
(5) In the protective structure, the base body containing the integrated circuit element and the base body not containing the integrated circuit element are separated, and a connecting member is provided between the two base bodies. integrated circuit element mounting medium.
(6) 前記結合部材が弾性体であることを特徴とする
特許請求の範囲第5項記載の集積回路素子装着媒体。
(6) The integrated circuit device mounting medium according to claim 5, wherein the coupling member is an elastic body.
(7) 前記保護構造において、集積回路素子を含む基
体に嵌合片を設け、集積回路素子を含まない基体には嵌
合孔を設け、両基体を嵌合させて前記保護構造を形成し
たことを特徴とする特許請求の範囲第1項記載の集積回
路素子装着媒体。
(7) In the protective structure, a fitting piece is provided on the substrate containing the integrated circuit element, a fitting hole is provided on the substrate not containing the integrated circuit element, and the protective structure is formed by fitting both substrates. An integrated circuit device mounting medium according to claim 1, characterized in that:
(8) 前記嵌合を接着剤又は熱融着で行なうことを特
徴とする特許請求の範囲第7項記載の集積回路素子装着
媒体。
(8) The integrated circuit element mounting medium according to claim 7, wherein the fitting is performed by adhesive or heat fusion.
JP59197874A 1984-09-21 1984-09-21 Loading medium for integrated circuit element Pending JPS6175986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59197874A JPS6175986A (en) 1984-09-21 1984-09-21 Loading medium for integrated circuit element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59197874A JPS6175986A (en) 1984-09-21 1984-09-21 Loading medium for integrated circuit element

Publications (1)

Publication Number Publication Date
JPS6175986A true JPS6175986A (en) 1986-04-18

Family

ID=16381755

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59197874A Pending JPS6175986A (en) 1984-09-21 1984-09-21 Loading medium for integrated circuit element

Country Status (1)

Country Link
JP (1) JPS6175986A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0163880A2 (en) * 1984-05-29 1985-12-11 GAO Gesellschaft für Automation und Organisation mbH Data carrier with integrated circuit and method of producing such a carrier
FR2595848A1 (en) * 1986-03-17 1987-09-18 Mitsubishi Electric Corp THIN SEMICONDUCTOR CARD
JPS62249796A (en) * 1986-04-23 1987-10-30 共同印刷株式会社 Integrated circuit card
JPS637575U (en) * 1986-07-02 1988-01-19
JPH0341937U (en) * 1989-08-31 1991-04-22
US5362955A (en) * 1990-03-07 1994-11-08 Gao Gesellschaft Fur Automation Und Organisation Mbh IC card having severable mini chip card
FR2745930A1 (en) * 1996-03-11 1997-09-12 Solaic Sa Integrated circuit smart card with part floating support for semiconductor
US5834755A (en) * 1994-12-08 1998-11-10 Giesecke & Devrient Gmbh Electronic module and a data carrier having an electronic module
EP0887766A2 (en) * 1997-06-23 1998-12-30 Nec Corporation IC card having a slit for protecting an IC module from an external stress
JP2003503167A (en) * 1999-06-30 2003-01-28 ワールド ゴルフ システムズ リミテッド Golf ball

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5562591A (en) * 1978-10-30 1980-05-12 Fujitsu Ltd Memory card
JPS5948984A (en) * 1982-09-13 1984-03-21 大日本印刷株式会社 Method of producing ic card
JPS5923864B2 (en) * 1975-05-22 1984-06-05 クレツクネル・フムボルト・ドイツ・アクチエンゲゼルシヤフト Device for fixing the crushing pipe and support frame of a vibrating ball mill
JPS60256887A (en) * 1984-05-29 1985-12-18 ゲーアーオー ゲゼルシヤフト フユア アウトマチオン ウント オルガニザチオン エムベーハー Ic module built-in type data memory medium and manufacture tereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5923864B2 (en) * 1975-05-22 1984-06-05 クレツクネル・フムボルト・ドイツ・アクチエンゲゼルシヤフト Device for fixing the crushing pipe and support frame of a vibrating ball mill
JPS5562591A (en) * 1978-10-30 1980-05-12 Fujitsu Ltd Memory card
JPS5948984A (en) * 1982-09-13 1984-03-21 大日本印刷株式会社 Method of producing ic card
JPS60256887A (en) * 1984-05-29 1985-12-18 ゲーアーオー ゲゼルシヤフト フユア アウトマチオン ウント オルガニザチオン エムベーハー Ic module built-in type data memory medium and manufacture tereof

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0163880A2 (en) * 1984-05-29 1985-12-11 GAO Gesellschaft für Automation und Organisation mbH Data carrier with integrated circuit and method of producing such a carrier
US5031026A (en) * 1986-03-17 1991-07-09 Mitsubishi Denki Kabushiki Kaisha Thin semiconductor card
FR2595848A1 (en) * 1986-03-17 1987-09-18 Mitsubishi Electric Corp THIN SEMICONDUCTOR CARD
JPS62214998A (en) * 1986-03-17 1987-09-21 三菱電機株式会社 Thin-type semiconductor card
JPS62249796A (en) * 1986-04-23 1987-10-30 共同印刷株式会社 Integrated circuit card
JPS637575U (en) * 1986-07-02 1988-01-19
JPH0341937U (en) * 1989-08-31 1991-04-22
US5362955A (en) * 1990-03-07 1994-11-08 Gao Gesellschaft Fur Automation Und Organisation Mbh IC card having severable mini chip card
US5531145A (en) * 1990-03-07 1996-07-02 Gao Gesellschaft Fur Automation Und Organisation Mbh Method for making IC card having severable mini chip card
US5834755A (en) * 1994-12-08 1998-11-10 Giesecke & Devrient Gmbh Electronic module and a data carrier having an electronic module
FR2745930A1 (en) * 1996-03-11 1997-09-12 Solaic Sa Integrated circuit smart card with part floating support for semiconductor
EP0887766A2 (en) * 1997-06-23 1998-12-30 Nec Corporation IC card having a slit for protecting an IC module from an external stress
EP0887766A3 (en) * 1997-06-23 2000-11-22 Nec Corporation IC card having a slit for protecting an IC module from an external stress
JP2003503167A (en) * 1999-06-30 2003-01-28 ワールド ゴルフ システムズ リミテッド Golf ball

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