JPS613438A - Plastic-sealed ic - Google Patents
Plastic-sealed icInfo
- Publication number
- JPS613438A JPS613438A JP59124310A JP12431084A JPS613438A JP S613438 A JPS613438 A JP S613438A JP 59124310 A JP59124310 A JP 59124310A JP 12431084 A JP12431084 A JP 12431084A JP S613438 A JPS613438 A JP S613438A
- Authority
- JP
- Japan
- Prior art keywords
- plastic
- lead
- thin layer
- metal oxide
- sealing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はプラスチック封止型工Cに関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a plastic sealing mold C.
従来のプラスチック封止型工0は、第2図に示すように
、鉄−ニッケル合金、あるいは銅合金を素材としたリー
ドフレーム1のチップボンディング部2およびワイヤー
ボンfイング部8に金または銀のメッキΦを施し、チッ
プボンディング部2のメツキキ上にシリコンチップ5を
塔載したのち、シリコンチップ5とリードフレーム1の
リード7のメッキ企とをファインワイヤー6で接続し、
リード7の引出部を除きこれらを封止プラスチック8で
包んで封じたプラスチック封止型工Cが広く用いられて
いる。As shown in FIG. 2, the conventional plastic encapsulation mold 0 has gold or silver applied to the chip bonding part 2 and wire bonding part 8 of a lead frame 1 made of iron-nickel alloy or copper alloy. After plating Φ and mounting the silicon chip 5 on the plating of the chip bonding part 2, the silicon chip 5 and the plating part of the lead 7 of the lead frame 1 are connected with a fine wire 6.
A plastic sealing mold C in which the leads 7 except for their lead-out portions are wrapped and sealed with a sealing plastic 8 is widely used.
このようなプラスチック封止型工Cでは、リードフレー
ムの素材である鉄−ニッケル合金や銅合金と、封止材料
であるシリコン樹脂やエポキシ樹脂などのプラスチック
との接着性が不充分で、両者の界面から外界の水分がパ
ッケージ内に侵入することがあり、水分がシリコンチッ
プに達すると、ナトリウム、カリウム、塩素などのイオ
ンと、共にシリコンチップそのもの、および電極、配線
を腐食して特性を劣化させるという問題がある。In this type of plastic encapsulation mold C, the adhesion between the iron-nickel alloy or copper alloy that is the material of the lead frame and the plastic such as silicone resin or epoxy resin that is the encapsulation material is insufficient, and the bond between the two is insufficient. Moisture from the outside world may enter the package from the interface, and if the moisture reaches the silicon chip, it will corrode the silicon chip itself, electrodes, and wiring together with ions such as sodium, potassium, and chlorine, deteriorating its characteristics. There is a problem.
本発明はリードフレームのリードと封止プラスチックと
の接着性を改善して上記の問題を解決することを目的と
する。The present invention aims to solve the above problems by improving the adhesion between the leads of a lead frame and the sealing plastic.
本願発明は上記の問題を解決するため、リードフレーム
のリードの表面に、非晶質の金属酸化物の薄層を設け、
これでリードを封止プラスチックと接合させるようにし
て封止プラスチックとリードとの接着性を高めたもので
ある。In order to solve the above problems, the present invention provides a thin layer of amorphous metal oxide on the surface of the lead of a lead frame,
This allows the leads to be bonded to the sealing plastic, thereby increasing the adhesion between the sealing plastic and the leads.
本発明で用いる金属酸化物としてはAt203’。The metal oxide used in the present invention is At203'.
S’10 、 MgO’、 y’6 、 Fe O、N
i01zrO1CuOなどから選ばれ、その表面層の非
晶質の部分の厚さが0.1〜10μmであればよい0
リードの表面に非晶質の金属酸化物の薄層を形 −成す
るには、PvD法又はOVD法を用いる)のが最も実用
的である。この方法によれば、リードフレームの材質に
かかわらず、密着性のよい薄層を形成できる。薄層の形
成は他の方法でもよく、IJ +ドフレームのリードの
所要部分をレーザービームで照射して酸化させた後、急
冷する方法などを用いることもできる。S'10, MgO', y'6, FeO, N
It is sufficient that the amorphous surface layer has a thickness of 0.1 to 10 μm.To form a thin layer of amorphous metal oxide on the surface of the lead. , PvD method or OVD method) is the most practical. According to this method, a thin layer with good adhesion can be formed regardless of the material of the lead frame. Other methods may be used to form the thin layer, such as a method in which required portions of the leads of the IJ + frame are oxidized by irradiation with a laser beam and then rapidly cooled.
封正に用いるプラスチックとしては、従来から使用され
ている何れのものでも良く、例えばシリコン樹脂−エポ
キシ樹脂が挙げられる。The plastic used for sealing may be any conventionally used plastic, such as silicone resin-epoxy resin.
第2図に示すようにリード7の封止プラスチック8内に
おけるファインワイヤー6とのボンディング部より外部
側の少なくとも表面に、プラスチックとの接着性のよい
非晶質の金属酸化物の薄層をプラスチックと直接に接す
るように設けることにエリ、封止プラスチック8との密
着性が強められ、この部分より内部へ水分が侵入するこ
とを防止できる。この非晶質の金属酸化物の薄層はリー
ド7の幅の広い上下両面に形成す、るだけでも効果があ
るが、完全を期するためには上下面だけでなく側面にも
施して四周に連続して施すのがよい。As shown in FIG. 2, a thin layer of amorphous metal oxide that has good adhesion to plastic is applied to at least the surface of the lead 7 outside the bonding portion with the fine wire 6 within the sealing plastic 8. By providing it in direct contact with the sealing plastic 8, the adhesiveness with the sealing plastic 8 is strengthened, and moisture can be prevented from penetrating into the interior through this portion. It is effective to simply form this thin layer of amorphous metal oxide on the wide upper and lower surfaces of the lead 7, but in order to ensure completeness, it should be applied not only on the upper and lower surfaces but also on the side surfaces. It is best to apply it continuously.
本発明で設ける金属酸化物を非晶質とするのは、プラス
チック封止用に広く用いられているエポキシ樹脂との密
着性が特に良好な為である。The reason why the metal oxide provided in the present invention is amorphous is that it has particularly good adhesion with epoxy resins widely used for sealing plastics.
非晶質の金属酸化物の薄層は本発明の目的とする効果を
得る為には0.1μm以上の厚みとする必要があるが、
10μmを超える厚さにするとhヒートショックによっ
て剥離や亀裂を生ずる恐れがあり、また薄層形成のため
の加工費が高くなるのでXo、1〜10μmの厚さとす
るのが良い。The thin layer of amorphous metal oxide needs to have a thickness of 0.1 μm or more in order to obtain the desired effect of the present invention.
If the thickness exceeds 10 .mu.m, there is a risk of peeling or cracking due to heat shock, and the processing cost for forming a thin layer increases, so the thickness is preferably 1 to 10 .mu.m.
またプラスチック封止型工Cを製作するに際し、リード
フレームのリードの所要部分に非晶質の金属酸化物の薄
層を設けたも−のを用いて、チップボンディングやワイ
ヤーボンディング加工を行なえば、これら加工の際の加
熱による表面状態の変化は、非晶質の金属酸化物の薄層
の部分では殆んど蛋じないので、封止条件と整合が容易
となり1リークパスが小さくなる大型シリコンチップを
使用するIOや、小型パッケージでは特にその効果は大
きい。In addition, when manufacturing the plastic encapsulation mold C, if a thin layer of amorphous metal oxide is provided on the required parts of the leads of the lead frame, chip bonding or wire bonding processing can be performed. Changes in the surface state due to heating during these processings hardly occur in the thin layer of amorphous metal oxide, so it is easy to match the sealing conditions and the leakage path is small for large silicon chips. This effect is particularly great for IOs that use IOs and small packages.
厚さ0−125eu*の42重量%Ni−lFe合金板
を、プレ・スで・打抜いてリードフレームを作り、この
リードフレームのチップボンディング部およびワイヤー
ボンディング部に一電気メツキでスポット状に厚さ5μ
mの銀のメッキを施し、ワイヤーボンディング部に近接
して外部側一部にhイオンブレーティング法により厚さ
0.5μmの非晶質の酸化アルミニウムの薄層を、リー
ドの全周に連続して形成した。A 42% by weight Ni-lFe alloy plate with a thickness of 0-125eu* is punched out using a press to make a lead frame, and the chip bonding area and wire bonding area of this lead frame are plated in spots with a thickness of 0-125eu*. 5μ
A thin layer of amorphous aluminum oxide with a thickness of 0.5 μm is continuously applied around the entire circumference of the lead using the h-ion blating method on a part of the outside near the wire bonding part. It was formed by
形成条件は基板温度200Cs蒸着速度0,2μm/
m inであった。The formation conditions were: substrate temperature: 200 Cs, deposition rate: 0.2 μm/
It was min.
この後チップボンディング、ワイヤーボンディングを行
なって非晶質の酸化アルミニウムの薄層を施したリード
の部分が埋込まれるようにエポキシ樹脂でモールドして
、エポキシ樹脂封止工Cを作成した。Thereafter, chip bonding and wire bonding were performed, and the lead portion coated with a thin layer of amorphous aluminum oxide was molded with epoxy resin so as to be embedded, thereby creating an epoxy resin sealant C.
得られたICは、従来の表面が非晶質である酸化アルミ
ニウム層を有しないリードフレームを用いた工Cに比べ
ると、125C12気圧の水蒸気中での特性劣化テスト
における寿命が2倍以上の150〜200時間を示した
。The obtained IC has a lifespan of 150°C, which is more than twice as long in a characteristic deterioration test in water vapor at 125C and 12 atmospheres compared to the conventional lead frame with an amorphous surface and no aluminum oxide layer. ~200 hours were shown.
本発明によれば一65〜150Cのヒートサイクル20
0回を経た後でも封止性の劣化が認められず、プラスチ
ック封止型工Oの信頼性を、生産性は劣るが信頼性の高
い高価なセラミック封止工Cに近づけることができる。According to the present invention, heat cycles of 20 to 165 to 150C
No deterioration in sealing performance was observed even after 0 cycles, and the reliability of the plastic sealing process O can be brought close to that of the expensive ceramic sealing process C, which is inferior in productivity but highly reliable.
第1図は本発明にかかるプラスチック封止型工Cの一例
の断面図、第2図は従来のプラスチック封止型工aの断
面図である。
1・・リードフレーム、2・・チンプボンデイング部、
3・・ワイヤーボンディング部、4・・メッキ、5・・
シリコンチツ/、6・・ファインワイヤー、7・・リー
ド、8・・封止プラスチック、9・・金属酸化物の薄層
。FIG. 1 is a cross-sectional view of an example of a plastic sealing mold C according to the present invention, and FIG. 2 is a cross-sectional view of a conventional plastic sealing mold A. 1. Lead frame, 2. Chimp bonding part,
3. Wire bonding part, 4. Plating, 5.
Silicon/, 6. Fine wire, 7. Lead, 8. Sealing plastic, 9. Thin layer of metal oxide.
Claims (3)
のリードと封止プラスチックとが、該リードの表面に形
成した非晶質の金属酸化物の薄層によつて接合されてい
ることを特徴とするプラスチック封止型IC。(1) A plastic in which the lead of a lead frame in a plastic-sealed IC is bonded to the encapsulating plastic by a thin layer of amorphous metal oxide formed on the surface of the lead. Sealed IC.
O、Y_2O_3、Fe_2O_3、NiO、ZrO、
Cu_2Oのうちから選ばれたものからなる特許請求の
範囲(1)項記載のプラスチック封止型IC。(2) Metal oxides are Al_2O_3, SiO_2, Mg
O, Y_2O_3, Fe_2O_3, NiO, ZrO,
The plastic-sealed IC according to claim (1), which is made of one selected from Cu_2O.
μmである特許請求の範囲(1)項又は(2)項記載の
プラスチック封止型IC。(3) Thickness of the thin layer of amorphous metal oxide is 0.1 to 10
The plastic-sealed IC according to claim (1) or (2), which has a diameter of μm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59124310A JPS613438A (en) | 1984-06-15 | 1984-06-15 | Plastic-sealed ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59124310A JPS613438A (en) | 1984-06-15 | 1984-06-15 | Plastic-sealed ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS613438A true JPS613438A (en) | 1986-01-09 |
Family
ID=14882162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59124310A Pending JPS613438A (en) | 1984-06-15 | 1984-06-15 | Plastic-sealed ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS613438A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5422788A (en) * | 1992-08-18 | 1995-06-06 | Texas Instruments Incorporated | Technique for enhancing adhesion capability of heat spreaders in molded packages |
JP5059251B1 (en) * | 2012-04-09 | 2012-10-24 | 日本コルモ株式会社 | LED device |
-
1984
- 1984-06-15 JP JP59124310A patent/JPS613438A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5422788A (en) * | 1992-08-18 | 1995-06-06 | Texas Instruments Incorporated | Technique for enhancing adhesion capability of heat spreaders in molded packages |
JP5059251B1 (en) * | 2012-04-09 | 2012-10-24 | 日本コルモ株式会社 | LED device |
WO2013153591A1 (en) * | 2012-04-09 | 2013-10-17 | 日本コルモ株式会社 | Led device |
US8847274B2 (en) | 2012-04-09 | 2014-09-30 | Nihon Colmo Co., Ltd. | LED device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6852567B1 (en) | Method of assembling a semiconductor device package | |
US5530284A (en) | Semiconductor leadframe structure compatible with differing bond wire materials | |
JPS60257160A (en) | semiconductor equipment | |
EP0090566B1 (en) | Semiconductor device package | |
JPS6050343B2 (en) | Lead frame for semiconductor device manufacturing | |
JPS613438A (en) | Plastic-sealed ic | |
CA1201211A (en) | Hermetically sealed semiconductor casing | |
US4765528A (en) | Plating process for an electronic part | |
US4974052A (en) | Plastic packaged semiconductor device | |
JPH0567069B2 (en) | ||
JPS6123348A (en) | Resin sealing type semiconductor device | |
JPS6050342B2 (en) | Lead frame for semiconductor device manufacturing | |
JP2506429B2 (en) | Resin-sealed semiconductor device | |
JPS59144159A (en) | Plastic encapsulated IC | |
JPS60119765A (en) | Resin-encapsulated semiconductor device and lead frame used therefor | |
JPH01244653A (en) | Semiconductor device | |
JPS6178150A (en) | Lead frame for resin-sealed semiconductor devices | |
JPH0558259B2 (en) | ||
JPS63133537A (en) | Mamufacture of semiconductor device | |
JPS61128551A (en) | Lead frame for semiconductor device | |
JPH0689478B2 (en) | Method for manufacturing resin-sealed semiconductor device | |
JPS6032774Y2 (en) | Stem for semiconductor devices | |
JPH02303052A (en) | Semiconductor package | |
JPS6079732A (en) | Semiconductor device | |
JPS60223147A (en) | Semiconductor device and its manufacturing method |