JPS61296805A - Operational amplifier - Google Patents

Abstract

PURPOSE:To quicken the settling and to attain high speed operation even when the gain is in either of two different states by providing the 1st switch setting the 1st capacitor to plural different values and the 2nd switch setting the 2nd capacitor to plural different values. CONSTITUTION:When the 1st frequency compensating capacitor Cc1 is C1+C2 when the switch S1 is closed depending on the operating state of an operational amplifier, and the value Cc1 is C2. Similarly, the 2nd frequency compensation capacitor Cc2 is C3+C4 when the switch S2 is closed and is C3 when the switch S2 is opened. The switches S1, S2 are closed with the state of gain unity to increase the value Cc thereby bringing the phase margin to a proper value and quickening the settling. With the gain 8, the switches S1, S2 are opened to decrease the value Cc, it is suppressed that the phase margin is excessive while the value Cc is kept constant, the phase margin is kept to a proper value to quicken the settling.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to an operational amplifier using MISFET.

(Prior art and its problems) In the conventional operational amplifier, as shown in the circuit diagram in Figure 4,
The capacitance used in the frequency compensation circuit can only take a constant value. In the operational amplifier shown in FIG. 4, the capacitor Cc1 in the first frequency compensation circuit has the role of suppressing the phase in the frequency characteristics of the operational amplifier, increasing the phase margin, and preventing oscillation. Further, the second frequency compensation circuit including the capacitor Cc 2 has the function of adjusting the positions of high-order poles and zero points to obtain good frequency characteristics.

Now, considering the transient response of an operational amplifier, if the phase margin is small, the transient response becomes oscillatory, and the time it takes to settle into a steady state, that is, the settling time becomes long. On the other hand, if the phase margin is too large, the pursuit of transient response becomes poor, and the settling time becomes longer. Therefore, the phase margin must be set to an optimal value.

When the operational amplifier is used only in a voltage follower connection as shown in FIG. 5, it is possible to determine the value of the phase margin and therefore the value of the frequency compensation capacitor Cc1 that minimizes the settling time. However, when operating an operational amplifier in a system as shown in FIG. 3, it is not possible to shorten the settling time with the conventional operational amplifier. The reason for this will be explained below.

First, during reset, switch Sr closes and capacitor C
Discharge the charge on F and switch S at the same time.

is connected to the VZII side, and the capacitor C01c qt
=C.

Stores a charge of (Vref −Vn+). Next, after switch Sr opens, switch SO changes from vXM side to V
Switch to ref side. As a result, the charge on Co becomes CF
Moving up, if the output voltage of the operational amplifier is vo, CLt
= CF (Vref - Vo ) = qt, so (Vref - Vo ) = ” (Vref -'h
(bian). Therefore, this state F is reached. Since it is connected as a voltage follower at the time of reset, it takes two different gain states: a state where the gain is 1 and a state where the gain is small during calculation. Since the gain is different during reset and during calculation, in a conventional operational amplifier in which the frequency compensation capacitance remains constant, the phase margin will be different between reset and calculation. Specifically, Co=2C
, Cv=C, which are often used values, the phase margin when the gain is 2F=8 is about 40° larger than the phase margin when the gain is 1. (However, the gain 80 phase margin does not exceed 90). Therefore, if the phase margin is 50 degrees or more when the gain is 1, there is a phase margin of 90 degrees at a gain of 8, and if it is 20 degrees when the gain is 1, there is a phase margin of 60 degrees at a gain of 8.

Therefore, if the frequency compensation capacitor is determined so that settling is fast when the gain is 1, when the gain is 8, the phase margin is too large, making pursuit difficult and slowing down the settling. An example of this is shown by curve A in FIG.

The horizontal axis is time, t is the time when switch Sr is opened, and t! is the time when the switch So is switched from the Vxx side to the Vref side, t is the time when the switch SQ is switched from the Vref side to the VXW side again, and the switch Sr is closed and reset. The vertical axis is the output voltage of the operational amplifier. 6th
As you can see from curve A in the figure, with a gain of 1 (Sera) IJ song (ts and later) is fast, but with a gain of 8 (t.

During the period from t to t), settling is slow.

Conversely, if the value of the frequency compensation capacitor is determined so that the settling at a gain of 8 is fast, there will be no phase margin at a gain of 1, and the setting will become oscillating and slow at a gain of 1. An example of this is shown by curve B in FIG. As you can see from Figure 6, curve B is curve AK when the gain is 80.
It's relatively fast, but when the gain is 10, the beset ring is overwhelmingly slow compared to song #A. Therefore, in the prior art, when an operational amplifier is used in two states with different gains, it is impossible to obtain an operational amplifier that can operate at high speed in either state.

In view of the above points, an object of the present invention is to provide an operational amplifier that can quickly settle and operate at high speed in either of two states with different gains.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides means in which the sources are commonly connected to the first constant voltage source via the first constant current source and the drains are connected in common to the first constant voltage source via the first constant current source. an input differential pair consisting of first and second MISPETs connected to a second constant voltage source via second and third constant current sources, respectively;
and a gate-grounded third and fourth MISFET connected to the drain of the second MISFET, respectively, and a drain and a gate commonly connected to the drain of the third MISFET, and a source connected to the first MISFET. a fifth MISFET connected to a constant voltage source; and a gate connected to the third MISFET.
The source connected to the drain of the FET and whose drain is connected to the drain of the fourth MFC SFB'I' is connected to the first
a sixth MISFET whose drain is connected to the output terminal and whose gate is connected to the constant voltage source of the sixth MISFET;
A connection point between a seventh MISFET connected to the drain of the ET and whose source is connected to the first constant voltage source, and the second MISFET and the fourth MISFET whose drain is connected to the output terminal and whose gate is connected to the second MISFET. a first capacitor and a tenth MI 3FET between the output terminal and the gate of the seventh MI 5FET; a first frequency compensation circuit formed by connecting in series the sixth MI
An operational amplifier circuit comprising a second frequency compensation circuit formed by connecting a second capacitor and an eleventh MISFET in series between the drain and gate of the 5PIAT, the first capacitance being different from each other. A first switch that sets the second capacitance to a plurality of values and a second switch that sets the second capacitance to a plurality of mutually different values are provided.

(Embodiment) A typical embodiment of the present invention is shown in a circuit diagram in FIG. The switch S1 is a switch for changing the value of the first frequency compensation capacitance Cc1 depending on the usage state of the operational amplifier, and when the switch S1 is closed, the value of Cc1 is C1.
+C'2, if open, the value of CCl becomes C2.

Similarly, the switch S2 is a switch for changing the value of the second frequency compensation capacitor Cc2. When the switch S2 is closed, the value of Cc2 becomes C3+C4, and when it is open, the value of Cc2 becomes C3+C4.
It becomes 3. By adopting such a structure, the state of gain 1 and the state of gain 8 described in the section (Prior art and its problems) can be achieved.
When switching between two states with different gains, such as the state of In addition, in the state of gain 8, by opening switches 81 and 82 and reducing the value of Cc, the phase margin can be suppressed from becoming too large until t when the COO value is constant, and the phase margin can be increased. By keeping it at an appropriate value, you can speed up the settling process.

FIG. 2 shows the transient response of the operational amplifier of this example. Second
Like FIG. 6, this figure shows the transient response when the operational amplifier is used as shown in FIG. 3. horizontal axis, vertical axis t,
, t, I t, are respectively the same as those in FIG. As can be seen by comparing Figures 2 and 6,
In the transient response of this embodiment, settling is more than an order of magnitude faster in either state, regardless of the gain value. Therefore, compared to conventional operational amplifiers, it is possible to operate an order of magnitude faster in a system that operates with different gains.

(Effects of the Invention) According to the present invention, as explained above, it is possible to provide an operational amplifier that has an optimal phase margin even when used with different gains, has a fast settling time, and can operate at high speed. .

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a typical embodiment of the present invention, FIG. 2 is a diagram showing the transient response of the output voltage when the operational amplifier of FIG. 1 is operated in the system of FIG. 3, and FIG. Figure 4 is a circuit diagram showing a system that performs calculations using operational amplifiers, Figure 4 is a circuit diagram showing a conventional operational amplifier, Figure 5 is a diagram showing voltage follower connections for operational amplifiers, and Figure 6 is Figure 4. 4 is a diagram showing the transient response of the output voltage when the operational amplifier of FIG. 3 is operated in the system of FIG. 3. FIG. Fig. 1 9 - (-) input 4 moves 3 A only - week Fig. 3 r vre no Fig. 5 11 - - pull power end hand Fig. 4 1 O - (+) input (bleaching 11 - 1 Hachika 4 moves

Claims (1)

[Claims] first and third constant voltage sources whose sources are commonly connected to the first constant voltage source via the first constant current source and whose drains are connected to the second constant voltage source via the second and third constant current sources, respectively; second M
an input differential pair consisting of an ISFET, third and fourth common-gate MISFETs whose sources are connected to the drains of the first and second MISFETs, and a drain and a gate connected to the drain of the third MISFET; a fifth MISFET whose source is connected to the first constant voltage source and whose gate is connected to the third MISFET.
The drain is connected to the drain of the fourth MISFE.
a sixth MISFET whose drain is connected to the drain of the sixth MISFET and whose source is connected to the first constant voltage source; a sixth MISFET whose drain is connected to the output terminal and whose gate is connected to the drain of the sixth MISFET and whose source is connected to the first constant voltage source; a seventh MISFET connected to a constant voltage source; a drain connected to the output terminal and a gate connected to the second MISFET; and the fourth MISFET.
an eighth MISFET connected to a connection point with the FET and whose source is connected to the second constant voltage source; a first capacitor and a tenth MISFET between the output terminal and the gate of the seventh MISFET; a first frequency compensation circuit formed by connecting MISFETs in series, and a second frequency compensation circuit formed by connecting a second capacitor and an eleventh MISFET in series between the drain and gate of the sixth MISFET. In the operational amplifier including a frequency compensation circuit, a first switch sets the first capacitance to a plurality of mutually different values, and a second switch sets the second capacitance to a plurality of mutually different values. An operational amplifier comprising: