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JPS61260629A - Film for wafer processing - Google Patents

Film for wafer processing

Info

Publication number
JPS61260629A
JPS61260629A JP60101191A JP10119185A JPS61260629A JP S61260629 A JPS61260629 A JP S61260629A JP 60101191 A JP60101191 A JP 60101191A JP 10119185 A JP10119185 A JP 10119185A JP S61260629 A JPS61260629 A JP S61260629A
Authority
JP
Japan
Prior art keywords
film
wafer
wafers
hardness
shore
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60101191A
Other languages
Japanese (ja)
Other versions
JPH0789546B2 (en
Inventor
Osamu Narimatsu
成松 治
Michiyasu Ito
伊藤 道康
Kazuyoshi Komatsu
小松 和義
Yasuhiro Shibata
柴田 康広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui Toatsu Chemicals Inc
Original Assignee
Mitsui Toatsu Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Toatsu Chemicals Inc filed Critical Mitsui Toatsu Chemicals Inc
Priority to JP60101191A priority Critical patent/JPH0789546B2/en
Publication of JPS61260629A publication Critical patent/JPS61260629A/en
Publication of JPH0789546B2 publication Critical patent/JPH0789546B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Laminated Bodies (AREA)
  • Adhesive Tapes (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、シリコンウェハ等のウェハを研磨加工する際
に用いるウェハの破損防止用フィルムに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a film for preventing damage to wafers used when polishing wafers such as silicon wafers.

〔従来の技術〕[Conventional technology]

半導体チップの製造に用いられるウェハには、シリコン
やガリウムーヒ素等のものがあり、なかでもシリコンが
多用されている0例えばシリコンウェハでは、高純度の
単結晶シリコンを厚さ 500〜1000u程度に薄く
スライスすることにより製造されているが、近年、チッ
プの小型化および量産化にともない、さらに薄肉化する
傾向にある。また、その大きさについても従来の3〜4
インチから5〜8インチへ移行しつつある。
Wafers used in the manufacture of semiconductor chips include materials such as silicon and gallium-arsenide, among which silicon is often used.For example, silicon wafers are made by thinning high-purity single crystal silicon to a thickness of about 500 to 1000 μ. Although they are manufactured by slicing, in recent years there has been a trend toward thinner chips as chips become smaller and more mass-produced. In addition, the size is 3 to 4 compared to the conventional size.
There is a shift from inches to 5 to 8 inches.

シリコンウェハ自体はもともと脆いものであり、さらに
、その表面に集積回路が組み込まれたものでは、表面の
凹凸のために僅かな外力によっても破損し易いという欠
点があり、裏面研磨等の後加工の際の大きな障害となっ
ている。
Silicon wafers themselves are inherently brittle, and in addition, those with integrated circuits built into their surfaces have the disadvantage that they are easily damaged by even the slightest external force due to the unevenness of the surface, and post-processing such as backside polishing is required. This has become a major obstacle.

従来よりシリコンウェハの表面加工時の破損防止方法と
して、パラフィン、レジストインク等を使用して表面の
凹凸を埋め、加わる外力を分散させるようにしつつ後加
工する方法が採られてきた。しかし、この方法ではパラ
フィン等を塗布した後の乾燥固化、さらには研磨後に該
パラフィン等を加熱下で溶剤を用いて洗浄、除去する工
程が必要となり、操作が煩雑になった。これに加え、こ
のような従来の方法では5インチ以上の大口径ウェハの
研磨においてはウェハの破損が依然として防止できず、
生産性向」二の大きな障害となっていた。また、パラフ
ィン等の使用にともない、これらによるウェハ表面の汚
染の問題もあり、パラフィン等の塗布法に代わるウェハ
の破損防止法の開発が強く要望されていた。
Conventionally, as a method for preventing damage during surface processing of silicon wafers, a method has been adopted in which paraffin, resist ink, etc. are used to fill in the irregularities on the surface and perform post-processing while dispersing applied external forces. However, this method requires a step of drying and solidifying after applying paraffin, and further, cleaning and removing the paraffin using a solvent under heating after polishing, making the operation complicated. In addition, such conventional methods still cannot prevent wafer breakage when polishing large diameter wafers of 5 inches or more.
"Productivity" was the second major obstacle. Further, with the use of paraffin, etc., there is a problem of contamination of the wafer surface due to these, and there has been a strong demand for the development of a method for preventing damage to wafers as an alternative to the method of applying paraffin, etc.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上の問題点に鑑み、本発明の目的は、ウェハ、好まし
くはシリコンウェハの研磨加工に際し、その破損を防止
するとともに、生産性の向上に寄与し、しかもウェハ表
面を汚染することのないウェハ加工用のフィルムを提供
することにある。
In view of the above problems, it is an object of the present invention to prevent damage to wafers, preferably silicon wafers, and to contribute to improved productivity during polishing of wafers, and to process wafers without contaminating the wafer surface. The aim is to provide films for

〔問題点を解決するための手段〕[Means for solving problems]

本発明者らは、ウェハ表面の凹凸を埋め、外力を分散さ
せる方法として、研磨加工時に特足の硬度を有する基材
フィルムを粘着層を介してウェハ表面に貼り合せること
によりウェハの破損が防止できることを見い出した。更
に、特定の硬度を有する補助フィルムをこの加工フィル
ムの粘着層配設面とは反対の面に積層することにより、
ウェハ破損防止効果を低下させることなく、ウェハの加
工フィルムへの貼付は作業性およびウェハ研磨後のフィ
ルム剥離作業性が大巾に改善されることを見い出し本発
明を完成するに至った。
The present inventors have developed a method for filling irregularities on the wafer surface and dispersing external forces by attaching a base film with special hardness to the wafer surface via an adhesive layer during polishing to prevent wafer damage. I found out what I can do. Furthermore, by laminating an auxiliary film having a specific hardness on the opposite side of the processed film to the adhesive layer,
The present inventors have discovered that the workability of attaching a wafer to a processed film and the workability of peeling off the film after polishing the wafer can be greatly improved without reducing the effect of preventing wafer damage, and have completed the present invention.

すなわち本発明は、ショアーD型硬度が40以下である
基材フィルムの片側表面上にショアーD型硬度が40よ
り大きい補助フィルムが積層され、該基材フィルムの他
方の表面」―に粘着層が配設されてなるウェハ加工用フ
ィルムである。
That is, in the present invention, an auxiliary film having a Shore D hardness of more than 40 is laminated on one surface of a base film having a Shore D hardness of 40 or less, and an adhesive layer is provided on the other surface of the base film. This is a film for processing wafers.

〔発明を実施するための好適な態様〕[Preferred mode for carrying out the invention]

本発明の加工用フィルムの使用の対象となるウェハは、
シリコンウェハのみならずガリウムーヒ素、ガリウム−
リン、ゲルマニウム等のウェハが挙げられ、特に大口径
のシリコンウェハに対して好適に使用される。
The wafers to which the processing film of the present invention is applied are:
Not only silicon wafers but also gallium - arsenic, gallium -
Examples include wafers made of phosphorus, germanium, etc., and they are particularly suitable for use with large-diameter silicon wafers.

本発明で用いる基材フィルムとしては、熱可塑性樹脂、
熱硬化性樹脂、天然ゴムまたは合成ゴムを素材とするも
ので、ショアーD型硬度が40以下、好ましくは30以
下のものであれば各種のフィルムが適宜選択できる。シ
ョアーD型硬度とは、ASTM D−2240によるD
型ショアー硬度計を用いて測定した値である。硬度が4
0越えるものの場合にはウェハに加わる外力を分散させ
る能力が乏しく、ウェハの研磨時の破損を実質的に防止
できない。
The base film used in the present invention includes thermoplastic resin,
Various films can be suitably selected as long as they are made of thermosetting resin, natural rubber, or synthetic rubber and have a Shore D hardness of 40 or less, preferably 30 or less. Shore D hardness is D according to ASTM D-2240.
This is a value measured using a model Shore hardness tester. Hardness is 4
If it exceeds 0, the ability to disperse the external force applied to the wafer is poor, and damage to the wafer during polishing cannot be substantially prevented.

基材フィルムの素材としては、エチレン−酢酸ビニル共
重合体、ポリブタジェン、ポリウレタン、軟質塩化ビニ
ル樹脂、ポリオレフィン、ポリエステル、ポリアミド等
の熱可塑性エラストマー;およびジエン系、ニトリル系
、シリコン系、アクリル系等の合成ゴム等が代表的に例
示される。該基材フィルムの厚みは、保護するウェハの
材質、形状、表面状態および研磨方法、研磨条件により
適宜選択されるが、通常lO〜2000μ程度のものが
適当である。
Materials for the base film include thermoplastic elastomers such as ethylene-vinyl acetate copolymer, polybutadiene, polyurethane, soft vinyl chloride resin, polyolefin, polyester, and polyamide; and diene-based, nitrile-based, silicone-based, and acrylic-based materials. A typical example is synthetic rubber. The thickness of the base film is appropriately selected depending on the material, shape, surface condition, polishing method, and polishing conditions of the wafer to be protected, but is usually about 10 to 2000 μm.

−・方、補助フィルムとしては、熱可塑性樹脂、熱硬化
性樹脂、あるいは合成樹脂をラミネートした紙、薄木板
等を素材とするもので、ショアーD型硬度が40を越え
るものであれば各種のフィルムが適宜選択できる。硬度
が40以下のものでは補助フィルムの積層の目的が達成
できず、貼合せ、剥離時の作業性を改善することができ
ない。
- On the other hand, the auxiliary film may be made of paper, thin wood board, etc. laminated with thermoplastic resin, thermosetting resin, or synthetic resin. Films can be selected as appropriate. If the hardness is 40 or less, the purpose of laminating the auxiliary film cannot be achieved, and workability during lamination and peeling cannot be improved.

補助フィルムの素材としては、ポリエチレン、ポリプロ
ピレン、ポリエステル、ポリアミド、硬質塩化ビニル樹
脂、ポリエーテルサルフォン、ポリアクリル、フェノー
ル樹脂等の合成樹脂、あるいはフェノール樹脂を含浸し
た紙、ポリエチレンをコーティングした紙等が代表的な
ものとして例示される。
Materials for the auxiliary film include synthetic resins such as polyethylene, polypropylene, polyester, polyamide, hard vinyl chloride resin, polyethersulfone, polyacrylic, and phenolic resin, paper impregnated with phenolic resin, paper coated with polyethylene, etc. It is illustrated as a representative example.

該補助フィルムの厚みは、ウェハに加工用フィルムを貼
付ける機械および剥離する機械の仕様により、また基材
フィルムの厚みにより適宜選択されるが、通常、lO〜
1000−程度のものが適当である。
The thickness of the auxiliary film is appropriately selected depending on the specifications of the machine that attaches the processing film to the wafer and the machine that peels it off, and the thickness of the base film.
A value of about 1000 is appropriate.

基材フィルムへの補助フィルムの積層方法としては、 ■予め製造された基材フィルムと補助フィルムのいずれ
か片方に接着剤を塗布して重ねて貼り合わせる方法、 ■2層Tダイもしくは2層インフレーションにより同時
押出しにより接着させる方法、 (3)予め製造された一方のフィルムに他方の樹脂をT
タイ法もしくはカレンダー法により積層する方法。
Methods for laminating the auxiliary film onto the base film include: ■ Applying adhesive to either the pre-manufactured base film or the auxiliary film and laminating them together, ■ Two-layer T-die or two-layer inflation. (3) A method of bonding by co-extrusion with T.
A method of laminating using the tie method or calendar method.

等従来公知の各種積層方法が採用できる。Various conventionally known lamination methods can be employed.

基材フィルムの表面に設ける粘着層を構成する粘着剤と
しては、例えばアクリル系、エステル系、ウレタン系等
の粘着剤あるいは合成ゴム系粘着剤等の通常の市販され
ている粘着剤が使用できる。粘着層の厚みは、ウェハの
材質、形状、表面状態および研磨法等により適宜法めら
れるが、通常、 2〜2oo、us程度とするのが好ま
しい。
As the adhesive constituting the adhesive layer provided on the surface of the base film, common commercially available adhesives such as acrylic, ester, or urethane adhesives or synthetic rubber adhesives can be used. The thickness of the adhesive layer is determined appropriately depending on the material, shape, surface condition, polishing method, etc. of the wafer, but it is usually preferably about 2 to 2 0.0 μm.

粘着剤を基材フィルム表面に積層する方法としては、従
来公知の各種塗布方法、例えばロールコータ−法、グラ
ビアロール法、バーコード法、浸漬法、ハケ塗り法、ス
プレー法等が採用でき。
As a method for laminating the adhesive on the surface of the base film, various conventional coating methods such as a roll coater method, a gravure roll method, a barcode method, a dipping method, a brush coating method, a spray method, etc. can be employed.

基材フィルムの全面もしくは部分的に塗布することがで
きる。
It can be applied to the entire surface or part of the base film.

本発明のウェハ加ゴー用フィルムは、ウェハの表面の研
磨加Tの際に、ウェハをこの加工用フィルムの粘着層へ
貼り合せてウェハの裏面の研磨加工を行うのに用いるも
のである。このように加工用フィルムを使用することに
より裏面加工時のウェハの破損が防止できる。また、加
工が完了した後は、加工用フィルム上からウェハを剥離
して簡易な洗浄操作を実施すれば、ウェハ表面の汚染も
防止される。
The wafer processing film of the present invention is used for polishing the back surface of the wafer by bonding the wafer to the adhesive layer of the processing film during polishing T of the front surface of the wafer. By using a processing film in this manner, damage to the wafer during backside processing can be prevented. Further, after the processing is completed, the wafer is peeled off from the processing film and a simple cleaning operation is performed, thereby preventing contamination of the wafer surface.

〔発明の効果〕〔Effect of the invention〕

本発明のウェハ加工用フィルムは、基材フィルムがウェ
ハに加わる外力を吸収して分散する性質を有しているの
で、ウェハに貼り合せてウェハ表面の研磨加工を行えば
、加工時のウェハの破損を防止できる。また、補助フィ
ルムが積層されているので、保形性に優れ、ウェハへの
貼合せ時および研磨後の剥離時の作業性が非常に良く、
生産性向上にも大きな効果が発揮できる。
The wafer processing film of the present invention has the property that the base film absorbs and disperses external force applied to the wafer, so if it is bonded to the wafer and the wafer surface is polished, the wafer will be Damage can be prevented. In addition, since the auxiliary film is laminated, it has excellent shape retention and is very easy to work with when bonding to wafers and peeling off after polishing.
It can also have a great effect on improving productivity.

〔実施例〕〔Example〕

実施例1 ASTM D−2240に準じて測定したショアーD型
硬度が30であるエチレン−酢酸ビニル共重合体樹脂フ
ィルム(200μs厚さ)とショアーD型硬度が80の
ポリプロピレンフィルム(100μs厚さ)をアクリル
系接着剤”ポンロン” (三井東圧化学■製)を用いて
接着積層し、エチレン−酢酸ビニル共重合体樹脂フィル
ム面にコロナ放電処理を施した後、アクリル系粘着剤”
アロマテックス” (三井東圧化学■製)をロールコー
タ−機により塗布、乾燥して、約50−のアクリル系粘
着剤層を設けたウェハ加工用フィルムを作成した。
Example 1 An ethylene-vinyl acetate copolymer resin film (200 μs thick) with a Shore D hardness of 30 measured according to ASTM D-2240 and a polypropylene film (100 μs thick) with a Shore D hardness of 80 were prepared. The acrylic adhesive "Ponron" (manufactured by Mitsui Toatsu Chemical Co., Ltd.) is used to adhere and laminate the film, and the surface of the ethylene-vinyl acetate copolymer resin film is subjected to corona discharge treatment.
Aromatex" (manufactured by Mitsui Toatsu Chemical Co., Ltd.) was applied using a roll coater and dried to prepare a film for wafer processing provided with an acrylic adhesive layer of about 50 mm.

このフィルムを、集積回路が形成され表面の凹凸差が約
50μsのシリコンウェハ(6インチ)表面にディスコ
社製自動貼合せ機にて貼合せ、ウェハの裏面を研磨機(
ディスコ社製)で研磨した。研磨加工後、ウェハからフ
ィルムを剥し、ウェハを純水で洗浄して 100枚の裏
面加工済みウェハを製造した。このときのウェハの破損
数は皆無であり、その作業時間は全体で約30分であっ
た。
This film was laminated on the surface of a silicon wafer (6 inches) on which an integrated circuit was formed and the unevenness difference on the surface was approximately 50 μs using an automatic laminating machine manufactured by DISCO.
Polished with Disco Co., Ltd.). After polishing, the film was peeled off from the wafer, and the wafer was washed with pure water to produce 100 wafers with the back side processed. No wafers were damaged at this time, and the total working time was about 30 minutes.

実施例2 ショアーD型硬度が20であるブタジェンゴムとショア
ーD型硬度が80のポリプロピレンを2層Tタイ法にて
同時製膜して得られた2層フィルム(ブタジェンゴム層
の厚さ200%、ポリプロピレン層の厚さ 100Q 
)のブタジェンゴム面一1;に、実施例1と同様にして
約30μ厚みのアクリル系粘着剤を塗布したシリコンウ
ェハ加工用フィルムを作成した。このフィルムを、表面
の凹凸差が約30−のシリコンウェハ表面に貼り合せ、
実施例1と同様の方法により、 100枚の研磨シリコ
ンウェハを製造した。その結果、破損不良品はOであり
、約30分で全加工作業を完了した。
Example 2 A two-layer film obtained by simultaneously forming butadiene rubber having a Shore D hardness of 20 and polypropylene having a Shore D hardness of 80 by a two-layer T-tie method (butadiene rubber layer thickness 200%, polypropylene rubber having a Shore D hardness of 80). Layer thickness 100Q
A silicon wafer processing film was prepared by applying an acrylic adhesive to a thickness of about 30 μm on the butadiene rubber side 1 of the film in the same manner as in Example 1. This film was attached to the surface of a silicon wafer with a surface roughness difference of about 30-
By the same method as in Example 1, 100 polished silicon wafers were manufactured. As a result, the number of damaged and defective products was O, and the entire processing work was completed in about 30 minutes.

比較例1 実施例1で用いたのと同じシリコンウェハの表面上に、
約50℃のレジストインクを流し込み2時間冷却した後
、ウェハの裏面を研磨し、次いで50℃に加熱たトリク
ロロエチレンでレジストインクを洗浄し、更に純水で洗
浄する方法により、 100枚の加工シリコンウェハを
製造した。この時のウェハの破損数は20枚であった。
Comparative Example 1 On the surface of the same silicon wafer used in Example 1,
100 processed silicon wafers were made by pouring resist ink at about 50°C, cooling it for 2 hours, polishing the back side of the wafer, washing the resist ink with trichlorethylene heated to 50°C, and then washing with pure water. was manufactured. The number of broken wafers at this time was 20.

また、却下作業に要した時間は全体で約5時間であった
。すなわち実施例1に比べ生産速度は約l/10、製品
歩留りは80%であった。更に、洗浄後のウェハ表面に
はレジストインクによる汚染が認められた。
The total time required for the rejection process was approximately 5 hours. That is, compared to Example 1, the production rate was about 1/10 and the product yield was 80%. Furthermore, contamination by resist ink was observed on the wafer surface after cleaning.

比較例2 ショアーD型硬度が30であるエチレン−酢酸ビニル共
重合体樹脂フィルム単体(厚さ 100μs)に実施例
1と同様にしてアクリル系粘着剤を塗布したシリコンウ
ェハ加工用フィルムを作成した。
Comparative Example 2 A silicon wafer processing film was prepared by applying an acrylic adhesive to an ethylene-vinyl acetate copolymer resin film (thickness: 100 μs) having a Shore D hardness of 30 in the same manner as in Example 1.

このフィルムを実施例1で用いたのと同じシリコンウェ
ハ表面に貼り合せ、 100枚のウェハの裏面を研磨し
た。その結果ウェハの破損数はOであったが、加工用フ
ィルムのウェハへの貼合せ、剥離に時間を要し、作業時
間は全体で約1時間かかり、実施例1に比べ生産速度は
約1/2であった。
This film was attached to the surface of the same silicon wafer as used in Example 1, and the back surfaces of 100 wafers were polished. As a result, the number of damaged wafers was O, but it took time to attach and peel the processing film to the wafer, and the total working time was about 1 hour, and the production speed was about 1 hour compared to Example 1. /2.

比較例3 ショアーD型硬度が50である低密度ポリエチレンフィ
ルム(厚み200u )とショアーD型硬IIが80の
ポリプロピレンフィルム(厚み 1oop)を実施例1
と同様に積層し、低密度ポリエチレンフィルム面に実施
例1と同様にして約30騨厚みのアクリル系粘着剤を塗
布したシリコンウェハ加工用フィルムを作成した。
Comparative Example 3 A low-density polyethylene film (thickness 200u) having a Shore D hardness of 50 and a polypropylene film (thickness 1oop) having a Shore D hardness II of 80 were used in Example 1.
The films were laminated in the same manner as in Example 1, and an acrylic adhesive was applied to the surface of the low-density polyethylene film in the same manner as in Example 1 to prepare a silicon wafer processing film.

このフィルムを用いて、実施例1と同様にして100枚
のシリコンウェノ\の裏面研磨加Tを行った。その結果
、破損による不良品が76枚も発生した。
Using this film, the back surface of 100 silicone sheets was polished in the same manner as in Example 1. As a result, 76 defective products were produced due to damage.

Claims (1)

【特許請求の範囲】[Claims] 1)ショアーD型硬度が40以下である基材フィルムの
片側表面上にショアーD型硬度が40より大きい補助フ
ィルムが積層され、該基材フィルムの他方の表面上に粘
着層が配設されてなるウェハ加工用フィルム。
1) An auxiliary film having a Shore D hardness of more than 40 is laminated on one surface of a base film having a Shore D hardness of 40 or less, and an adhesive layer is provided on the other surface of the base film. A film for wafer processing.
JP60101191A 1985-05-15 1985-05-15 Wafer processing film Expired - Lifetime JPH0789546B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60101191A JPH0789546B2 (en) 1985-05-15 1985-05-15 Wafer processing film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60101191A JPH0789546B2 (en) 1985-05-15 1985-05-15 Wafer processing film

Publications (2)

Publication Number Publication Date
JPS61260629A true JPS61260629A (en) 1986-11-18
JPH0789546B2 JPH0789546B2 (en) 1995-09-27

Family

ID=14294062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60101191A Expired - Lifetime JPH0789546B2 (en) 1985-05-15 1985-05-15 Wafer processing film

Country Status (1)

Country Link
JP (1) JPH0789546B2 (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02215528A (en) * 1989-02-17 1990-08-28 Sumitomo Bakelite Co Ltd Multi-layer film
WO1991002377A1 (en) * 1989-08-01 1991-02-21 Mitsui Toatsu Chemicals, Incorporated Film for wafer processing
JPH05186746A (en) * 1991-07-18 1993-07-27 Mitsui Toatsu Chem Inc Method for polishing surface of transparent substrate layer of color filter substrate, and self-adhesive tape used therein
JP2000212530A (en) * 1998-11-20 2000-08-02 Lintec Corp Adhesive sheet and its use
JP2009135509A (en) * 2002-08-28 2009-06-18 Lintec Corp Protective structure of semiconductor wafer, method for protecting semiconductor wafer, multilayer protective sheet used therein, and method for processing semiconductor wafer
JP2009206435A (en) * 2008-02-29 2009-09-10 Nitto Denko Corp Adhesive sheet for grinding back surface of semiconductor wafer and method for grinding back surface of semiconductor wafer using the same
US7976952B2 (en) 2005-02-23 2011-07-12 Nitto Denko Corporation Multilayer sheet, production method thereof and pressure-sensitive adhesive sheet using the multilayer sheet
JP2014192204A (en) * 2013-03-26 2014-10-06 Furukawa Electric Co Ltd:The Adhesive tape for protecting semiconductor wafer surface, and processing method of semiconductor wafer
JP2019001015A (en) * 2017-06-13 2019-01-10 三菱瓦斯化学株式会社 Polyurethane multilayer film
TWI808517B (en) * 2021-10-28 2023-07-11 山太士股份有限公司 Protection tape that suppresses deformation and grinding method
TWI822034B (en) * 2022-05-09 2023-11-11 山太士股份有限公司 Protection tape and manufacturing method of semiconductor device
TWI825705B (en) * 2022-05-09 2023-12-11 山太士股份有限公司 Protection tape and manufacturing method of semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737836A (en) * 1980-08-20 1982-03-02 Nec Corp Manufacture of semiconductor device
JPS57111834U (en) * 1980-12-27 1982-07-10
JPS57111835U (en) * 1980-12-27 1982-07-10

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737836A (en) * 1980-08-20 1982-03-02 Nec Corp Manufacture of semiconductor device
JPS57111834U (en) * 1980-12-27 1982-07-10
JPS57111835U (en) * 1980-12-27 1982-07-10

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02215528A (en) * 1989-02-17 1990-08-28 Sumitomo Bakelite Co Ltd Multi-layer film
WO1991002377A1 (en) * 1989-08-01 1991-02-21 Mitsui Toatsu Chemicals, Incorporated Film for wafer processing
US5183699A (en) * 1989-08-01 1993-02-02 Mitsui Toatsu Chemicals, Inc. Wafer processing films
JPH05186746A (en) * 1991-07-18 1993-07-27 Mitsui Toatsu Chem Inc Method for polishing surface of transparent substrate layer of color filter substrate, and self-adhesive tape used therein
JP2000212530A (en) * 1998-11-20 2000-08-02 Lintec Corp Adhesive sheet and its use
JP2009135509A (en) * 2002-08-28 2009-06-18 Lintec Corp Protective structure of semiconductor wafer, method for protecting semiconductor wafer, multilayer protective sheet used therein, and method for processing semiconductor wafer
US7976952B2 (en) 2005-02-23 2011-07-12 Nitto Denko Corporation Multilayer sheet, production method thereof and pressure-sensitive adhesive sheet using the multilayer sheet
JP2009206435A (en) * 2008-02-29 2009-09-10 Nitto Denko Corp Adhesive sheet for grinding back surface of semiconductor wafer and method for grinding back surface of semiconductor wafer using the same
KR101294435B1 (en) * 2008-02-29 2013-08-07 닛토덴코 가부시키가이샤 Adhesive sheet for grinding back surface of semiconductor wafer and method for grinding back surface of semiconductor wafer using the same
JP2014192204A (en) * 2013-03-26 2014-10-06 Furukawa Electric Co Ltd:The Adhesive tape for protecting semiconductor wafer surface, and processing method of semiconductor wafer
JP2019001015A (en) * 2017-06-13 2019-01-10 三菱瓦斯化学株式会社 Polyurethane multilayer film
TWI808517B (en) * 2021-10-28 2023-07-11 山太士股份有限公司 Protection tape that suppresses deformation and grinding method
TWI822034B (en) * 2022-05-09 2023-11-11 山太士股份有限公司 Protection tape and manufacturing method of semiconductor device
TWI825705B (en) * 2022-05-09 2023-12-11 山太士股份有限公司 Protection tape and manufacturing method of semiconductor device

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