JPS61251361A - Synchronous circuit for optical scanner - Google Patents

Abstract

PURPOSE:To simplify a circuit structure without using a high frequency clock oscillator by correcting phase dislocation between a picture element clock and the detection signal of an optical sensor in a optical scanner using an optical deflecter by using a simple means. CONSTITUTION:When a frequency divider 13, which divides a reference clock output from a reference oscillator 12 into n-parts, is initialized by the detection signal of the optical sensor, the relation of phase difference between a recording position control clock CLK1 which is used as the reference input to a phase detector 15 and a synchronous detection signal S can be within one clock of the reference clock. Therefore, the picture element clock CLK2 is generated by PLL circuits 14-17, so that the phase difference between the recording position control clock CLK1 and the picture element clock CLK2 is kept constant.

Description

DETAILED DESCRIPTION OF THE INVENTION 11.1 The present invention relates to an optical scanning device using an optical deflector, and more particularly to a synchronization circuit for an optical scanning device that synchronizes optical scanning.

1 Generally, as an optical scanning device used in a laser printer or the like, an optical scanning device 1 is used, for example, as shown in FIG. The ring lens 2 converts the parallel light into parallel light, which is then deflected in the main scanning X direction by a rotating polygon mirror 3 serving as an optical deflector, while the condensing lens 4 turns the light into a condensed light beam in a circle in the sub scanning Y direction, and It is configured to expose a photosensitive drum 5 whose surface is uniformly charged. Note that an electrostatic latent image is formed on the surface of the photoreceptor drum 5 by exposure, and after being visualized by toner development, it is transferred onto recording paper fed in the sub-scanning Y direction, and is fixed. A recorded image is obtained by processing.

Further, FIG. 4 shows another example of the configuration of the optical scanning device. In this case, a hologram disk 6 is used as the optical deflector. In the figure, 7.8 is a reflecting mirror. Note that the focusing lens 4 is connected to the coupling lens 2 and the optical deflector (3).
, 6).

In such an optical scanning device, as shown in the same figure.

An optical sensor 9 for line synchronization of image writing is provided outside the image recording area on the same line in the main scanning X direction, and the laser beam detection signal from the optical sensor 9 is synchronized with the pixel clock for image scanning. A control method is adopted in which image writing is started at the same time.

However, when adopting such a control method, it is unavoidable that a phase shift occurs between the detection signal of the optical sensor 9 and the pixel clock due to the finishing accuracy of the rotating polygon mirror 3 (the sensor clock is within one pixel clock). (This will cause the output to shift)
This phase shift causes a problem in that the writing timing for each main scanning line is out of order, causing jitter in the main scanning direction in the recorded image, resulting in a reduction in image quality.

In order to prevent jitter from occurring in the recorded image, it is necessary to compensate for the phase shift occurring between the detection signal of the optical sensor 9 and the pixel clock with an accuracy of 1/n dot.

Therefore, in order to suppress jitter in the main scanning direction that occurs in a recorded image, conventionally, as shown in FIG. ) by using a frequency dividing circuit 11 that divides the frequency of the pixel clock, and by timing the start of frequency division according to the detection signal of the optical sensor 9, it is possible to eliminate the phase shift that occurs between the detection signal of the optical sensor 9 and the pixel clock. I am trying to reduce it to l/n.

However, with such conventional means, it is difficult to eliminate jitter that occurs when the pixel clock frequency fO is 10 MHz, for example.
In order to reduce the frequency to /10, a dedicated clock oscillator with a very high frequency of 100 MHz would be required, making the actual circuit configuration complicated.

1. The present invention has been made in consideration of the above points, and is an optical scanning method that uses an optical deflector and synchronizes the line of image writing based on the detection signal of the optical sensor for line synchronization detection. In the device, the phase shift between the pixel clock and the detection signal of the optical sensor can be reduced by L /
The present invention provides a synchronization circuit for an optical scanning device that can easily perform correction with an accuracy of n.

In order to achieve the object of the present invention, the present invention uses a voltage-controlled oscillator as a pixel clock oscillator, and uses as input a reference clock whose frequency is lower than the frequency of the pixel clock and a clock obtained by dividing the pixel clock. (Phase
The voltage controlled oscillator is controlled by the Locked L, oop) circuit configuration.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 1, the synchronization circuit of the optical scanning device according to the present invention includes a reference oscillator 12 for controlling the recording position that generates a reference clock of one frequency fO, and the optical sensor 9 for detecting line synchronization. Initialized according to the detection signal S,
The recording position control clock CLK is obtained by dividing the semi-lock by n.
A frequency divider 13 that generates 1 and a pixel clock C of 1 frequency fk
A voltage controlled oscillator 14 that generates the pixel clock CLK2, a frequency divider 15 that divides the pixel clock CLK2 by m, the m-divided clock CLK3, and the recording position control clock C.
It is comprised of a phase detection circuit 16 that determines the phase difference with LK 1, and a low-pass filter 17 that generates a voltage signal according to the determined phase difference and applies it to the voltage controlled oscillator 14.

Here, a voltage controlled oscillator 142, a frequency divider 15° phase detection circuit 16. A PLL circuit is configured by the low-pass filter 17, and a pixel clock CLK2 corresponding to the recording position control clock CLK1 can be obtained.

Also, the frequency fk of the pixel clock CLK2 and the reference oscillator 1
The frequency F o (f
off k) is given by the following equation.

f k = m X f o X 1 / n ・
(1) In the device configured in this way, the frequency divider 13 that divides the reference clock output from the reference oscillator 12 by n is initialized by the synchronization detection signal from the optical sensor 9. As a result, the phase difference relationship between the recording position control clock CLK1, which is used as a reference input of the phase detection circuit 15, and the synchronization detection signal S can be made within one clock of the reference clock.

Therefore, since the 1-pixel clock CLK2 is generated by the PLL circuit, it is controlled so that the phase difference between the recording position control clock CLK1 and the pixel clock CLK2 is always constant. That is, the phase difference between the pixel clock CLK2 and the synchronization detection signal S from the optical sensor 9 is determined by the reference oscillator 1.
It is controlled within one reference clock output from 2.

FIG. 2 shows the timing of each part signal.

When the recording position control clock CLK 1 is initialized by the synchronization detection signal S of the optical sensor 9, the recording position control clock CLK 1 rises after a time Tc after the synchronization detection signal S is input to the frequency divider 13. Become. The PLL-controlled pixel clock CL K2 is the recording position control clock C
To follow LK 1.

After a certain period of time Tc from the input of the synchronization detection signal S, the phase coincides with that of the recording position control clock CLK1.

In the synchronous circuit of the optical scanning device according to the present invention,
In an optical scanning device that uses an optical deflector and synchronizes the line of image writing based on the detection signal of the optical sensor for line synchronization detection, without using any high-frequency clock oscillator as in the past, This method has the excellent advantage that pixel clocks can be precisely and stably synchronized according to the detection signal of the optical sensor using simple means.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing an embodiment of the synchronization circuit of an optical scanning device according to the present invention, FIG. 2 is a time chart showing the timing of each part signal in the same embodiment, and FIGS. 3 and 4 are optical scanning M each showing a general configuration example of the device
FIG. 18 and FIG. 5 are block configuration diagrams showing a synchronous circuit of a conventional optical scanning device.

Claims (1)

[Claims] 1. In an optical scanning device that uses an optical deflector and synchronizes line of image writing based on a detection signal of an optical sensor for synchronization detection, voltage control is used as a pixel clock oscillator. An optical scanning device in which a voltage-controlled oscillator is controlled by a PLL circuit configuration in which a reference clock whose frequency is lower than that of a pixel clock and a clock obtained by dividing the pixel clock are input. synchronous circuit. 2. The optical scanning device according to item 1 above, wherein the reference clock is obtained by dividing a clock having a higher frequency than the pixel clock oscillated from the reference oscillator using a frequency divider. synchronous circuit. 3. The synchronization circuit for an optical scanning device according to item 2, wherein the frequency divider is initialized by a synchronization detection signal output from an optical sensor for detecting line synchronization.