JPS61189011A - Afc circuit of receiver - Google Patents

Abstract

PURPOSE:To obtain a stable IF frequency of a high accuracy by controlling a local oscillation frequency by a voltage being proportional to a difference of a voltage being proportional to an AFC control voltage of the time of an input of an intermediate frequency signal, and a reference level set voltage being proportional to the AFC control voltage of the time of an input of a reference IF frequency. CONSTITUTION:An output intermediate frequency signal of a frequency converting circuit 2, and a reference IF frequency from a reference frequency generating circuit 6 which is constituted by using a circuit whose frequency stability is extremely high, such as a crystal oscillating circuit, etc. are switched alternately by a switching circuit 4 and supplied to an AFC control voltage generating circuit 13. A fetched AFC control voltage is interlocked with the switching circuit 4 by a switching circuit 10, supplied alternately to holding circuits 11, 12, brought to peak holding, and converted to a smoothing control voltage being proportional to its level. A differential amplifier 14 generates the second AFC control voltage VAFC2 being proportional to a difference of the first AFC control voltage VAFC1 and a reference level set voltage VREF, supplies it to a VCO 3, and brings its output local oscillation frequency to a variable control.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an AFC circuit for a receiver, and in particular to an AFC circuit for a receiver.
When converting an input high frequency signal into an intermediate frequency signal and outputting it using more than one local oscillator and a frequency conversion circuit,
The present invention relates to an AFC circuit that performs automatic frequency control (AFC) on the output local oscillation frequency of a local oscillator so that a predetermined intermediate frequency can be obtained with high precision from a frequency conversion circuit.

2. Description of the Related Art The AFC circuit of a conventional receiver has an output AFCiIIllt of an AFC control IN pressure generation circuit to which an intermediate frequency signal is supplied.
ll voltage is supplied to a voltage-controlled local oscillator, and its output local oscillation frequency is variably controlled so that the intermediate frequency signal from the frequency conversion circuit is extracted at a predetermined intermediate frequency (hereinafter referred to as IF frequency). The stability of the frequency of the intermediate frequency signal was determined by the frequency accuracy and temperature characteristics of the AFC control voltage characteristics of the FG control voltage generation circuit. However, since the resonant circuit built into the AFC control voltage generation circuit is composed of inductance, capacitance, or circuit elements equivalent to these, its temperature characteristics are poor, and the reference IF frequency can be stably controlled over a wide temperature range. Even if the temperature fluctuation is extremely small, it is necessary to adjust the resonant frequency of the resonant circuit described above to match the reference IF frequency with high precision. Adjustment is almost impossible, 1000pl for the reference IF frequency)II (DO 儂=10″″
6) It was normal for a large error to occur.

Therefore, the present applicant previously proposed an AFC circuit for a receiver that eliminates the above drawbacks in Japanese Patent Application No. 59-235494. FIG. 4 shows a block diagram of an example of the AFC circuit of the receiver proposed by the present applicant. In the same figure, input terminal 1
The high-frequency signal received by the receiver enters, and is supplied from this to the frequency conversion circuit 2, where the difference between the output local oscillation frequency of the voltage controlled oscillator (VCO) 3, which constitutes the local oscillator, is calculated. Alternatively, it is converted to a sum frequency and becomes an intermediate frequency signal of a predetermined IF frequency. This intermediate frequency signal is applied to the terminal 4a of the switch circuit 4, while being outputted to the output terminal 5. The switch circuit 4 is supplied with the reference [F frequency] from the reference frequency generation circuit 6 to the terminal 4b.
The switching pulse from the switching pulse generation circuit 7 causes the terminal 4 to
The input intermediate frequency signal of the terminal a and the input reference IF frequency of the terminal 4b are selectively output at an intersection n and supplied to the AFC control voltage generation circuit 8.

The AFC control I voltage generation circuit 8 has a zero point control t[l voltage input terminal 9, and also has a high level AFC control m static control + for an input signal frequency lower than the inflection point frequency fL.
It outputs a raw voltage, generates and outputs a D-level AFC control voltage for input signal frequencies higher than the inflection point frequency [H], and further outputs the reference IF between the above inflection point frequency [L and h +
The frequency is selected based on the characteristics where it is located. This AFC
The output AFCIII voltage of the control voltage generation circuit 8 is applied to the common terminal 100 of the switch circuit 10. The switch circuit 10 operates in conjunction with the switch circuit 4 to output terminals 10a and 10b by the switching pulse from the switching pulse generating circuit 7.
are switched and connected alternately. That is, the switch circuit 10
During the period in which the switch circuit 4 selects and outputs the input intermediate frequency signal of the terminal 4a, the hold circuit 11 is connected via the terminal 10a.
The period during which the switch circuit 4 selectively outputs the AFC control voltage to the terminal 4b and selects and outputs the F frequency (input reference of the terminal 4b) is at terminal 1.
AFC! to the hold circuit 12 via 0b! 111O voltage is selectively output.

Hold circuits 11 and 12 are smoothing control voltage generation circuits,
This is provided to solve the problem that the AFC control voltage is intermittently obtained by the switch circuit 10. The output signal of the hold circuit 11 is applied to the VCO 3 as a control voltage, and the output signal of the hold circuit 12 is applied to the zero point control voltage input terminal 9 of the AFC control voltage generation circuit 8.

Here, during the period when the switch circuits 4 and 10 are connected to 4a and 10a, respectively, the frequency conversion circuit 2→switch circuit 4→
AF consisting of AFC control voltage generation circuit 8 → switch circuit 10 → hold circuit 11 → VCO 3 → frequency conversion circuit 2
C control loop is formed and the terminal 10 of the switch circuit 1o
An operation is performed to match the IF frequency with the zero point frequency of the AFC control voltage generation circuit 8 using the AFC control voltage selectively outputted from a. On the other hand, the switch circuits 4 and 10 are
b.

10b, AFCIIJIII voltage generation circuit 8 → switch circuit 10 → hold circuit 12 → AF
A zero point correction loop consisting of the C control voltage generation circuit 8 is formed and performs an operation to match the zero point frequency of the AFC control voltage generation circuit 8 with the reference IF frequency from the reference frequency generation circuit 6.

As described above, since the switch circuits 4 and 10 are alternately switched by the switching pulses from the switching pulse generation circuit 7, this AFC circuit performs the AFC control operation while correcting the zero point of the AFC control voltage generation circuit 8. Therefore, when the loop gains of the two control loops, the AFC control loop and the zero point correction loop described above, are each sufficiently large, the IF frequency flF coincides in principle with the output reference IF frequency flFo of the reference frequency generation circuit 6, and flFfl is stable. An extremely high degree of stability is obtained.

Problems to be Solved by the Invention However, in general, the loop gains of the above two control loops are both finite, so the output IF of the frequency conversion circuit 2
The accuracy ΔflF of frequency r+F is.

As shown in the following equation, the pull-in accuracy ΔfA of the AFC control loop
Correction accuracy (error) of F CON and zero point correction loop △rz
It is expressed as the sum with ON.

△rt F ”ΔfA F CON+Δfz ON
(1) The pull-in accuracy ΔfA F CON of the above AFC control loop is the reference IF frequency r+F when the AFC control loop is in the oven (that is, in a non-controlled state)
Regarding the frequency deviation ΔfA F COF
FF is expressed as follows.

△fAFcoN=ΔfAFco+=p/GA FC(
2 △rz ON = ΔfzoFF/Gz (3)
However, in equations (2) and 0, GA t-c is the loop gain of the AFC control loop, and Gz is the loop gain of the zero point correction loop.

The above frequency deviation ΔfA F COF F is generally A
It is the sum of the frequency setting error of VCO 3 during FC control loop oven and the frequency error entering input terminal 1. On the other hand, the above frequency deviation ΔfZ OF is generally the sum of the zero point frequency during zero point correction loop oven. This is a fluctuation due to temperature, etc.

Now, as an example, ΔfAFcoFp=30M)-(2
, ΔfzopE=500kH2, GAFC=2X10'
, Gz=200, IF frequency) accuracy Δ f
■t− is △fl F = ΔfAF CON+ΔfZ ON=(△
[AFcoFF/GAFc) + (Δ fzoFF/Gz) -4,0 (kHz), and the correction accuracy (error) of the zero point correction loop is 8 fz O
N is quite large at 2.5kHz, and 8flF.
This was a factor that made it larger.

Therefore, the present invention provides a receiver A that solves the above problems by generating a control voltage proportional to the difference between the reference level setting voltage and the AFC control voltage and applying it to the local oscillator.
The purpose is to provide an FC circuit.

Means for Solving the Problems The AFC circuit of the receiver according to the present invention includes two local oscillators, a frequency conversion circuit, a frequency generation circuit, first and second switch means, and an AFC control voltage generation circuit.

It consists of first and second voltage generation circuits and a differential amplifier. The intermediate frequency signal obtained by frequency conversion between the input signal and the output local oscillation frequency of the local oscillator by the frequency conversion circuit of the first switch means and the reference intermediate frequency from the frequency generation circuit are respectively and alternately selects and outputs these signals. The AFC control voltage generation circuit generates an AFC control voltage having a level corresponding to the deviation of the output signal frequency of the first switch means from the zero point frequency, and supplies the generated AFC control voltage to the second switch means. The second switch means selects and outputs the intermediate frequency signal from the first switch means.
During the period when the first switch means is selectively outputting the reference intermediate frequency, the input AFCII is selectively output to the voltage generating circuit of
The JIII voltage is switched and output to the second voltage generation circuit.

The differential amplifier generates a voltage proportional to the difference between the smoothed control voltages extracted from the first and second voltage generating circuits, supplies it to the local oscillator, and variably controls its output local oscillation frequency.

Smooth control 'R pressure taken out from the second voltage generation circuit, A F Ci'll 'R pressure generation mill'1B
7) It is proportional to the AFC control voltage corresponding to the reference intermediate frequency generated according to the A F CI'll ill characteristic, and is supplied to the differential amplifier as a reference level setting voltage. The differential amplifier variably controls the output local oscillation frequency of the local oscillator using the voltage obtained by differentially amplifying this reference level setting voltage and the AFC control voltage taken out from the first voltage generation circuit. As a result, the AFC circuit operates so that the AFCIIJtll voltage supplied to one input terminal of the differential amplifier becomes equal to the one reference level setting voltage, and the local oscillator converts the output intermediate frequency signal of the frequency conversion circuit to the above reference intermediate frequency. A local oscillation frequency is extracted that matches the .

Each embodiment of the present invention will be described below with reference to FIGS. 1 to 3.

Embodiment FIG. 1 shows a block system diagram of an M1 embodiment of the circuit of the present invention. In the figure, the same components as those in FIG. 4 are denoted by the same reference numerals, and the explanation thereof will be omitted as appropriate. In FIG. 1, the output intermediate frequency signal of the frequency conversion circuit 2 and the reference IF frequency rxFO from the reference frequency generation circuit 6 configured using a circuit with extremely high frequency stability such as a crystal oscillation circuit are as follows.
The voltage is alternately switched by the switch circuit 4 and supplied to the AFC control voltage generation circuit 13. This AFC system till!
The pressure generating circuit 13 does not have a zero point control voltage input terminal, so its zero point frequency rz is fixed. The AFC control voltage generation circuit 13 has an AFC control characteristic as shown by the solid line a in FIG. outputs a high level AFC control voltage for input signal frequencies lower than the inflection point frequency rL of 1;
For input signal frequencies higher than the second inflection point frequency f+-+, a low level AFC control voltage is output, and further for input signal frequencies between the inflection point frequency fL and b+, i
Then, as the frequency increases, the AFC control voltage is generated and outputted at a level that gradually decreases from the high level to the low level. The zero point frequency fZ is defined as the frequency that generates the voltage Va at the midpoint of the AFC control voltage at each of the inflection point frequencies "L" and "H".

The AFCIIIt[I voltage extracted from the AFC control voltage generation circuit 13 having such AFC control characteristics is alternately applied to the first . via the second terminals 10a, 10b. It is supplied to the second hold circuit 11.12, where it is subjected to peak hold, etc., and is smoothed in proportion to the level.
converted into pressure. Here, the hold circuit 11 holds the AFC control voltage during the period when the switch circuit 4 is selectively outputting the input intermediate frequency signal of the terminal 4a, and transfers that voltage to the first
AFCIIilJWJIf pressure VA t:c I is applied to the non-inverting input terminal of the differential amplifier 14. On the other hand,
The hold circuit 12 operates during the period when the switch circuit 4 selects and outputs the input reference IF frequency flFO of the terminal 4b.
The FC control voltage is held and applied to the inverting input terminal of the differential amplifier 14 as the reference level setting voltage VREF. This reference level setting voltage vREF is controlled by the AFC system t[! The AFC control characteristic diameter is the AF generated by the pressure generating circuit 13 when the reference IF frequency flFo is input.
When the zero point frequency fz, which corresponds to the C control voltage and provides the control midpoint voltage Vo, changes, it changes accordingly.

The differential amplifier 14 receives the first AFCIIIm voltage VA.
A second AFC control voltage VAFC2 proportional to the difference between FCI and the reference level setting voltage VREt- is generated and supplied to the VCO3 to variably control its output local oscillation frequency. As a result, the frequency conversion circuit 2
→ Switch circuit 4 → AFC control voltage generation circuit 13 → Switch circuit 10 → Hold circuit 11 → Differential amplifier 14 → V
One round AFC consisting of CO3 → frequency conversion circuit 2! 1J
When the ill loop has a sufficiently large loop gain GAFC, the first AFCIIJI [l voltage VApc+ taken out from the hold circuit 11 is
It operates so that it becomes equal to the reference level setting voltage VREp of 2, and becomes stable when it becomes equal.

Here, the AFC controlled characteristic, where the vertical axis is the control voltage applied to the VCO 3 and the horizontal axis is the IF frequency taken out from the frequency conversion circuit 2 at that time, is shown by a solid line in FIG. Therefore, the first AFC control voltage VA FC
2 AFC for the output of the differential amplifier 14 when l is stable and equal to the reference level setting voltage VRE t-
As can be seen from FIG. 2, the MJmm pressure VA r:C2 is a voltage that provides the reference intermediate frequency fIFo of the AFC controlled characteristic. As a result, the AFC control loop described above operates so that the output IF frequency flF of the frequency conversion circuit 2 matches the reference intermediate frequency flFO.

As described above, according to this embodiment, the accuracy of the IF frequency foF depends only on the pull-in accuracy (that is, the loop gain) of the AFC control loop, and the accuracy of flF does not deteriorate due to fluctuations in the zero point.

Note that the inflection point frequency fL of the AFCIIJIII characteristic a is a condition for guaranteeing the operation of the circuit of the present invention.

“There is always 1L< between H and reference IF frequency rtFO
It is necessary to satisfy the relationship frpo<fH. Therefore, when the change in AFC zero point frequency fZ with respect to temperature change is large (that is, when the change in t, , rH is large), the AFC
! The slope of the IIIl characteristic a is made gentler, the inflection point frequency rt- is made sufficiently lower than the reference IF frequency rxFO, and the inflection point frequency fH is made lower than the reference IF frequency flF.
It is necessary to make it sufficiently high with respect to o. AFC control characteristics a
For example, AFC! can be used to make the slope gentler. l
A method such as reducing the Q of the resonant circuit (tuned circuit) in the 1tll voltage generation circuit 13 is conceivable and can be easily realized.

Next, a second embodiment of the circuit of the present invention will be explained with reference to a block system diagram shown in FIG. In the figure, the same components as in FIG. 1 are denoted by the same reference numerals, and their explanations will be omitted. In FIG. 3, the AFC1lltil voltage generating circuit 8 is an AFC1lltil voltage generating circuit 8 as shown in FIG. The point that has IJIII characteristic a is A
It is the same as the FC control voltage generation circuit 13, but by applying the reference level setting voltage VREF from the hold circuit 12 to the zero point control voltage input terminal 9, the zero point frequency fZ is corrected to be equal to flFo. The difference is that Such zero point frequency rz correction means is AFC
A method such as using a variable capacitance element as a part of the LC tuning circuit that provides the zero point frequency fZ in the control voltage generation circuit 8, and variably controlling the capacitance value of the variable capacitance element by the input voltage of the zero point control O voltage input terminal 9. This can be easily realized.

According to this embodiment, the change in the inflection point frequencies fL and fH can be made smaller by the zero point correction loop consisting of the AFC control voltage generation circuit 8 → switch circuit 10 → hold circuit 12 → AFC control voltage generation circuit 8. Therefore, unlike the first embodiment, there is no need to intentionally make the slope of the AFC control characteristic a gentler. In addition, since the purpose of the zero point correction loop in this embodiment is to keep the fluctuations of the inflection point frequencies fL and fH below a predetermined value, the AFC circuit proposed earlier by the applicant shown in FIG. Of course, a high loop gain such as the zero point correction loop is not necessary. Furthermore, the basic operation in this embodiment is the same as in the first embodiment, and the rap accuracy depends only on the pull-in accuracy of the AFC control loop, and the existence of the zero point correction loop does not cause any deterioration in the flF accuracy. Of course not.

Note that the present invention can be suitably applied to any signal form of the high frequency signal that enters the input terminal 1. For example, unmodulated carrier waves and modulated carrier waves are transmitted alternately, such as in 4-phase PSK (phase shift keying), which is characterized in that carrier waves are regenerated and demodulated on the receiving side. It can also be applied when In this case, the output switching pulse of the switching pulse generation circuit 7 is generated in synchronization with the cycle of the presence/absence of the non-modulated carrier wave, and the switch circuits 4 and 10 are connected to the terminals 4a and 10a during the incoming period of the non-modulated carrier wave. During the incoming period of the modulated carrier wave, the terminals 4b and 10b are switched and connected.

As a result, the carrier frequency of the input signal completely matches the reference frequency. Therefore, the present invention is more effective when applied to stabilizing the IF frequency of a phase-shift keyed high-frequency signal.

Further, in most cases, the VCO 3 has a function of selecting a large number of input high frequency signals using a tuning voltage having a wide frequency variable range. In this case, AFC$
(The VCO 3 may be controlled by using a voltage obtained by adding the channel selection voltage to the J Ill voltage as the control voltage, and the present invention can of course operate well in such a configuration.

Further, the hold circuits 11 and 12 may be of any type as long as they output a continuous constant voltage proportional to the magnitude of the voltage taken out from the switch circuit 10; It may also be configured to output the data.

Furthermore, in order to perform feedback control such as AFC operation and zero point correction operation well, appropriate low-pass filters are connected to the output terminals of the hold circuits 11 and 12 for system stability, and necessary loop It is sufficient to adopt a configuration that guarantees the gain.

Furthermore, the circuit of the invention can also be applied to double super-hetero gain receivers. In this case, the second
It is usual to perform AFClliIJtll on the local oscillation frequency.

Furthermore, the polarity of the input to the differential amplifier 14 is not limited to that of the embodiment, and the polarity of the input to the AFC control XIW pressure generation circuit 8.13. Hold circuit 11. Of course, the polarity should be selected so that the AFC control operation converges, depending on the polarity of the input and output of the differential amplifier 14 and the like.

Effects of the Invention As described above, according to the present invention, A when inputting an intermediate frequency signal
Voltage proportional to FC control voltage and reference IF frequency fT
AFCIII when inputting P O! Since the local oscillation frequency is controlled by a voltage proportional to the difference from the reference level setting voltage, which is proportional to the voltage, only the pull-in accuracy of the AFC control loop can be controlled! It is possible to make the accuracy of the slave station wave number flF dependent, and therefore, compared to the AFC circuit previously proposed by the applicant, it is possible to obtain a more accurate and stable IF frequency, and the zero point frequency due to temperature, humidity, etc. It has many features such as being able to completely eliminate changes in the IF frequency due to changes, long-term changes over time, initial adjustment deviations, etc., and also being able to omit the zero point correction loop.

[Brief explanation of the drawing]

1 and 3 are block diagrams showing the first and second embodiments of the circuit of the present invention, respectively; FIG. 2 is a diagram showing AFC control characteristics and AFC controlled characteristics for explaining the operation of the circuit of the present invention;
FIG. 4 is a block diagram showing an example of an AFC circuit previously proposed by the applicant. 1... High frequency signal input terminal, 2... Frequency conversion circuit, 3... Voltage controlled oscillator (VCO), 4.10...
Switch circuit, 5... intermediate frequency signal output terminal, 6...
・Reference frequency generation circuit, 7... switching pulse generation circuit,
8゜13...AFC control voltage generation circuit, 9...Zero point control voltage input terminal, 11.12...Hold circuit, 1
4...Differential amplifier. Patent applicant: Victor Japan Co., Ltd.

Claims (3)

[Claims] (1) A local oscillator whose output local oscillation frequency can be variably controlled by an external input control signal, and converts the input signal and the local oscillation frequency from the local oscillator to output an intermediate frequency signal of a predetermined intermediate frequency. A frequency conversion circuit, a frequency generation circuit that generates and outputs a reference intermediate frequency, and a first switch means that alternately selects and outputs an intermediate frequency signal from the frequency conversion circuit and a reference intermediate frequency from the frequency generation circuit. and A, which is supplied with the output signal of the first switch means and generates and outputs an AFC control voltage of a level corresponding to the deviation of the signal frequency from the zero point frequency.
outputting an FC control voltage generation circuit and the AFC control voltage supplied from the AFC control voltage generation circuit to its first output terminal during a period in which the first switch means selectively outputs the intermediate frequency signal; During the period in which the first switch means selectively outputs the reference intermediate frequency, the second switch means switches and outputs the reference intermediate frequency to its second output terminal, and the first and second output terminals of the second switch means select and output the reference intermediate frequency. AFC control voltages taken out from the AFC control voltages are separately supplied to first and second voltage generation circuits which output smoothed control voltages proportional to the magnitudes of the AFC control voltages taken out from the first and second voltage generation circuits, respectively. An AFC circuit for a receiver, comprising a differential amplifier that is supplied with smoothed control voltages, generates a voltage proportional to the difference between them, and outputs it to the local oscillator as the external input control signal. (2) The AFC control voltage generation circuit is characterized in that the zero point frequency between the first and second inflection point frequencies is fixed to a frequency that is equal to or very close to the reference intermediate frequency. An AFC circuit for a receiver according to claim 1. (3) The AFC control voltage generation circuit makes the zero point frequency between the first and second inflection point frequencies equal to or equal to the reference intermediate frequency by the smoothed control voltage from the second voltage generation circuit. The AFC circuit of a receiver according to claim 1, wherein the AFC circuit of a receiver is variably controlled to have a frequency extremely close to that frequency.