JPS61157178A - Image pickup device - Google Patents

Abstract

PURPOSE:To obtain easily a high density and to minimize phenomenon such as blooming and smear by forming a thin film transistor on an (n) type silicon base material, making the a (p) area of the base into a capacitor as a floating area and constituting one picture element with one transistor. CONSTITUTION:A capacitor Cox is composed of an electrode 9, an insulation film 3 and a MOS construction of a (p) area, a bipolar transistor is composed of respective parts of an (n)<+> area 7 as an emitter, a (p) area 6 as a base, an (n)<-> area 5 as a corrector and an area 1, and the (p) area 6 is made into a floating area. A condensed accumulation Vp, which occurs at the (p) area 6, is never attenuated, and by the effect of a bias voltage Vbs, a reading action is executed at a very high speed, and therefore, the output voltage is large, a fixed pattern noise and a random noise due to an output capacity goes to be smaller relatively, and the signal of a very good S/N ratio can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a dou imaging device using a photoelectric conversion element having a photocharge storage region whose potential is controlled via a capacitor.

The document imaging device according to the present invention includes, for example, an image input device, a workstation, a digital copying machine, a word processor, a barcode reader, a camera, a video camera, an 8
It can also be applied to photoelectric conversion object detection devices for autofocus such as millimeter cameras.

(Prior Art) In recent years, research on photoelectric conversion devices, particularly solid-state imaging devices, has been conducted mainly on two types: CCD type and MOS type.

The CCD fi imaging device forms a potential well under an MO8 type capacitor electrode, stores charges generated by incident light in this well, and during readout, the potential wells are sequentially charged by a pulse applied to the electrode. The accumulated charge is transferred to the output amplifier and read out.
This principle is used.

Therefore, the structure is relatively simple, the noise generated by the CCD itself is small, and low-light photography is possible.

On the other hand, the MO8 type imaging device accumulates charges generated by the incidence of light in each of the photodiodes made of pn junctions that constitute the light receiving section, and during readout, the MOS switching transistors connected to each photodiode are sequentially activated. It uses the principle that when turned on, the accumulated charge is read out to the output amplifier. Therefore, C.C.
Although it is structurally more complex than the D type, it can have a large storage capacity and widen the dynamic range.

However, these conventional virtual image devices have the following drawbacks, which have been a major hindrance to the progress of higher resolution in the future.

In a CCD type imaging device, 1) Since a MOS type amplifier is installed on-chip as an output amplifier, the interface between silicon and silicon oxide film is difficult to image. 1 above 1. Eye-catching 1
/f noise occurs. 2) If the number of cells is increased and the temperature is increased in order to achieve higher resolution, the maximum amount of charge that can be stored in one potential well decreases, making it impossible to achieve a dynamic range. 3) Since the structure is such that the accumulated charge is transferred, if there is even one defect in the cell, the charge transfer will stop there and the manufacturing yield will deteriorate.In the MOS type imaging device, 1) Signal readout Sometimes, a large signal voltage drop occurs because a wiring capacitor is connected to each photodiode. 2) Large wiring capacity;
This generates a lot of random noise. 3) M for scanning
Fixed pattern noise is mixed in due to variations in the parasitic capacitance of the OS switching transistors. This makes low-light imaging difficult, and when each cell is reduced in size to achieve higher resolution, the accumulated charge is reduced, but the wiring capacitance is not reduced so much that the S/N ratio is reduced.

In addition, a common drawback of CCD type and MOS type imaging devices is that electron-hole pairs are thermally generated in the depletion layer, resulting in output appearing even when there is no incident light. . Since this so-called dark current is read out together with the optical information signal during the read operation, variations in this dark current adversely affect the image.

As described above, CCD type and MOS type imaging devices have essential problems in achieving high resolution. A new type of semiconductor imaging device has been proposed for these imaging devices (Japanese Patent Laid-Open No. 150878/1983, Japanese Patent Laid-Open No. 56-150878).
157073, JP-A-56-165473). The method proposed here transfers the charge generated by incident light to a control electrode (e.g., bipolar transistor PACE, static induction transistor SIT or MOS).
), and the accumulated charge is read out by fully amplifying the charge using the amplification function of each cell. This method allows high output, wide dynamic range, low noise, and nondestructive readout, and has the potential for high resolution.

However, this method is basically an X-Y addressing method, and each cell has a basic structure that combines a conventional MOS cell with amplification elements such as bipolar transistors and 5IT) transistors, so it has high There are limits to resolution.

Further, dark signal irregularities may be superimposed in a predetermined regular pattern in the read signal, which has an adverse effect on image quality.

(Objective) The solid-state imaging device according to the present invention is intended to solve the above-mentioned conventional problems, and particularly aims to provide an imaging device that can eliminate dark signal unevenness of a plurality of photoelectric conversion elements.

(Example) Embodiments of the present invention will be described in detail below with reference to the drawings.

FIGS. 1 and 2 are diagrams illustrating the fundamentals, structure, and operation of a photosensor cell that constitutes a photoelectric conversion device according to an embodiment of the present invention.

Figure 1 (ml is a plan view of the optical sensor cell, Figure 1 (b)
is a cross-sectional view taken along line AA', and FIG. 2 is its circuit. Note that common parts in each part are given the same number.

Although FIG. 1 shows a plan view of the aligned layout method, it goes without saying that the pixel shifting method (interpolation layout method) can also be used to increase the horizontal resolution.

This optical sensor cell has the following structure.

As shown in FIGS. 1(a) and 1(b), on an n-type silicon substrate 1, a vacuum film 2; an insulating oxide film 3 made of a silicon oxide film; and electrical connections between adjacent optical sensor cells are formed. Element isolation region 4 composed of an insulating film or polysilicon film for insulation; low impurity concentration n formed by epitaxial technology etc.
- region 5; on top of that, a p region 6 which becomes the base of the bipolar transistor; an n region 7 which becomes the emitter of the bipolar transistor;
) Wiring 8 formed of a conductive material such as a capacitor electrode 9 that faces the p-region 6 with the insulating film 3 in between and applies a pulse to the floating p-region 6; connected to the capacitor electrode 9. A wiring 10 formed on the substrate 1; an n region 11 formed to make ohmic contact on the back surface of the substrate 1; and an electrode 12 for supplying the collector potential of the bipolar transistor are formed, respectively, and constitute the above-mentioned photosensor cell. .

In the equivalent circuit shown in Fig. 2, capacitor Cox13
is composed of an MO8 structure of an electrode 9, an insulating film 3, and a p region 6, and the bipolar transistor 14 has an n+ region 7 as an emitter, a p region 6 as a base, an n- region 5 and a region 1 as a collector. It consists of each part. As is clear from these drawings, p region 6 is made into a floating region.

In addition, there are several circuits of the bipolar transistor 14, a base-emitter junction capacitance Cbe 15 , a base-emitter pn junction diode Dbe 16 , a base-flexor junction capacitance Cbc 17 , pn junction diode Dbc18 and current source 19.2
Represented by 0.

Next, the basic operation of the optical sensor cell having such a configuration will be explained.

The basic operation of this photosensor cell consists of a charge accumulation operation by light incidence, a read operation, and a refresh operation. In charge storage operation, for example, the emitter is grounded through wiring 8, and the collector is biased to a positive potential through wiring 12. Further, it is assumed that the base is in a reverse bias state with respect to the emitter 7 in advance.

In this state, as shown in FIG. 1, when light 20 enters from the front side of the optical sensor cell, electron-hole pairs are generated within the semiconductor.

Of these, electrons flow toward the n-region 1 because the n-region 1 is biased to a positive potential, but holes are rapidly accumulated in the p-region 6. Due to the accumulation of holes in the p region, the potential of the p region 6 gradually changes toward a positive potential. At this time, the potential Vp generated by the accumulation of holes excited by light in the base is given by Vp*Q/C. Q is the amount of accumulated hole charge, and C is the junction capacitance that is the sum of (be15 and Cbc17).

What should be noted here is that as the resolution increases and the cell size decreases, the amount of light incident on each photosensor cell decreases, and the amount of accumulated charge Q decreases as well. As the cell size is reduced, the junction capacitance also decreases in proportion to the cell size, so the potential Vp generated by light incidence remains almost constant. This is because the optical sensor cell according to the present invention has an extremely simple structure, as shown in FIG. 1, and has the possibility of having an extremely large effective light-receiving surface.

The operation of reading out the voltage generated by the charges accumulated in p region 6 as described above to the outside will be described next.

In the read operation state, the emitter and wiring 8 are in a floating state,
The collector is held at a positive potential VCC.

Now, if the potential when the base 6 is biased to a negative potential before light irradiation is -vb, and the accumulated voltage generated by light irradiation is Vp, then the base potential becomes -vb + vp. There is. In this state, the wiring 10 is passed through the electrode 9.
When a positive voltage Vr for reading is applied to the oxide film capacitor Cox13, the base-emitter junction capacitance 11cbe15, and the base-collector junction capacitance Cbc.
The capacity is divided by 17, and the pace potential is as follows. Here, the pace potential is expressed by the following formula, Vbs,
By applying an extra forward bias, the pace potential is further biased in the forward direction than the accumulated voltage Vp generated by light irradiation. Therefore, electrons are injected from the emitter to the base, and since the collector potential is positive, they are accelerated by the drift electric field and reach the collector.

FIG. 3 (- is a graph showing the relationship between the read voltage and the accumulated voltage Vp when Vbs=0.6V.

According to the same graph, if a readout time of about 100 n5ec or more (time during which readout voltage Vr is applied to capacitor electrode 9) is taken, the storage voltage vp and readout voltage will be 4
This shows that linearity is ensured over a range of orders of magnitude, and high-speed reading is possible.

In the above calculation example, the capacitance of the wiring 8 is 49F, and the junction capacitance is 49F.

This is the case where the amount Cb e + Cb c is 0.014 pF, and the capacitance ratio is about 300 times different, but the accumulated voltage Vp generated in the p region 6 is not attenuated in any way, and the bias voltage Vbs This shows that the read operation was performed at extremely high speed due to the effect of . this is,
This is because the amplification function of the above-mentioned optical sensor cell worked effectively. In this way, since the output voltage is large, fixed pattern noise and random noise caused by the output capacitance are relatively small, and a signal with an extremely good S/N ratio can be obtained.

First, when the bias voltage Vbs was set to 0.6v, 4
It has been shown that linearity on the order of magnitude can be obtained with a high-speed readout time of about 100 n5 ec, and the relationship between this linearity, readout time, and bias voltage Vbs is shown in FIG. 3(b).

According to the graph shown in FIG. 3, it is possible to know the necessary readout time for the readout voltage to reach a desired percentage (%) of the accumulated voltage due to the bias voltage vb-. Therefore, once the readout time and required linearity are determined from the overall design of the imager, the required bias voltage Vb
s can be determined using the graph of FIG. 3(b).

Another advantage of the original sensor cell having the above configuration is that the holes accumulated in the p region 6 can be read out non-destructively since the probability of recombination of electrons and holes in the p region 6 is extremely small. This means that when the optical sensor cell according to the above configuration is configured as an imaging device, new functions can be provided in terms of system operation.

Furthermore, the time during which the accumulated voltage Vp can be held in the p region 6 is extremely long, and the maximum holding time is rather limited by the dark current thermally generated in the depletion layer of the junction. However, in the above photosensor cell, the region where the depletion layer spreads is the n-region 5 with extremely low impurity concentration, so its crystallinity is good and thermally generated electron-hole pairs are There are few.

Next, the operation of refreshing the charges accumulated in p region 6 will be explained.

In the optical sensor cell having the above configuration, as already mentioned, the charges accumulated in the p region 6 are not eliminated by the read operation. Therefore, in order to input new optical information, seven retrieval operations are required to eliminate the previously accumulated charges. At the same time, it is necessary to charge the potential of p region 6, which is in a floating state, to a predetermined negative voltage.

In the optical sensor cell having the above configuration, the refresher operation is also performed by applying a positive voltage to the electrode 9 through the wiring 10t, similarly to the readout operation. At this time, the emitter is grounded through the 8° wiring. The collector is grounded or at a positive potential through the electrode 12. FIG. 4(a) shows an isochoric circuit for refresh operation. However, an example is shown in which the collector side is grounded.

When a positive voltage Vrh is applied to the electrode 9 in this state, the paste 22 has an oxide film capacitance 1icox 13, a paste-emitter junction capacitance 11cbe i 5, h, x, .
Co
A voltage x+Cbe+Cbc is instantaneously applied as in the previous read operation. This voltage causes the pace-emitter junction diode Dbe16 and the pace-collector junction diode Dbc18 to be forward biased and conductive, current begins to flow, and the pace potential gradually decreases.

At this time, the result of calculating the change in the potential of the base in a floating state is shown in FIG. 4(b) as an example of the time dependence of the base potential. The horizontal axis shows the elapse of time from the moment when the refresh voltage Vrh was applied to the electrode 9, that is, five refresh hours, and the vertical axis shows the base potential, with the initial potential of the base being used as a parameter. The initial potential of the pace is the moment when the refresh voltage Vrh is applied.
This is the potential exhibited by the base in a floating state, and is Vrh.

It depends on Cow, Cbe, Cbc and the charge stored in the base.

Looking at FIG. 4(b), it can be seen that the potential of the base always falls along a straight line on the semi-logarithm 7 after a certain period of time, regardless of the initial potential.

The p region 6 receives a positive voltage ' through the MOS capacitor Cox.
There are two ways to charge the battery to a negative potential when the positive voltage is applied for a period of time t6 and the positive voltage is removed. One is an operation in which holes with positive charges flow from the p region 6 to the n region 1, which is required to be in a grounded state, thereby accumulating negative charges.

On the other hand, electrons from n-region 7 and n-region 1 flow into p-region 6 and recombine with holes.
It is also possible to perform an operation in which negative charges are accumulated in the .

In the solid-state imaging device using the optical sensor cell according to the above configuration,
There is a complete refresh mode in which the base potential of all sensor cells is brought to zero volts by a refresh operation (in this case, 10 (see) is required in the example of Fig. 4(b)), although a certain constant voltage remains at the base potential. There are two transient refresh modes in which the fluctuation component due to the accumulated voltage Vp disappears. (At this time lol
, 4 In the example of Figure (b), 10 [μsec 3~10 L
sec ]'s reflexology).

The choice of whether to operate in complete refresh mode or in transient refresh mode is determined by the intended use of the imaging device.

The above is an explanation of the basic operations of the photosensor cell according to the above configuration, which consists of a charge accumulation operation, a readout operation, and a refresh operation due to the incidence of light. Each operation is considered a basic cycle, and it is possible to observe incident light or read out optical information. It becomes possible.

As explained above, the basic structure of the optical sensor cell according to the above configuration is compared with the imaging device described in the above-mentioned Japanese Patent Application Laid-Open Nos. 56-150878, 1987-157073, and 1980-165473. They have an extremely simple structure and are fully compatible with future higher resolutions, as well as their excellent features such as low noise, high output, wide dynamic range, and non-destructive properties due to their amplification function. is stored as is.

Next, a solid-state imaging device using the optical sensor cell described above will be described.

FIG. 5 is a circuit diagram of an embodiment of a solid-state imaging device according to the present invention, which is configured by two-dimensionally arranging the above-mentioned optical sensor cells.

The basic photosensor cell 30 as the first photoelectric conversion element surrounded by the already explained dotted line (this time indicates that the collector of the bipolar transistor is connected to the substrate and the substrate electrode), the read pulse and the refresher pulse horizontal line 31.31', 3 for applying
1", vertical shift register 32 constituting readout means for generating readout pulses, buffer between vertical shift register 32 and horizontal lines 31.31', 31" MO8) transistors 33.33', 33", buffer M
O8) Terminal 34 for applying pulses to the gates of transistors 33, 33' and 33'', buffer MOS transistor 35, 35 for applying refresh pulses
', 35'', a terminal 36 for applying a pulse to its gate, a terminal 37 for applying a refresh pulse, a vertical line 38 for reading out the accumulated pressure from the elementary photosensor cell 30. ", a horizontal shift register 39 constituting a readout means for generating a pulse to select each vertical line, MO8) transistors 40, 40', 40" for gates to open and close each vertical line.
, an output line 41 for reading out the accumulated voltage to the amplifier section,
M05)-y register 42 for refreshing the charge accumulated on the output line after reading, terminal 43 for applying a refresh pulse to NOS transistor 42, accumulated on vertical lines 38, 38', 38'' during read operation A terminal 45 for applying pulses to the gates of the MOS transistors 44, 44', 44'', MOS) /F transistors 44, 44', 44'', which are used to refresh the electric charge, and a terminal 45 for applying pulses to the gates of the vertical shift register 32 to A wiring 46 for applying a read pulse to the original sensor cell 30' which is shielded from light and has substantially the same photoelectric conversion characteristics as the cell 30, and a read pulse and a refresh pulse to the light-shielded optical sensor cell 30'. Horizontal line 47, wiring 46 and horizontal line 470 for applying
buffer MO8) transistor 48, former sensor cell 3
Vertical line 49.49 for reading the accumulated voltage from 0'
'.

4ta //, gate MOS transistors 50, 50', 50" for opening and closing each vertical line, output line 51 for reading out the accumulated voltage to the amplifier section. Vertical lines 49, 49', 4ta in read operation MOS transistors 52, 52', 52'' for refreshing the charges accumulated in the output line 51, a buffer MOS transistor 53 for applying a refresh pulse, and a buffer MOS transistor 53 for refreshing the charges accumulated in the output line 51 after reading. An image sensor is constituted by a transistor 54 (MOS), a differential amplifier 55 for outputting the difference between the signal voltages appearing on the output line 41 and the output line 51, and an output line 56, and further includes terminals 34, 36, 37, and 43. , 45. This solid-state imaging device is configured by adding a clock driver CKD that supplies drive pulses to the registers 32 and 39, and a clock generator CKG1 that supplies timing pulses to the clock driver CKD. Driver CKD, clock generator CK
G constitutes a control means.

The operation of this solid-state imaging device will be explained using the output pulse timing diagram of the clock driver CKD shown in FIG. 5 and FIG. 6.

In FIG. 6, section 61 is a refresh operation;
2 corresponds to the storage operation, and section 63 corresponds to the readout operation.

At time 1+, the substrate potential, that is, the collector potential 64 of the photosensor cell portion is kept at the ground potential or positive potential, and FIG. 8 shows it kept at the ground potential. Regardless of whether it is a ground potential or a positive potential, as already explained, the only difference is the time required for refreshing, and there is no change in the basic operation. Potential 6 of terminal 45
5 is in a high state, and the register 44.5 is in a high state.
44'.

44'', 52, 52', 52'' are kept conductive, and each party sensor cell is connected to a vertical line 38.38', 38''.

49, 49', 49''. Also, a voltage is applied to the terminal 36 to make the buffer MOS transistor conductive as shown in the waveform 66, and the buffer MOS transistors 35, 35', 35',
35" and 53 are in a conductive state. In this state, when a pulse as shown in waveform 67 is applied to the terminal 37, the horizontal lines 31 and 31'.

The base voltage of each sensor cell is applied through 31" and 47, and as explained above, a refresh operation is entered, and the previously accumulated charge is refreshed according to the complete refresh/tsch mode or the transient fréchet mode. Whether the mode is complete reflexivity mode or transient reflexivity mode is determined by the pulse width of waveform 67.

At time t7, as described above, the base of the transistor of each photosensor cell becomes reverse biased with respect to the emitter, and the transition to the other accumulation period 62 occurs. In this reflex period 61, as shown in the figure, all other applied pulses are kept in a low state.

In the accumulation operation section 62, the substrate voltage, that is, the collector level waveform b4 of the transistor is set to a positive potential.This causes electrons of the electron-hole pairs generated by light irradiation to quickly flow toward the collector side. I can do it. However, keeping this collector potential at a positive potential is not an essential condition because the base is in a negative potential state in the opposite direction to the emitter, that is, the image is taken with a negative potential. However, there is no change in the basic storage operation.

In the storage operation state, the MOS) transistor 44.4
4', 44", 52.52', 52" gate terminal 45
The potential 65 of is kept high as in the refresh period, and each MOS transistor is kept conductive. For this reason, the emitter of each original sensor cell is connected to the vertical line 38.
38', 38'', 49°49', 49'' are grounded. Due to the strong original irradiation, holes are accumulated in the base and when they become saturated, that is, when the base potential becomes forward biased with respect to the emitter potential (sensing potential), the holes become vertical lines 38, 38', 38".

49,. 49'' and 49'', the base potential change stops there, and the signal is clipped.

Therefore, even if the emitters of vertically adjacent photosensor cells are commonly connected by two vertical wires 38, 38', 38'', the vertical lines 38, 38', 38'',
If 38" is grounded, no blooming phenomenon will occur.

To avoid this pluming phenomenon, even if the MOS transistors 44, 44', 44'' are in a non-conductive state and the vertical lines 38, 38', 38'' are in a floating state, the substrate potential, that is, the collector potential 64, is slightly lowered. This can also be achieved by setting the potential to be negative, and when the base potential changes to a positive potential due to accumulation of holes, the potential flows toward the collector side before the emitter.

Following the accumulation section 62, a readout section 63 begins at time ts. At this time t, the MOS) transistor 44
, 44', 44", 52.52', 52", the potential 65 of the gate terminal 45 is set to low, and the horizontal line 31.3
1', 31", 47 buffer MOS transistors 3
3. Set the potential 68 of the gate terminals of 33', 33", and 48 to high, and make each MO8? transistor conductive. However, the potential 68 of the gate terminal 34 is set to high.
It is not an essential condition that the timing of setting gh is at time t8, but any earlier time is sufficient.

At time t4, among the outputs of the vertical shift register 32, those connected to the horizontal line 31 and the wiring 46 become high according to the waveform 69, and at this time, the MOS transistors 33 and 48 are in a conductive state. The three optical sensor cells connected to the horizontal line 31 and the three party sensor cells connected to the horizontal line 47 are read out. This readout operation is as already explained above, and the signal voltage generated by the signal charge accumulated in the base region of each photosensor cell appears as it is on the vertical lines 38, 38', 38''.On the other hand, at this time At the same time, a signal voltage corresponding to the dark voltage appears on vertical lines 49.degree. 49', 49'' from the light sensor cell 30'. The pulse width of the pulse voltage from the vertical shift register 32 at this time is set to such a pulse width that the read voltage with respect to the accumulated voltage maintains a sufficient linearity, as shown in FIG. Further, as described above, the pulse voltage is adjusted so that a forward bias is applied to the emitter in the Vias section.

Next, at time t, among the outputs of the horizontal shift register 39, M connected to the vertical lines 38 and 49
OS) Only the output to the gates of transistors 40 and 50 becomes high as per waveform 70, MOS transistors 40 and 5.0 become conductive, and the output signal enters differential amplifier 55 through output lines 41 and 51. The difference between these, that is, the signal voltage after subtracting the dark voltage, is output from the output terminal 56. After the signals are read out in this way, signal charges due to the wiring capacitance remain in the output lines 41 and 51. , at time t, MOS
) A pulse is applied to the gate terminal 43 of the transistors 42 and 54 as shown in the pulse waveform 71, the MOS transistors 42 and 54 are made conductive, and the output lines 41 and 51 are grounded to refresh the remaining signal charge. It is. Similarly, switching M
O8) Transistor 4σ, 40", 50.50', 50"
・Connect vertical lines 38', 38", 49
．． 49'.

49" is read out. After reading out the signals from each party's sensor cells for one line arranged horizontally in this way,
Vertical line 38.38', 38", 49°49', 49
”, as with the output line 41, the signal t# due to its wiring capacitance remains, so each vertical line 38
．． 38', 38'', 49.49'.

MOS transistor 48°48' connected to 49″
, 48'', 52.52', and 52'' are made conductive by making their gate terminals 45 high as shown by waveform 65 to refresh this residual signal charge.

Next, at time ta, the vertical shift register 32
Among the outputs, the output and wiring 46 connected to the horizontal line 31' become high at the waveform 69', and the storage MK! of each party sensor cell connected to the horizontal lines 31' and 47 becomes high. pressure is applied to each vertical line 38.38', 38", 4
9.49' and 49'' are read out. Thereafter, signals are sequentially read out from the output terminal 56 by the same operation as before.

In this embodiment, a light-shielded optical sensor cell 30' is provided, and the meaning of providing this will be described in more detail with reference to FIGS. 5 and 6.

The output waveform 69 of the vertical shift register is the horizontal line 31
It remains in the high state until the readout operation of all the optical sensor cells connected to the
The signal voltages read out to the vertical lines 38, 38', 38'' are transferred to buffers M, OS) transistors 40, 40', 4
0'' are sequentially closed and transferred to the output line 41, the voltage will not drop due to the division ratio of the wiring capacitance between the vertical lines 38, 38' and 38'' and the output line 41. That is,
Vertical line 38.38'.

The signal voltage read out at 38'' appears on the output line 41 as it is.
The same holds true for the read operation. However, at this time, since the readout pulse takes a longer time for the photosensor cells 30 on the right side, the output from the photosensor cells on the right side increases even though the storage time is the same. This phenomenon similarly occurs for the light-shielded optical sensor cell 30'. Therefore, the differential amplifier 55 of this embodiment eliminates this phenomenon and
It also has the effect of subtracting dark voltage signals.

Further, in this embodiment, the same optical sensor cell 30 used in the sensor section is used as the light-shielded second optical sensor cell 30', and the second optical sensor cell 30' is the same as the sensor section 30. Provided on the substrate. by this,
A change in dark current due to a temperature change in the sensor section 30 can be approximately detected as a change in dark current due to a temperature change in the second photosensor cell 30'.

Therefore, the output of the differential amplifier 55 is proportional to the intensity of the incident light, and becomes an optical information signal that has a large output, a large S/N ratio, and is not affected by temperature changes.

It goes without saying that the present invention can also be applied to licensors.

In addition, as a calculation means, not only subtraction, but also the first
, a predetermined weight may be added to each of the outputs of the second photoelectric conversion element and then subtracted.

(Effects) As described in detail above, since the imaging device according to the present invention can form one pixel with one transistor, it is extremely easy to increase the density, and there are fewer phenomena such as pluming and smearing. It also has high sensitivity and can have a wide dynamic range.

In addition, since the optical sensor cell itself has an amplification function,
A large output voltage can be obtained.

Furthermore, the imaging device according to the present invention can not only remove dark current components with a simple configuration, but also remove the influence of temperature changes on optical information signals, and can capture signals with a large S/N ratio. Obtainable.

[Brief explanation of drawings]

Figure 1(a) is a plan view of the optical sensor cell, Figure 1(b)
is a sectional view taken along the line A-A', FIG. 2 is an equivalent circuit diagram of the original sensor cell, and FIG.
) is a diagram showing the relationship between the read voltage and the accumulated voltage vp when the bias voltage Vb8 = 0.6 V.
Figure 4(b) is a diagram showing the relationship between readout time and bias voltage Vbs, Figure 4(a) is an equivalent circuit diagram of a photosensor cell during refresh operation, and Figure 4(b) is a diagram showing the pace potential for one refresh hour. FIG. 5 is a circuit diagram of an embodiment of an inventive imaging device configured by arranging the above-mentioned optical sensor cells in two dimensions; FIG. 6 is a diagram illustrating the operation of this embodiment. This is a timing chart for 6...Base region 7...Emitter region. 8...Emitter electrode 9...Cavata electrode 30...Photo sensor cell (first charging conversion element)
30'...Original sensor cell (second photoelectric conversion element) 55...Differential amplifier 1tchi/r≧] and 0) 1st port (b) 7Z Bankonuma 7wa EZE -/2 ” HeyestF!L 4th Kasumi) Pawnshi 40 and b) 1r7

Claims (1)

[Scope of Claims] A plurality of photoelectric conversion elements that accumulate carriers generated by photoexcitation in the control electrode area by controlling the potential of the control electrode area of a semiconductor transistor through a capacitor, and a plurality of photoelectric conversion elements that are the same as the above photoelectric conversion element. a plurality of second photoelectric conversion elements having light-shielded characteristics, a reading means for reading out signals from the second photoelectric conversion elements and signals from the first photoelectric conversion element in the same direction; and first and second photoelectric conversion elements. An imaging device comprising: calculation means for calculating an output of a conversion element.