JPS61155880A - Gps receiving device - Google Patents

Abstract

PURPOSE:To perform accurate and speedy position measurement arithmetic even if an internal oscillator has an error by detecting the error of the internal oscillator in synchronism with a specific period of a received radio wave and correcting the error of the oscillator according to the detected error. CONSTITUTION:Pulses are inputted to the counter 25a of the timer 29 of a global positioning system (GPS) receiving device through a correcting circuit 33. A clock from the circuit 33 and clocks from counters 25a, 25b, and 25c are sent to a main computer 21. The 2nd counter 31 counts output pulses of an oscillation circuit 23 under the command of a computer 21 and the circuit 33 adds or deletes a specific pulse signal to or from output pulses of the circuit 23 according to the command of the computer 21. Then, the computer 21 counts PN codes from a satellite as an accurate time and a counter 31 counts output pulses of the circuit 23. For the purpose, the output error of the circuit 23 is calculated by the computer 21 to sent a correcting signal to the circuit 33, correcting the error of the circuit 23.

Description

[Detailed description of the invention] [Industrial field of application J] This invention is applied to a global positioning system (hereinafter referred to as G
(abbreviated as PS).

[Description of Prior Art] There is a conventional GPS receiver as shown in FIG.

In Figure 5, 1 is an antenna that receives signals from a satellite, 3 is an RF front end that amplifies and frequency converts received radio waves, 5 is an IF amplifier that amplifies intermediate frequencies, 7 is a navigation data detection device, and 4 4 channels CHI, CH2, C, each detecting navigation data from 2 satellites
Channel CH1 includes a PN code generator 9, a demodulation circuit 11 that performs spectrum despreading of the signal based on the PN code generated by the PN code generator 9;
a low-pass filter 13, a synchronization circuit 15, and
It has a navigation data detection circuit 17. Channel CH
The configurations of channel CH2, CH3, and CH4 are also similar to channel CH1.

Similarly, in FIG. 5, 19 is a clock, and 21 is a main computer. The clock 19 includes an oscillation circuit 23 and a counter that counts pulse signals from the oscillation circuit 23 and generates a clock when the count reaches a predetermined number. 25.

FIG. 6 shows a detailed view of the clock 19, and the clock 19 is 201'
bOMHz oscillation circuit 2 that generates a clock in lS units
3, a counter 25a that counts 50 pulses of the clock of the oscillation circuit 23 and generates a clock in units of 1000 ns (1 μs), and a counter 25a that counts the clock of the oscillation circuit 23 by 50 pulses, and
A counter 25b that counts 0 pulses and generates a clock in units of 1000 μs (ig+s);
Count 1000 pulses of the clock and get 10010
Counter 2 that generates a clock in units of 0O1sec)
It has 5C.

Note that 27 indicates a bus that interconnects the navigation data detection device 7, the main computer 21, and the clock 19.

In the GPS receiver with the above configuration, each channel CH
1 to CH4 each capture navigation data sent from four II stars at a predetermined timing with a navigation data detection circuit 7, and analyze the navigation data sent from each satellite.

FIG. 7 is an explanatory diagram of a spherical coordinate system with O as the center of the earth.

In Fig. 7, the positions pi(r
i, θ1, φi) can be known by detecting this with the navigation data detection circuit 7, since each satellite carries its position information on the radio waves it emits.

On the other hand, the main computer 21 uses channels CH1 to
Propagation delay time Δt of navigation data input to CH4
By knowing di, the distance fLi between each satellite and the GPS receiver can be determined.

That is, by knowing the propagation delay time Δtdi for each satellite and multiplying it by the speed of light C, the above-mentioned time i can be obtained.

Here, the radio waves from each satellite are emitted at precise timing using an atomic clock, whereas the clock 19 of the GPS receiver cannot use an atomic clock due to economic reasons, so it inevitably deviates. Therefore, the propagation delay time Δtd
i is the measurement result △ti minus the offset time Δtu, which is Δti−Δ[U, and the unknown quantity Δtu
will be included.

Therefore, in order to know the position of the receiving point (the three unknowns are r, θ, and φ), we can calculate a four-element simultaneous equation for the distance li between the satellite and the receiving point for the four unknowns including the unknown Δtu. setting, receiving point position and clock offset time Δt
I try to find u at the same time.

However, although the offset time of the clock is corrected by establishing the four-dimensional simultaneous equations as described above, in other words, the reference time of the clock is known, there is still an error in the clock itself of the receiving device, so Four spheres centered on ISi and each having a radius of 1 (see Fig. 7) do not necessarily intersect at one point.

Therefore, conventionally, in order to remove these errors in addition to normal errors, the number of calculations is increased and a large number of repeated calculations are performed in order to avoid the influence of errors, but this repeated calculation takes up a large amount of the host computer's occupation rate. At the same time, since the above-mentioned clock error is of a constant nature, so to speak, it is also called a second offset time, so it is impossible to eliminate it entirely even if the number of calculations is increased.

Note that the GPS receiving device is used as a navigation system in combination with, for example, a route guidance device, but in this case, the many repeated calculations described above are exclusive use of a host computer that should be shared with other devices. Since the ratio is increased, there is a risk that the efficiency of the entire system will be lowered.

[Object of the Invention] An object of the present invention is to improve the above-mentioned problems and provide a GPS receiving device that can perform positioning calculations accurately and quickly even if the built-in oscillator has an error.

[Structure of the Invention] The above object is to provide a GPS receiving device with an error detection means for detecting an error of a built-in oscillator in synchronization with a predetermined cycle of received radio waves;
This is achieved by including error correction means for correcting the error of the oscillator according to the detection error of the error detection means.

In other words, with the above configuration, the built-in oscillator is corrected to the same degree of accuracy as an atomic clock, so the G
The calculations of the PS receiving device are also accurate, and quick and accurate positioning calculations are possible without the need for extra repetitive calculations as in the conventional case.

[Explanation of Examples] Hereinafter, the present invention will be described in detail with reference to Examples.

FIG. 1 shows a block diagram of a GPS receiver.

In FIG. 1, members having the same functions as those shown in FIG. 4 are designated with the same reference numerals.

Although the first counter 25 of the timepiece 29 has the same function as the counter 25 shown in FIG. 5, it will be referred to as the first counter here. 2nd counter 3
1 and the correction circuit 33 are specially provided to carry out the present invention, and the detailed configuration will be described later. Please refer to the following for details.

2 - 2 show the radio waves transmitted by the satellite S1 shown in FIG. 7, and 2 - 2 show the radio waves transmitted by the satellite S2.

The navigation data D+ and D2 sent from the satellites S1 and S2 shown in FIG. 7 have codes that change at 50 bps. This navigation data Os is 1 shown in Figure 2 ■■ in D2.
, 023Mbps satellite-specific PN (P used
Random noise) code PN+, PN
2 is multiplied and C/A [Coars
e/A question] Signal OA+, CA2
is being made. C/A signal is 1575.42M)I2
The signal is further modulated by the satellite S+ and transmitted from the satellite S+, 32.

For example, considering the channel CH1 shown in FIG. 1, the C/A signal entering the demodulation circuit 11 is the C/A signal CA+ of the satellite S1 and the C/A signal CA+ of the satellite S2 shown in FIG.
Since it is a composite signal of the A signal CA2, the PN code generator 1
When the PN code PN+ of Sl generated in step 9 is multiplied by the signals CA+ and CA2 in the demodulation circuit 11, composite signals MX+ and MX+' shown in FIG. By passing these composite signals through the low-pass filter 13, the satellite S
1 navigation data MX+ (-D+) can be extracted. Similarly, for Mamoru IJSz, channel CH
2, the navigation data MX2 (-D2) can be extracted. The retrieved navigation data MX+ and MX2 are sent to the main computer 5, where position calculation is performed.

As shown in the conventional example, when the − displacement calculation is performed,
In addition to the position, the offset time Δtu of the clock of the receiving device
Since it is known, the clock is advanced or delayed by this error. At this point, the clock is displaying accurate time, but because the oscillation circuit 23 is not accurate, the clock is off quickly.

For example, the frequency of the oscillation circuit is 50MH2, and the error is 2
Suppose it is 0p-. The distance from the satellite to the receiving position is 4
Assuming that it takes 12,013 seconds for the signal sent from the satellite to reach the receiving device, during this time the clock will clock at 120 seconds.
s s x2Elpm (240 ns) (converted to distance: 62 ugliness). In other words, even if the clock offset time is removed and a new clock reference time is generated, the propagation delay time measured from this reference point will deviate during the measurement, and in the above example, it cannot be converted to distance. This means that the difference is 62-.

If the clock deviation is small, the positioning accuracy is improved, the time for calculating the position is shortened, and the occupation rate of the main computer 21 can be lowered, so that the system efficiency can be improved.

Therefore, the error correction of the clock deviation is performed as follows.

A detailed diagram of the clock 29 is shown in FIG. First counter 25
．． are counters 25a and 25b similar to those shown in the conventional example.
, 25c, but unlike the conventional example, the input to the counter 25a is not directly from the oscillation circuit 23, but is input via the correction circuit 33. 2O from correction circuit 33
The clock in units of n3 is sent to the main computer via the line of sight L1, and is also sent to the counters 25a, 25b, 2.
The 1 μs, Ies, and 1 sec clocks from JliL2.5c are also clocked at JliL2. It is sent to the main computer via L3 and L4.

The second counter 31 counts the output pulses of the oscillation circuit 23 according to instructions from the main computer 21 . The correction circuit 33 controls the oscillation circuit 2 according to instructions from the main computer 21.
A predetermined pulse signal is added to or deleted from the output pulse of step 3.

By the way, the PN code of the C/A signal sent from the satellite is 1.023 Mbps and has a length of 1023 bits.

In other words, one cycle is repeated exactly every 1 ms. Since the PN code generator 9 of the receiving device is also synchronized with the PN code of the satellite, one cycle is exactly 11S. Therefore, by counting the number N of PN codes (number of cycles) generated by the PN code generator 9, the accurate time of Naps can be known.

Therefore, the main computer 21 uses P as the accurate time.
The number N of N codes is counted 1000 times, and the second counter 31 counts the output pulses of the oscillation circuit 23. Here, if the frequency of the oscillation circuit 23 is exactly 50MH2, the count value CT per second is 50,000.0.
Although it should be 00, it actually has an error ΔCT. Therefore, this error ΔCT is calculated by the main computer 21 and a correction signal is sent to the correction circuit 33. The correction circuit 33 adds or removes a pulse from the clock pulse of the oscillation circuit 23 according to the correction signal sent from the main computer 21, and sends the clock pulse to the counter 25a. As a result, the error in the oscillation circuit 23 is corrected and the clock 29 shows accurate time.

The clock correction process performed by the main computer 21 is shown in the flowchart of FIG.

The main computer 21 learns of the start of the correction process in step 403 and enters the following correction process. Note that the following correction processing calculations can be performed intermittently using the main computer 21's free time.

At step 405, counting of the number of PN codes is started, and at the same time, the second counter 31 shown in FIG.

Step 409 indicates whether the number of PN codes is a predetermined number N or not. When you want to measure this predetermined number N, llt and P
It is predetermined by the ratio t/T of the period T of the N code. In this example, it is N-1000 and t is isea.

When the predetermined number of times N is determined in step 409, the process moves to step 411, where the measured value C of the second counter 31 and the true value are compared. The true value is the number CTO that the second counter would have counted if there was no deviation in the oscillation circuit 23, and is 50 MH2 in this example. Assume that a deviation ΔCT occurs here. This deviation ΔCT is actually several 10
The value ranges from about several hundred to several hundred.

When the deviation ΔCT is calculated in step 411, step 4
13, the correction amount is determined. The correction amount is the deviation ΔCT
1/1 to the output pulse of the oscillation circuit 23.
If one pulse is added or removed per ΔCT second, the added or removed output pulse is calculated and determined to output the true value per second.

Step 415 sets the correction amount determined in step 413 to the first
This is executed by the correction circuit 33 shown in the figure. In this case, it is possible to perform the correction using the automatically determined correction value until the main computer 21 performs the calculation for the next correction process. That is, since the deviation of the oscillation circuit is generally caused by a change in temperature or deterioration, the correction amount 1/ΔCT does not vary much over time.

As a result of the above, the clock 29 shown in FIG. 1 is corrected according to the period of the PN code, and generates an accurate lock equivalent to that of an atomic clock. Incidentally, if ΔCT=+30, the third
In the figure, the pulse output via line L1 is 1/3
Since pulse removal processing is performed once every 0 seconds, time measurements made using this pulse signal are accurate. Similarly, the clocks output from the lines L2 and L3 are accurate, and the clock output from the line wAL4 is exactly 1 second.

As a result, the GPS measurement device shown in FIG. 1 can accurately detect navigation data and quickly perform accurate positioning calculations.

In addition, in the above embodiment, in order to obtain an accurate time interval, P
Although the period of the N code is used, the period is not limited to this, and one period of the navigation data D+ and D2 is exactly 3O8, and one frame of the navigation data (the navigation data is divided into five frames) is exactly 68, so these cycles can also be used.

Furthermore, in the above embodiment, signals from four satellites are detected using four channels, but shortening the time for positioning calculations is particularly effective when detecting one satellite signal by time-sharing one channel. Become.

In addition, the amount of correction for the oscillation circuit 23 is determined in step 413 in FIG.
It is also possible to carry out the correction by using the clock directly from the source and calculating the correction value using this correction value. In this case, for example, if the propagation delay time is measured to be 8t, the true propagation delay time is Δt - CTo / (CTo+ΔCT).

The clock 29 corrected as described above becomes as accurate as a GPS satellite, but this clock 29 is provided to the main computer 21 and not only performs the above-mentioned positioning calculations, but also controls the main computer 21. Of course, it can be widely used in other clock-required parts, for example, various synchronous circuits, general clocks, timers, etc., with or without intervening.

[Effects of the Invention] As explained in detail above, according to the present invention, it is possible to correct the built-in clock to the same degree of error as the clock of the satellite, so that positioning calculations can be performed quickly and accurately. A GPS receiver can be provided.

[Brief explanation of the drawing]

1 to 4 show embodiments of this invention, and FIG.
FIG. 2 is a block diagram of the configuration of the PS receiver, FIG. 2 is a time chart of navigation data, FIG. 3 is a detailed block diagram of the clock, and FIG. 4 is a flowchart of correction processing of the clock. FIG. 5 is a block diagram of a conventional GPS receiver, FIG. 6 is a detailed block diagram of the clock shown in FIG. 5, and FIG. 7 is an explanatory diagram of the GPS. 7... Navigation data detection device 23... 50 MHz oscillation circuit 25... First counter 29... Clock 31... Second counter 33... Correction circuit

Claims (1)

[Claims] A GPS receiver comprising an error detection means for detecting an error of a built-in oscillator by detecting a predetermined period of a received radio wave, and an error correction means for correcting the error of the oscillator according to the detection error of the error detection means. Device.