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JPS61154096A - Manufacture of multilayer printed wiring board - Google Patents

Manufacture of multilayer printed wiring board

Info

Publication number
JPS61154096A
JPS61154096A JP59273466A JP27346684A JPS61154096A JP S61154096 A JPS61154096 A JP S61154096A JP 59273466 A JP59273466 A JP 59273466A JP 27346684 A JP27346684 A JP 27346684A JP S61154096 A JPS61154096 A JP S61154096A
Authority
JP
Japan
Prior art keywords
resin
printed wiring
wiring board
multilayer printed
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59273466A
Other languages
Japanese (ja)
Other versions
JPH0365910B2 (en
Inventor
松本 正重
新 隆士
節夫 鈴木
松井 泰雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Sumitomo Bakelite Co Ltd
Original Assignee
NEC Corp
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Sumitomo Bakelite Co Ltd filed Critical NEC Corp
Priority to JP59273466A priority Critical patent/JPS61154096A/en
Publication of JPS61154096A publication Critical patent/JPS61154096A/en
Publication of JPH0365910B2 publication Critical patent/JPH0365910B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Landscapes

  • Laminated Bodies (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Moulding By Coating Moulds (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は改良された多層印刷配線板の製造方法に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to an improved method of manufacturing multilayer printed wiring boards.

従来、多層印刷配線板(以下多層板という)の製造方法
としては、銅張積層板をエツチング加工した内層回路板
とプリプレグを重ね合せ、積層プレスによって加熱加圧
し一体化形成し、その後両面印刷板と同様に穴をあけ、
パネルメッキを行い、次いで外層回路を形成し多層板を
得るという製造方法が一般的である。
Conventionally, the manufacturing method for multilayer printed wiring boards (hereinafter referred to as multilayer boards) has been to stack an etched inner layer circuit board of a copper-clad laminate and a prepreg, heat and press them using a lamination press to form an integrated unit, and then form a double-sided printed wiring board. Drill a hole in the same way as
A common manufacturing method is to perform panel plating and then form an outer layer circuit to obtain a multilayer board.

近年、コンピューター等の情報処理機器は多量の情報を
高速で処理するのに、大規模集積回路素子(LSI)と
か超大規模集積回路素子(VLSI)を多層板に高密度
実装することが要求されるようになってきた。
In recent years, in order for information processing equipment such as computers to process large amounts of information at high speed, it is required that large-scale integrated circuit elements (LSI) and very large-scale integrated circuit elements (VLSI) be mounted in high density on multilayer boards. It's starting to look like this.

これらの回路素子間の信号を高速伝達するには多層板が
一定の電気特性を備えなければならない。
In order to transmit signals between these circuit elements at high speed, the multilayer board must have certain electrical characteristics.

重要な電気特性として、特性インピーダンス(ZO)が
あり、この特性を一定に保つには、多層板の信号層と電
源・アース層間の絶縁層の厚みを一定にする必要がある
An important electrical property is the characteristic impedance (ZO), and in order to keep this property constant, it is necessary to keep the thickness of the insulating layer between the signal layer and the power/ground layer of the multilayer board constant.

この問題に対処する方法として、従来はプリプレグの樹
脂含有量の調整、プリプレグの樹脂の70−調整等の手
法が用いられている。
As a method for dealing with this problem, methods such as adjusting the resin content of the prepreg and adjusting the resin content of the prepreg to 70% have been conventionally used.

しかしながら本質的に内層回路の回路密度は夫々異なる
ことおよび回路埋め込み性を完全にするためプリプレグ
には適度の70−が要求されることか呟上記の従来手法
には自ずから限界がある。
However, the above-mentioned conventional method has its own limitations because the circuit densities of the inner layer circuits are essentially different and the prepreg is required to have a moderate thickness of 70 mm in order to completely embed the circuit.

更に電力供給損失を小さくするため、回路銅箔は厚いも
のが要求される傾向にあり、従来の手法では全く対応で
きないところ迄来ていることも事実である。
Furthermore, in order to reduce power supply loss, there is a tendency for thicker circuit copper foils to be required, and it is also true that conventional methods have reached a point where this cannot be achieved at all.

本発明の目的はかかる従来の問題点を解決する多層板の
製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a multilayer board that solves the problems of the prior art.

即ち多層板を製造するに当り、内層を構成する回路板の
表面の回路部と基板面の銅箔厚みに基ずく段差を熱硬化
性樹脂を主成分とする組成物にて埋め込み、表面平滑処
理を行った後、該組成物を加熱硬化せしめてBステージ
状態と成し、然る後絶縁層と成すべきプリプレグを処理
面上に積層し、加熱加圧成形を行うことにより内層回路
間の絶縁層の厚みが均一な多層印刷配線板を得る方法に
関するものである。
That is, when manufacturing a multilayer board, the circuit part on the surface of the circuit board constituting the inner layer and the level difference based on the thickness of the copper foil on the board surface are filled with a composition whose main component is a thermosetting resin, and the surface is smoothed. After that, the composition is heated and cured to form a B-stage state, and then a prepreg to be formed as an insulating layer is laminated on the treated surface and heated and pressure molded to form insulation between inner layer circuits. The present invention relates to a method for obtaining a multilayer printed wiring board with uniform layer thickness.

以下に本発明の詳細について述べる。The details of the present invention will be described below.

本発明に用いられる回路板は、ガラス−エポキシ樹脂回
路板、〃ラスーポリアミノビスマレイミド樹脂回路板が
主なものであるが、他の回路板であっても適用可能であ
る。
The circuit boards used in the present invention are mainly glass-epoxy resin circuit boards and lath polyamino bismaleimide resin circuit boards, but other circuit boards are also applicable.

しかしながら本発明の適用対象は高度の性能を要求され
る多層板であり、〃ラスーポリアミ/ビスマレイミド樹
脂回路板が主たる対象になる。
However, the present invention is applied to multilayer boards that require high performance, and the main target is lath polyamide/bismaleimide resin circuit boards.

また本発明に用いられる熱硬化性樹脂組成物はその形態
についてはフェス状、ペースト状いずれであっても良い
が、埋め込み後の厚み減少を少なくするという意味で溶
媒は極力少いことが好ましく、埋め込み樹脂組成物のB
ステージ化の調整のためには除去し易い溶媒が好ましい
The thermosetting resin composition used in the present invention may be in the form of a face or paste, but it is preferable to use as little solvent as possible in order to reduce the decrease in thickness after embedding. B of the embedding resin composition
In order to adjust the staging, a solvent that is easy to remove is preferred.

また用いられる熱硬化性樹脂も適宜選択可能であり、特
殊な場合は紫外線等の放射線硬化可能な樹脂も適用可能
である。
Further, the thermosetting resin used can be selected as appropriate, and in special cases, resins that can be cured by radiation such as ultraviolet rays can also be applied.

しかしながら耐スメア−性、層間接着力、ドリル加工性
、耐熱性等の多層板として要求される性能を確保する上
ではプリプレグを構成する樹脂組成物が好ましい。
However, the resin composition constituting the prepreg is preferred in order to ensure the properties required for a multilayer board, such as smear resistance, interlayer adhesion, drill workability, and heat resistance.

即ち一般にはエポキシ系樹脂、イミド系樹脂、エポキシ
樹脂−イミド系樹脂組成物が好ましい。
That is, epoxy resins, imide resins, and epoxy resin-imide resin compositions are generally preferred.

特にイミド系基板、イミド系プリプレグを用いる多層板
においては、液状エポキシ樹脂またはポリアミノビスマ
レイミド樹脂に対しては貧溶媒であり、且つエポキシ系
樹脂に良溶媒である溶媒にポリ7ミノビスマレイミド樹
脂を均一分散せしめた樹脂ペーストが特に上述の如き制
約を党服する意味で特に好ましい。
In particular, in multilayer boards using imide-based substrates and imide-based prepregs, poly7minobismaleimide resin is used as a solvent that is a poor solvent for liquid epoxy resins or polyamino bismaleimide resins, and a good solvent for epoxy resins. Uniformly dispersed resin pastes are particularly preferred in the sense that they comply with the above-mentioned restrictions.

これらのフ二スまたはペーストは内層回路板上に施され
るが、この方法としてはロールコータ−、ドクターナイ
フコーター、スクリーン印刷アプリケーター、ホイラー
等による方法があるが、塗布厚みの調整が容易なスクリ
ーン印刷が好ましい結果を与える。
These pastes or pastes are applied onto the inner layer circuit board, and there are several methods for this, such as a roll coater, doctor knife coater, screen printing applicator, and wheeler. Printing gives favorable results.

勿論この場合回路全面へのいわゆるベタ印刷である。Of course, in this case, so-called solid printing is performed on the entire surface of the circuit.

次いでこれら樹脂組成物により回路間に埋め込まれた回
路板は、該樹脂組成物がBステージ状態になる迄加熱さ
れる。
Next, the circuit board embedded between the circuits with these resin compositions is heated until the resin compositions are in a B-stage state.

Bステージ化後、裏面回路も同様な方法で処理し両面の
回路が樹脂により平滑化された回路板を得る。
After B-stage formation, the circuits on the back side are also treated in the same manner to obtain a circuit board in which the circuits on both sides are smoothed with resin.

なおこの場合の樹脂厚みは回路上が零であって回路間が
回路面と同−迄埋め込まれたものが理想的であるが、従
来の段差が減少すれば厚塗りであっても薄塗りであって
も絶縁層厚み精度への寄与はそれなりにある。
In this case, it is ideal that the resin thickness is zero on the circuit and that the area between the circuits is buried to the same level as the circuit surface, but if the conventional step is reduced, even if it is thick, it can be applied thinly. Even if there is, there is a certain contribution to the accuracy of the insulating layer thickness.

かくして得られる複数枚の回路板を用い、その眉間にプ
リプレグを挿入して多層板を積層成形により得る点は従
来と全く同様である。
The method is exactly the same as the conventional method in that a plurality of circuit boards thus obtained are used, a prepreg is inserted between the eyebrows, and a multilayer board is obtained by lamination molding.

以下に実施例を示す。Examples are shown below.

実施例1 ビスフェノール型エポキシ樹脂(シェル社製二ピフー)
#828)30重量部にポリアミノビスマレイミド樹脂
粉末70重量部を分散せしめ粉体の均一分散を図るため
に3本インクロールを3回通過せしめ、ペースト状組成
物を得た。
Example 1 Bisphenol type epoxy resin (Nipifu manufactured by Shell)
#828) 70 parts by weight of polyamino bismaleimide resin powder was dispersed in 30 parts by weight and passed through three ink rolls three times to ensure uniform dispersion of the powder to obtain a paste composition.

次に回路の形成された35μ銅箔〃ラスポリイミド両面
回路板の片面にアプリケーターを用いて40μになる様
にコートを施した。
Next, one side of the 35μ copper foil lath polyimide double-sided circuit board on which the circuit was formed was coated with an applicator to a thickness of 40μ.

次いで130℃で0.5時間硬化せしめた後裏面回路も
同様な方法で処理し150℃、0.5時間乾燥機で硬化
せしめた。
After curing at 130° C. for 0.5 hours, the back circuit was treated in the same manner and cured in a dryer at 150° C. for 0.5 hours.

得られた回路板は、その表面を粗さ計で測定したところ
上2゜5μの粗度であった。
The surface of the obtained circuit board was measured with a roughness meter and had a roughness of 2.5 .mu.m.

なお比較として未処理回路についても同一な測定を実施
したところ基板面と回路面上では30μの段差が認めら
れだ。
For comparison, when the same measurement was performed on an unprocessed circuit, a 30 μm difference in level between the board surface and the circuit surface was observed.

従って片面で30μの段差が5μの段差に減少したこと
になる。
Therefore, the step difference on one side was reduced from 30μ to 5μ.

次いで該処理回路板を2枚と35μの外層@112枚の
各層間に積層後厚み100μになるようなポリアミ7ビ
スマレイミにエポキシ樹脂−がラス布プリプレグ2枚づ
つを積層し、170℃、2時間、40kg/cta2の
圧力で積層成形を行った。
Next, two pieces of epoxy resin lath cloth prepreg were laminated on polyamide 7-bismaleimide to a thickness of 100μ after laminating between two of the treated circuit boards and 112 outer layers of 35μ, and heated at 170°C for 2 hours. , laminated molding was performed at a pressure of 40 kg/cta2.

得られた多層板につき、これを切断し、3層〜4層間の
回路厚みを10ケ所にわたり顕微鏡写真により測定した
The obtained multilayer board was cut, and the circuit thickness between the third and fourth layers was measured at 10 locations using micrographs.

その結果回路量絶縁層厚みは210±10μであり、厚
みバラツキは±5%以内に抑え込むことができた。
As a result, the thickness of the circuit insulating layer was 210±10μ, and the thickness variation could be suppressed to within ±5%.

更に耐スメア−性、層間接着力、穴あけ性、煮沸後ハン
ダ耐熱性について定められた試験法により測定を行った
ところ、従来品に比較し何等孫色のない多層板であった
Furthermore, when the smear resistance, interlayer adhesion strength, perforation property, and post-boiling solder heat resistance were measured using established test methods, the multilayer board was found to have no inferiority compared to conventional products.

比較例1 実施例1で用いた同一の内層回路板を用い、回路面を処
理することなしに実施例1と全く同様な方法で多層板を
作製し、回路闇厚みを測定した。
Comparative Example 1 Using the same inner layer circuit board used in Example 1, a multilayer board was produced in exactly the same manner as in Example 1 without treating the circuit surface, and the circuit thickness was measured.

その結果回路間厚みは193±35μであり、厚みバラ
ツキは20%であった。
As a result, the thickness between the circuits was 193±35μ, and the thickness variation was 20%.

以下本発明の方法により得られた作用効果は以下の如く
である。
The effects obtained by the method of the present invention are as follows.

1、樹脂jlI威物による埋め込み法であるため、回路
面を完全に埋め込むことができた。
1. Because the embedding method uses resin jlI material, it was possible to completely embed the circuit surface.

2、回路密度が板肉で異なるものであっても平滑化が図
れる。
2. Even if the circuit density differs depending on the thickness of the board, smoothing can be achieved.

3、予め平滑化処理が施されているため、従来゛の如く
・プリプレグ中の樹脂による埋力込みを考慮する必要が
なく、プリプレグの役割が層開槓着のみとなり、樹脂含
有量の少ないフローの少ないプリプレグを用いることが
できる。
3. Because the smoothing treatment has been applied in advance, there is no need to consider the embedding of resin in the prepreg as in the conventional method, and the role of the prepreg is only layer opening and adhesion, allowing flow with a low resin content. It is possible to use a prepreg with a small amount.

従って極めて厚み精度の調整が簡単になる。Therefore, adjustment of thickness accuracy becomes extremely easy.

4、回路厚みによる影響を受けず銅箔厚みを増大できる
4. The thickness of the copper foil can be increased without being affected by the circuit thickness.

5、回路基板、プリプレグと同一組成の樹脂組成物を適
用すれば従来と同一性能の多層板が得られる。
5. If a resin composition having the same composition as that of the circuit board and prepreg is applied, a multilayer board with the same performance as the conventional one can be obtained.

特許出願人    日本電気株式会社 住友ベークライト株式会社Patent applicant: NEC Corporation Sumitomo Bakelite Co., Ltd.

Claims (4)

【特許請求の範囲】[Claims] (1)多層印刷配線板の製造方法において、内層回路板
表面の回路と基板面の段差間に、熱硬化性樹脂を主成分
とする組成物を埋め込み表面平滑処理を施した後、加熱
硬化せしめて該組成物をBステージ状態となし、しかる
後絶縁層と成すべきプリプレグを処理面上に積層しこれ
を熱圧着することを特徴とする多層印刷配線板の製造方
法。
(1) In a method for manufacturing a multilayer printed wiring board, a composition containing a thermosetting resin as a main component is embedded between the circuit on the surface of the inner layer circuit board and the level difference between the board surface and subjected to surface smoothing treatment, and then heated and cured. A method for manufacturing a multilayer printed wiring board, comprising: bringing the composition into a B-stage state, and then laminating a prepreg to be formed into an insulating layer on the treated surface and thermocompression bonding.
(2)前記熱硬化性樹脂を主成分とする組成物がポリア
ミノビスマレイミド樹脂とエポキシ樹脂から成ることを
特徴とする特許請求の範囲第1項記載の多層印刷配線板
の製造方法。
(2) The method for producing a multilayer printed wiring board according to claim 1, wherein the composition containing the thermosetting resin as a main component comprises a polyamino bismaleimide resin and an epoxy resin.
(3)前記熱硬化性樹脂を主成分とする組成物が液状エ
ポキシ樹脂、またはポリアミノビスマレイミド樹脂の貧
溶媒を用いたエポキシ樹脂溶液にポリアミノビスマレイ
ミド樹脂粉末を均一分散せしめたペースト状組成物であ
ることを特徴とする特許請求の範囲第1項記載の多層印
刷配線板の製造方法。
(3) The composition containing the thermosetting resin as a main component is a liquid epoxy resin or a paste composition in which polyamino bismaleimide resin powder is uniformly dispersed in an epoxy resin solution using a poor solvent for polyamino bismaleimide resin. A method for manufacturing a multilayer printed wiring board according to claim 1, characterized in that:
(4)前記熱硬化性樹脂を主成分とする組成物がエポキ
シ樹脂とフェノールノボラック樹脂から成ることを特徴
とする特許請求の範囲第1項記載の多層印刷配線板の製
造方法。
(4) The method for producing a multilayer printed wiring board according to claim 1, wherein the composition containing the thermosetting resin as a main component comprises an epoxy resin and a phenol novolak resin.
JP59273466A 1984-12-26 1984-12-26 Manufacture of multilayer printed wiring board Granted JPS61154096A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59273466A JPS61154096A (en) 1984-12-26 1984-12-26 Manufacture of multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59273466A JPS61154096A (en) 1984-12-26 1984-12-26 Manufacture of multilayer printed wiring board

Publications (2)

Publication Number Publication Date
JPS61154096A true JPS61154096A (en) 1986-07-12
JPH0365910B2 JPH0365910B2 (en) 1991-10-15

Family

ID=17528313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59273466A Granted JPS61154096A (en) 1984-12-26 1984-12-26 Manufacture of multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPS61154096A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147798A (en) * 1985-12-23 1987-07-01 東芝ケミカル株式会社 Multilayer printed circuit board
JPS6324695A (en) * 1986-07-17 1988-02-02 東芝ケミカル株式会社 Manufacture of multilayer interconnection board
JPS6484698A (en) * 1987-09-26 1989-03-29 Matsushita Electric Works Ltd Manufacture of multilayer circuit board
JPH01143294A (en) * 1987-11-27 1989-06-05 Hitachi Chem Co Ltd Manufacture of multilayer printed wiring board
JPH02122699A (en) * 1988-11-01 1990-05-10 Nec Corp Manufacture of multilayer printed circuit board
JPH02177393A (en) * 1988-12-27 1990-07-10 Nec Corp Manufacture of multilayered printed circuit board
JPH0458591A (en) * 1990-06-28 1992-02-25 Shin Kobe Electric Mach Co Ltd Manufacture of multi-layer printed wiring board
JPH05218605A (en) * 1992-09-25 1993-08-27 Matsushita Electric Works Ltd Circuit board
JPH1035164A (en) * 1996-04-25 1998-02-10 Samsung Aerospace Ind Ltd Ic card and manufacture thereof

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53132772A (en) * 1977-04-22 1978-11-18 Tokyo Shibaura Electric Co Multilayer printed circuit board
JPS55120649A (en) * 1979-03-12 1980-09-17 Hitachi Chem Co Ltd Resin composition used for prepreg for multiply lamination
JPS56148895A (en) * 1980-04-21 1981-11-18 Fujitsu Ltd Both-side printed circuit board and multilayer board
JPS56159229A (en) * 1980-05-14 1981-12-08 Mitsubishi Gas Chem Co Inc Production of multilayer board
JPS57145397A (en) * 1981-03-04 1982-09-08 Hitachi Ltd Method of producing multilayer printed circuit board
JPS59121995A (en) * 1982-12-28 1984-07-14 日本電気株式会社 Method of producing multilayer printed circuit board
JPS59149095A (en) * 1983-02-15 1984-08-25 三菱瓦斯化学株式会社 Method of producing multilayer board
JPS6062194A (en) * 1983-09-14 1985-04-10 松下電工株式会社 Method of producing multilayer printed circuit board

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53132772A (en) * 1977-04-22 1978-11-18 Tokyo Shibaura Electric Co Multilayer printed circuit board
JPS55120649A (en) * 1979-03-12 1980-09-17 Hitachi Chem Co Ltd Resin composition used for prepreg for multiply lamination
JPS56148895A (en) * 1980-04-21 1981-11-18 Fujitsu Ltd Both-side printed circuit board and multilayer board
JPS56159229A (en) * 1980-05-14 1981-12-08 Mitsubishi Gas Chem Co Inc Production of multilayer board
JPS57145397A (en) * 1981-03-04 1982-09-08 Hitachi Ltd Method of producing multilayer printed circuit board
JPS59121995A (en) * 1982-12-28 1984-07-14 日本電気株式会社 Method of producing multilayer printed circuit board
JPS59149095A (en) * 1983-02-15 1984-08-25 三菱瓦斯化学株式会社 Method of producing multilayer board
JPS6062194A (en) * 1983-09-14 1985-04-10 松下電工株式会社 Method of producing multilayer printed circuit board

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147798A (en) * 1985-12-23 1987-07-01 東芝ケミカル株式会社 Multilayer printed circuit board
JPS6324695A (en) * 1986-07-17 1988-02-02 東芝ケミカル株式会社 Manufacture of multilayer interconnection board
JPS6484698A (en) * 1987-09-26 1989-03-29 Matsushita Electric Works Ltd Manufacture of multilayer circuit board
JPH0565078B2 (en) * 1987-09-26 1993-09-16 Matsushita Electric Works Ltd
JPH01143294A (en) * 1987-11-27 1989-06-05 Hitachi Chem Co Ltd Manufacture of multilayer printed wiring board
JPH02122699A (en) * 1988-11-01 1990-05-10 Nec Corp Manufacture of multilayer printed circuit board
JPH02177393A (en) * 1988-12-27 1990-07-10 Nec Corp Manufacture of multilayered printed circuit board
JPH0458591A (en) * 1990-06-28 1992-02-25 Shin Kobe Electric Mach Co Ltd Manufacture of multi-layer printed wiring board
JPH05218605A (en) * 1992-09-25 1993-08-27 Matsushita Electric Works Ltd Circuit board
JPH1035164A (en) * 1996-04-25 1998-02-10 Samsung Aerospace Ind Ltd Ic card and manufacture thereof

Also Published As

Publication number Publication date
JPH0365910B2 (en) 1991-10-15

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