JPS6049991B2 - VTR control device - Google Patents

Description

[Detailed description of the invention]

The present invention relates to operation control of a VTR. Conventionally, CTL pulses on a tape are counted and the operation of a VTR is controlled based on the counted value. For example, when searching for the beginning of an arbitrary part of a tape, you can set the number of CTL pulses to reach that part, and the CTL pulses will be counted in fast forward mode, and the tape will stop when this number matches the above setting value. or put into normal playback mode. However, in this method, when selecting a desired portion, the corresponding numerical value of the CTL pulse must be set each time, and the operation is extremely complicated and requires skill. In consideration of these points, the present invention is designed to facilitate operations such as cueing. That is, in the present invention, the content stored on the tape is divided into a plurality of segments (parts) depending on the continuity of the content, etc., and the CTL pulses from the tape tip corresponding to the start and end of each of these segments are counted. This method measures the value and performs control based on this count value, using a so-called microcomputer to store the above count value in memory and specifying the number assigned to each segment. This allows you to locate the beginning of a segment. Furthermore, a timer mechanism is provided so that recording is performed at a desired time and the count values of CTL pulses at the beginning and end of this recording are stored. Hereinafter, a fifth embodiment of the present invention will be described with reference to the drawings. By the way, this embodiment performs the following control as a whole. That is, the recorded content on the tape is divided into a maximum of 6 segments, and each segment is assigned a number from 1 to 63 (
segment number) is attached. Segment memories for six areas are provided, and count values (segment data) of CTL pulses at the start and end of each segment are stored at each address in the order of the segment number. In addition, a program memory for 8 addresses is provided, and by specifying an arbitrary segment number according to the desired playback order, the corresponding segment data is read from the segment memory, and these segment data are reproduced in the specified order. are stored at each address. In the search mode, first, the segment data at the first address of the program memory is read out, the segment is located at the beginning, and playback is started. Further, when this playback reaches the end of the segment, the playback is stopped. At the same time, the segment data at the next address in the program memory is read out, that segment is cued up, and playback is resumed. This operation is performed sequentially at eight addresses in the program memory, and when the operation associated with the eighth address is completed, the program is stopped. In the repeat mode, the same operation as in the search mode is performed, and when the operation related to the eighth address is completed, the operation is repeated again from the first address. Further, when a cue is operated during the search or repeat mode, the count value of the CTL pulse at that point (cue point) and the end data of the segment data of the segment being reproduced are stored in the cue memory. When a search operation is performed at an arbitrary time, data in the cue memory (cue data) is read out, the cue point is located, and playback is started. Furthermore, when this playback reaches the end of the segment or when a clear operation is performed, the playback is stopped. At the same time, the segment data in the program memory that was being played back when the search operation was performed is read out again, the segment is located at the beginning, and playback is restarted4. Also, if an arbitrary segment number is specified and a search operation (interruption) is performed during search or repeat mode,
Segment data corresponding to the designated number is read from the segment memory, the segment is cued, and playback is started. Furthermore, when this playback reaches the end of the segment or when a clear operation is performed, the original segment is cued up and playback is resumed, as in the case of cueing. Furthermore, when a fast forward operation is performed during search or repeat mode, the normal fast forward state is entered, and when this fast forward reaches the end of the segment, the segment data at the next address in the program memory is read out. The end of the segment is cued and the segment is played. Also, if a rewind operation is performed during search or repeat mode, it will return to the normal rewind state and
When this rewind reaches the beginning of a segment, playback resumes from there. Further, the segment data is converted into an audio signal according to a predetermined standard, and this audio signal is recorded on an audio track at the leading end of the tape. When the tape is loaded, the tape is first rewound, and when it reaches the beginning, it enters the playback state, the played audio signal is reverse converted, the data is read into the segment memory, and the reading ends. The tape is then rewound again, and when it reaches the end, it is stopped.
Also, a two second gap is provided in the CTL pulse between segments on the tape. When the playback reaches the end of the segment, this missing portion is detected, and at the time of detection, the count value of the CTL pulse is replaced with the value at the end of the segment data. This corrects errors in count values due to dropouts during the process. Furthermore, clock signals are counted to perform time measurement in timer mode. A timer memory for one area is also provided, and two addresses are paired to store the start and end times (timer data) of the timer operation. In the timer record mode, the timer data (start) at the first address of the timer memory is first read out, and when this data and the count value of the clock signal match, the recording state is entered. At the same time, the count value of the CTL pulse at this time is stored in the portion of the program memory corresponding to the beginning of the segment at the first address. When the recording state is entered, the timer data (end) at the second address of the timer memory is read out, and when this data and the count value of the clock signal match, the recording state is brought to a halt state. At the same time, C at this time
A count value of TL pulses is stored in a portion of the program memory corresponding to the end of the segment at the first address. This operation is performed in order at 16 addresses of the timer memory,
That is, eight timer records are performed, and the count values of the CTL pulses at the beginning and end of each time are stored in the program memory. In addition, in timer play mode,
The operation start time is stored in each odd numbered address of the timer memory, and the data of the segment to be reproduced is stored in the program memory. During operation, the device is first put into a search mode, the first segment is cued up, and the device is stopped. At the same time, the timer data at the first address of the timer memory is read out, and when this data and the count of the clock signal match, reproduction is started. Furthermore, when this reproduction reaches the end of the segment, the second segment is cued and stopped. At the same time, the timer data at the third address of the timer memory is read out. This operation is performed in order at address 8 of the program memory and each odd-numbered address of the timer memory, and eight timer plays are performed. These operations are performed in the following embodiment. FIG. 1 is a configuration diagram, and this example is a cassette type V
It is configured as a remote control device for TR. In the figure, 1 indicates a control circuit. This control circuit 1 is a so-called microcomputer, and includes a central processing circuit (CPU) 11, a read-only memory (ROM) 12 in which operating programs for the CPU11 are written, and a random access memory (RAM) for storing data. ) 13, an input/output circuit 14, etc. And CPUll, ROMl2, RAMl3
are connected by an address bus line 15, a data bus line 16, and a control bus line 17, respectively. Further, the CPU 11 and the input/output circuit 14 are connected by a data bus line 15 and a control bus line 16. Note that these are composed of one chip. Further C
A time base generator 2 is connected to PUll.
Further, an input/output circuit 14 is connected to the keyboard 3 and the display device 4. Here, the keyboard 3 is 2 as shown in the figure.
Consists of 0 numbers and function push buttons. These pushbuttons are connected in a 5x4 matrix, and a 5-phase clock signal from the input/output circuit 14 is supplied to each row line through the line 31, and a signal obtained on each column line by the operation of the pushbutton is connected to the line 31. Input/output circuit 14 through 32
supplied to In addition, the display device 4 is provided with two 5-digit number display parts, and stove display parts 4c, 4d, 4e, and 4f are provided between every two digits from the bottom of each of the display parts 4a and 4b, and three other number display parts are provided. Function display sections 4g, 4h, and 41 are provided. Then, the same five-phase clock signal as the row line of the keyboard 3 described above is supplied to each digit of the number display sections 4a, 4b, and the data signal from the input/output circuit 14 is sent to the decoder circuit for each number display section 4a, 4b. 41 and 42, and the numbers of each digit are displayed in a time-division manner. Further, a control signal from the input/output circuit 14 is supplied to each colon and function display section 4c to 41 through a line 43. Furthermore, the input/output circuit 14
Connected to TR5. Here, the input/output circuit 14 and ■TR5
The following connection lines are provided between the First, an audio signal is supplied from the input/output circuit 14 to the VTR 2 through a line 21, a control signal for tape transport (stop running, rewinding, fast forward) of the VTR 5 is supplied through a line 22, a control signal for audio dubbing, and a control signal for recording. Control signals, pause control signals, etc. are supplied through line 23. Further, the CTL signal is supplied from the VTR 5 to the input/output circuit 14 through the line 24, and the audio signal is supplied through the line 24.
5, and a signal indicating the state of tape transport is supplied via line 26. A signal indicating that a cassette is installed, a signal indicating that remote operation is prohibited, a signal determining the recording method, and a signal indicating that the tape has been rewound to the leading edge are supplied through line 26. Display signals etc. are supplied through line 27. Of these, the audio signal lines 21 and 25 use a switch circuit 28), so that input and output are shared by a single lead wire. Also, a tape transport control signal line 22 and a display signal line 26
By using the coupling circuit 29, each input and output is shared by a single lead wire. Furthermore, Figure 2 shows RA
The address structure of M13 is shown. Reference numeral 51 is a segment memory area in which 6 addresses from 0 to 6 are provided, and 63 segment data are stored. 52 is a program memory area, which is provided with eight addresses from 0 to 7, and stores 8 segment numbers and segment data. Reference numeral 53 is a time memory area in which addresses of one hat from 0 to 1 are provided, and 16 (eight times) timer data are stored. Reference numeral 54 denotes a program pointer area, which is composed of a 4-bit register, and stores a numerical value specifying an arbitrary address (a) to 8) in the program memory area 52. Reference numeral 55 is a timer pointer, which is composed of a 4-bit register and can be used at any address (
0 to 15) is stored. Reference numeral 56 is a queue memory area, which is provided with an address of 1 and stores queue data. Reference numeral 57 is an interruption memory area in which a segment number designated by an interruption search is stored. Further, 58 is a CTL counter area for counting CTL pulses, and 59 is a timer counter area for counting clock pulses. In addition, temporary or registers used for calculations, various flag registers, etc. are provided. The following program is stored in the ROM12. The process will be explained below according to the flowchart shown in FIG. In addition, in the figure, alphabetical symbols mean that the same alphabetic characters are consecutive. In the figure,
When the power is turned on in step [1], step [2]
CPUll, etc. are reset in step [3], and VT is reset in step [3].
A waiting time (2.2 seconds) is provided until R2 rises. After that, in step [4], the counters 58, 5 of RAMl3
92 is reset to 0, and in step [5], the flag register of the RAM and the like are preset to the initial state. Further, in step [6], it is determined whether or not a tape cassette is attached. If the cassette 4 flag F1 is not installed, the cassette 4 flag F1 is set to O in step [7], and the process proceeds to step [8]. Also, when it is installed,
further steps

At [9], it is determined whether the cassette flux is 1 or not. When the lower flag is 1, the process proceeds to step [8]. When the flag F1 is 0, the cassette flag F1 is set to 1 in step [10], and a data reading routine is executed in step [100]. This data loading routine (step [
100)) is programmed as shown in the flowchart of FIG. That is, in step [101], the VTR 5 is placed in a rewinding state. Further, in step [102], it is determined whether or not the tape is at the tip. If the tip has not been reached, it is further determined in step [103] whether or not the stop button (S'IOP) on the keyboard 3 has been pressed. And when the stop button is not pressed,
The process returns to step [102] and the operation is repeated.
Furthermore, when the VTR 5 is at the tip position in step [102], the VTR 5 is put into the playback state in step [104],
Segment data recorded on the audio track at the leading end of the tape is reproduced and transferred to RAM13. Further, in step [105], it is determined whether the data transfer is completed. If the data transfer is not completed, it is further determined in step [106] whether two forgings have elapsed since the start of playback. If the data transfer is not completed, the process returns to step [105] and the operation is repeated. Further, when the data transfer is completed in step [105], the entire apparatus is put into a control system based on segment instructions in step [107], and the CTL flag F2 is set to 0. Then, in step [108], TR5 is put into the rewind state. Further, in step [109], it is determined whether the tape has been rewound at the leading end. If the rewinding is not completed, step [1]
09] and the operation is repeated. If rewinding has been completed, the VTR 5 is brought to a halt in step [110], and the process proceeds to step [8] in FIG. Further, when the stop button is pressed in step [103], the VTR 5 is stopped in step [111],
In step [112], the entire device is put into a control system based on the conventional CTL instruction, the CTL flag F2 is set to 1, and the third
The process proceeds to step [8] in the figure. Also, when two forgings have passed in step [106], this is a case where the predetermined data has not been recorded on the tape tip.
At this time, in step [113], a control system is established based on the CTL instruction, the CTL flag F2 is set to 1, and the process proceeds to step [108]. Then, the tape is rewound to the leading edge, brought to a stopped state, and the process proceeds to step [8] in FIG. The data reading routine (step [100)] is executed as described above. Furthermore, in step [8], search flag F3 or repeat flag F4 is set.
It is determined whether or not is 1. And under the flag. , F4 are both 0, step [
11). Also under the flag. , F4 is 1, a search repeat routine is executed at step [200]. This search/repeat routine (step 200) is programmed as shown in the flowchart of FIG. That is, in step [201], it is determined whether the CTL flag F2 is 1 or not, and when the lower flag 2 is 1, the process proceeds to step [202]. Further, when flag F2 is O, step [203
], it is determined whether the search stop flag is 1 or not. And when flag bottom, is 1, step [20
4]. Also, when flag down is O, the queue search flag is brought down in step [205]. It is determined whether or not is 1, and under this flag. When is 1, in step [206], the bottom of the top flag is set to 1.
A determination is made as to whether or not. When the flag F7 is 1, the data of the cue point in the cue memory 56 is transferred to the temporary memory of the calculation section in step [207], and the process proceeds to step [202]. When the flag F7 is 0, the data at the end of the segment of the queue memory 56 is temporarily transferred in step [208], and the process proceeds to step [202]. Further, when the flag F6 is O in step [205], it is determined in step [209] whether or not the interruption search flag F8 is 1, and the flag is below this flag. When is 1, further step [21
0], it is determined whether the top flag is 1 or not.
When the lower flag is 1, the data at the beginning of the segment in the segment memory 51 at the address specified in the interruption memory 57 is temporarily transferred in step [211], and the process proceeds to step [202]. If the lower flag is 0, the data at the end of the segment in the segment memory 51 at the address specified in the interruption memory 57 in step [212] is temporarily transferred and the process proceeds to step [202]. Further, when the flag F8 is O in step [209], it is determined whether the top flag F7 is 1 or not in step [213]. When flag F7 is 1, step [2
14], the data at the start end of the segment in the program memory 52 at the address specified by the program pointer 54 is transferred to the template, and the process proceeds to step [202]. Also, when flag F7 is 0, step [215]
The data at the end of the segment in the program memory 52 at the address specified by the program pointer 54 is temporarily transferred. Furthermore, in step [202], CT
The count value of the L counter 58 is transferred to the register Z for calculation, and in step [216] it is determined whether the temporary contents and the contents of the register Z match. If they do not match, take another step [217
], it is determined whether the search play flag F9 is 1 or not, and the flag is lowered. When is 1, the process proceeds to step [218]. Also, when flag F9 is O, an additional step [
219], the temporary contents and the contents of register Z are compared in size. When the contents of register Z are larger, the VTR 5 is put into a rewinding state at step [220] and the process proceeds to step [218]. If the contents of register z are smaller, the VTR 5 is put into fast forward mode in step [221] and the process proceeds to step [218]. If the temporary contents match the contents of register Z in step [216], it is determined in step [222] whether the top flag F7 is 1 or not. When flag F7 is 1, further step [22
3], it is determined whether the CTL flag F2 is 1 or not.
When the flag F2 is O, the top flag F7 is set to 0 in step [224], the search play flag F9 is set to 1, and the process proceeds to step [225]. Also step [
223] and the CTL flag F2 is 1, step [2
26], the search flag F3 is set to 0, and the search play flag is lowered. is set to O and the process proceeds to step [225]. Further, in step [225], the timer search flag F
A determination is made as to whether lO is 1 or not. and flag FlO
When is 0, the VTR 5 is put into the playback state in step [227] and the process proceeds to step [218]. When the flag FlO is 1, the VTR 5 is stopped in step [228], the search flag F3 is set to 0, and the process proceeds to step [218]. Further, when the top flag lower is 0 in step [222], the search play flag F9 is set to O in step [229], and the top flag lower is set to O in step [229].
30], it is determined whether or not the VTR 5 is in fast forward mode. And if it is not in fast forward mode, step [231]
The search stop flag F5 is set to 1, the register T is set to 4, and the process proceeds to step [218]. Further, in step [204], it is determined whether the contents of register T are 15 or not. Here, register T is processed by an interrupt in CPUll,
Increased by 1 every 5 seconds. If the content is not 15, the process proceeds to step [218]. Furthermore, in step [218], it is determined whether the contents of register A are 15 or not. Here, register A, like register T, is subjected to interrupt processing by CPUll, is incremented by 1 every 0.5 seconds, and is reset to 11 every time a CTL pulse is detected. If the contents of register A are not 15, the process proceeds to step [11] in FIG. Also a register. If the content of A is 15, step [23
3] to lower the search stop flag. It is determined whether or not the flag is 1, and if the lower flag is O, step [11] in FIG.
). Then, when the flag F5 is 1, the value of the CTL counter 58 is set to that! in step [233]. Then, the segment data is corrected using the segment data at the end of the segment being played back, and the process proceeds to step [234]. Further, when the contents of the register T are 15 at step [204] and when the VTR 5 is in a fast forward state at step [230], the process also proceeds to step [234]. And this step [2
34], the VTR 5 is stopped and the search-on flag Fll is set to O. Also, in step [235], the search stop flag F5 is set to 0, and the top flag F7 is set to 1.
be made into Furthermore, in step [236], the queue search flag F6 or the interruption search flag F8 is set.
It is determined whether or not is 1. And flags F6 and F8
If either one is 1, the queue search flag F6 and the interruption search flag F8 are set to 0 in step [237], and the process proceeds to step [238]. Also, when flags F6 and F8 are both O, step [
In step [239], the numerical value of the program pointer 54 is incremented by 1, and further, in step [240], it is determined whether the numerical value of the pointer 54 is 8 or not. If the number is not 8, the process proceeds to step [238]. When the number is 8, the value of the pointer 54 is set to 0 in step [241], and then in step [241], the value of the pointer 54 is set to 0.
42], it is determined whether the repeat flag F4 is 1 or not. When the flag F is 1, the process proceeds to step [238]. Further, in this step [238], it is determined whether the timer play flag FlO is 1 or not, and when it is 0, the process is returned to step [218]. Also under the flag. When is 1, the search flag F3 and repeat flag F4 are set to O in step [243] and the process returns to step [218]. Also step [242
], if the repeat flag F4 is 0, step [30
0], a clearing routine to be described later is executed. The search repeat routine (step [200]) is executed as described above. Further, in step [11], it is determined whether or not the search button (S) has been pressed. If the button is not pressed, the process proceeds to step 12. Further, when the search button is pressed, it is further determined in step [13] whether or not the cue memory 56 has stored data. And when it is remembered,
In step [14], the queue search flag F6 is set to 1, and the process proceeds to step [15]. Also step [13
] is not stored in the cue memory 56, the interrupt memory 57 is further stored in step [16].
A determination is made as to whether or not the data has been stored. If it has been memorized, go to step [17] and put it under the interruption search flag. is set to 1 and step [1
5]. Further, if the information is not stored in the interruption memory 57 in step [16], the process proceeds to step [15]. Then, in step [15], the search flag F3 is set to 1, the search play flag F9 is set to O, and the process proceeds to step [18]. Further, in step [12], it is determined whether or not the repeat button (R) has been pressed. If the button is not pressed, the process proceeds to step [18]. Also, if the repeat button is pressed, the step
19], the repeat flag F4 is set to 1, and the search play flag is lowered. is set to O and the process proceeds to step [18]. Further, in step [18], it is determined whether or not the clear button (CL) has been pressed. Then, if the clear button is not pressed, step [20
]. Also, when the clear button is pressed,
At step [21], under the clear flag, 2 is set to 1, and the process returns to step [6]. Further, in step [20], it is determined whether the clear flag Fl2 is 1 or not, and when it is O, the process proceeds to step [22]. Further, when the flag Fl2 is 1, a clearing routine is executed in step [310]. This clearing routine (step [310]) is programmed as shown in the flowchart of FIG. That is, in step [311], the clear flake is lowered. is set to 0. Further, in step [312], it is determined whether the queue search flag F6 or the interruption search flag F8 is 1 or not. And flag F6,
When either one of F8 is 1, the process proceeds to step [313], the queue search flag F6 and the interruption flag F8 are set to 0, and the process returns to step [6] in FIG. Also under the flag. , F8 are both O, the search flag F3 and repeat flag F4 are set to 0 in step [310], the timer play flag F9 and timer record flag Fl3 are set to O in step [315], and the calculation is performed in step [316]. The temporary section and register z are cleared and the process returns to step [6] in FIG. Clear routine (step [
310]) is executed. Further, in step [22], it is determined whether or not a numeric button (0 to 9) has been pressed, and if it has not been pressed, the process proceeds to step [23]. Further, when the number button is pressed, a number setting routine is executed at step [320]. This number setting routine (step 320) is programmed as shown in the flowchart of FIG. That is, the number of the button pressed in step [32111] is temporarily set. Note that the numerical settings are sequentially shifted from the lowest to the lowest. Further, the temporary contents are displayed on the numerical display section 4a. Further, in step [322], it is determined whether the CTL flag F2 is 1 or not, and when it is 1, the process returns to step [6] in FIG. When flowchart F2 is O, it is further determined whether the number set in step [323] is correct, that is, whether or not interruption search is possible with the number of segments stored in the segment memory 51 or less. It will be done. And when the numbers are correct, step [
324], the temporary contents are stored in the interruption memory 57, and the process is returned to step [6] in FIG. Also, if the number is incorrect, step [325]
An error message (E) is displayed on the numeric display section 4a, the temporary contents are cleared, and the process returns to step [6] in FIG. As described above, the number setting routine (step [320)] is executed. Further, in step [23], it is determined whether or not the cue button (CU) has been pressed, and if it has not been pressed, the process proceeds to step [24]. Also, when cue button L is pressed, step [330
] The queue setting routine is executed. This queue setting routine (step 330) is programmed as shown in the flowchart of FIG. That is, in step [331], the search flag F3 or the repeat flag is lowered. It is determined whether or not is 1. When either flag F3 or F4 is 1, the contents of the program pointer 54 are read in step [332], and the segment of the program memory 52 at the address specified by the pointer 54 is read in step) [333]. The data at the end of is stored in the portion of the queue memory 56 corresponding to the end, and the process proceeds to step [334]. Further, when flags F3 and F4 are both 0, step [3
35], the portion corresponding to the end of the queue memory 56 is blanked, and the process proceeds to step [334]. Then, in step [334], the contents of the CTL counter 58 are stored in the portion corresponding to the start end of the queue memory 56, and the process is returned to step [6] in FIG. The queue setting routine (step [330)] is executed as described above. Further, in step [24], it is determined whether or not a program button (PRGM: number button (7) is pressed successively after the function button (F) is pressed) is pressed. And when the program button is not pressed, step [
25]. If the program button is pressed, the program flag Fl4 is set to 1 in step [26] and the process returns to step [6]. Further, in step [25], it is determined whether the program flag Fl4 is 1 or not, and if it is 0, the process proceeds to step [27]. Further, when the flag Fl4 is 1, a program setting routine is executed at step [400]. This program setting routine (step [400)] is programmed as shown in the flowchart of FIG. That is, in step [401], it is determined whether or not a numeric button has been pressed. If the number button is not pressed, step [402
]. When the number button is pressed, the number in flag Fl5 is set to 1 in step [403], the number of the pressed button is temporarily set, and the process proceeds to step [402]. Further step [402
], it is determined whether the enter button (ENTER:F-+R) has been pressed. If the enter button is not pressed, step [4]
04]. Also, when the enter button is pressed, take another step! At [405], it is determined whether or not the timer mode is set. When the timer mode is selected, the number in flag Fl is set in step [406].
It is determined whether 5 is 1 or not, and if it is 1, step [4
07], the temporary contents are stored in the timer memory 53, the number in flag Fl5 is set to 0, and the process proceeds to step [404]. Also step [406]
When the flag Fl5 is 0, the contents of the timer memory 53 are temporarily read out, displayed on the numeric display section 4a, and the process proceeds to step [404]. Also step [
If the timer mode is not set in [405], it is further determined in step [409] whether the number in flag Fl5 is 1 or not, and if it is 1, in step [410] the segment memory 51 at the address corresponding to the temporary content is data is stored in the program memory 52, the number in flag Fl5 is set to 0, and the process proceeds to step [404]. In addition, in step [409], when 5 is 0 under the flag, the contents of the program memory 52 are temporarily read out and displayed on the number display section 4a, and the process is performed in step [409].
Proceed to 0a. Further, in step [404], it is determined whether or not the end button (END: F→8) has been pressed, and if it has not been pressed, the process returns to step [6] in FIG. Also, when the end button is pressed, step [412
], the program flag Fl4 is set to 0, and the process returns to step [6] in FIG. The program setting routine (step [400)] is executed as described above. Further, in step [27], it is determined whether or not a pause button (PAUSE) has been pressed. If the pause button is not pressed, step [28
]. Also, when the pause button is pressed,
At step [29], 6 is set to 1 under the pause flag, and the process proceeds to step [28]. Further step [28]
It is determined whether the pause flag Fl6 is 1 or not, and if it is 0, the process proceeds to step [30]. Further, when the flag Fl6 is 1, a pause routine is executed at step [500]. This pose routine (step [500]) is programmed as shown in the flowchart of FIG. That is, step [501. ), it is determined whether or not the VTR 5 is in a stopped state, and if it is in a stopped state, step [50
2]. If it is not in the stopped state, further step [503]
At step 502, it is determined whether or not the VTR 5 is in the playback state, and if it is in the playback state, the process proceeds to step [502]. Then, in step [502], TR5 is put into a pause state, the pause flag Fl6 is set to 0, and the process returns to step [6] in FIG. Further, if it is determined in step [503] that the reproduction state is not present, it is further determined in step [504] whether the search flag F3 or repeat flag F4 is 1 or not. And under the flag. , F4 is 1, the process proceeds to step [30] in FIG. Also under the flag.
, F4 are both O, the pause flag Fl6 is set to O in step [505] and the process proceeds to step [30] in FIG. The pose routine (step [500)] is executed as described above. Furthermore, in step [30], it is determined whether or not the tape inserted into TR5 is at the leading end position. If it is not at the leading end position, the process proceeds to step [31]. Also, when it is at the tip, step [32]
The contents of the CTL counter 58 are set to 0 in step [3].
You can proceed to 1). Furthermore, in step [31] it is determined whether or not the timer record button (T.REC:F→3) has been pressed, and if it has not been pressed, step [33]
You can proceed to If the timer record button is pressed, the lower timer record flag 3 is set to 1 in step [34], and the process returns to step [6]. Further step [33]
It is determined whether the timer record flag Fl3 is 1 or not, and if it is 0, the process proceeds to step [35]. Further, when the flag Fl3 is 1, a timer record routine is executed in step [600]. This timer record routine (step [600)) is the 11th
It is programmed as shown in the flowchart in the figure. That is, in step [601] the timer pointer 55
The timer data in the timer memory 53 at the address specified by is temporarily transferred, and the count value of the timer counter 59 is transferred to the register Z in step [602]. Furthermore, in step [603], it is determined whether the temporary contents and the contents of register Z match.
If they do not match, the process returns to step [6] in FIG. Furthermore, when the contents of the temporary register and the contents of register Z match, the value of the timer pointer 55 is incremented by 1 in step [604], and then the value of the timer pointer 55 is incremented by 1 in step [604].
5], it is determined whether the pointer 55 has overflowed or not. And when there is an overflow, step [60
6], the VTR 5 is stopped, and then step [300]
The clearing routine is executed. If there is no overflow, it is determined in step [607] whether the timer record flag 7 is 1 or not, and if it is 1, it is further determined in step [608] whether the timer record flag 3 is 1 or not. A determination is made whether or not. And under the flag, if 3 is 1, step [609]
Then, the timer start flag 7 is set to O, the value of the corresponding program pointer 54 is calculated from the value of the timer pointer 55, and the starting end of the segment at the address of the program memory 52 corresponding to this value is set to the current CTL The contents of the counter 58 are stored, and step [61
0], the VTR 5 is placed in the recording state, and the step shown in Figure 3 is [
6]. Further, when the timer top flag Fl7 is O in step [607], the timer top flag Fl7 is set to 1 in step [611], and the corresponding program pointer 5 is set from the value of the timer pointer 55.
4 is calculated, and the contents of the CTL counter 58 at that time are stored at the end of the segment at the address of the program memory 52 corresponding to this value, and step [61
2], the VTR 5 is brought to a stopped state. Further, in step [613], the VTR 5 is put into the playback state, and in step [614], the elapse of 2 seconds is detected, and in step [615], the VTR 5 is put into the stopped state again, and the process returns to step [6] in FIG. Further step [608]
When the timer record flag Fl3 is O, the search flag F3 is set to 1 in step [616], the value of the timer pointer 55 is incremented by 1, and the timer record flag Fl3 is set to 1 in step [616].
], the VTR 5 is put into the playback state and step [6] in Figure 3 is performed.
]. As described above, the timer record routine (step [600)] is executed. Furthermore, in step [35], press the timer play button (T.PL).
It is determined whether or not AY:F→1) has been pressed, and if it has not been pressed, the process proceeds to step [36]. When the timer play button is pressed, the timer play flag is lowered in step [37]. is set to 1 and returns to step [6]. Further, in step [36], it is determined whether the timer play flag FlO is 1 or not.
If it is 0, the process proceeds to step [38]. Further, when the flag FlO is 1, a timer play routine is executed in step [700]. This timer play routine (step 700) is programmed as shown in the flowchart of FIG. That is, step [701. ) search on flag Fl
A determination is made as to whether l is 1 or not. When the flag Fll is 0, step [702]
Under the search flag F, 1 is set to 1, and the search flag F
3 is changed to 1 and the process returns to step [6] in FIG. Furthermore, if the flag F3 is 1 in step [701], it is further determined in step [703] whether or not the search flag F3 is 1, and if it is 1, the process returns to step [6] in FIG. It will be done. When the flag F3 is 0, a timer record routine is executed at step [600]. As described above, the timer play routine (step [700)]
is executed. Further, in step [38], it is determined whether or not the data write button (WRITE: F→9) has been pressed, and if it has not been pressed, the process proceeds to step [39]. When the data write button is pressed, a data write routine is executed at step [800]. This data writing routine (step [800,
1) is programmed as shown in the flowchart of FIG. That is, in step [801], the VTR 5 is put into a rewinding state, and in step [802], it is determined whether the tape is at the leading edge position or not. And until the tip position is not reached, this step [802
] is repeated. Also, when it is at the tip position, step [803]
Then, the VTR 5 is placed in an audio dubbing state, and the contents of the segment memory 51 are converted into an audio signal and supplied to the audio input terminal of the TR 5. Further, in step [804], it is determined whether or not data writing has been completed, and unless it has been completed, this step [804] is repeated. Further, when data writing has been completed, in step [805], TR5 is put into the rewind state. Further, in step [806], it is determined whether the tape is at the leading edge position or not, and this step [806] is repeated until the tape is not at the leading edge position. When the VTR 5 is at the leading end position, the VTR 5 is brought to a halt in step [807] and the process proceeds to step [39] in FIG. The data writing routine (step [800]) is executed as described above. Furthermore, S7 knob [39
], it is determined whether or not the stop button has been pressed. If the stop button has been pressed, the VTR 5 is brought to a halt state in step [40], and the process returns to step [6]. If the stop button is not pressed, the process proceeds to step [41]. At this step [41], press the fast forward button (FF)
It is determined whether or not has been pressed, and if it has been pressed, the VTR 5 is put into fast forward mode in step [42],
The top flag F7 is set to O and the process returns to step [6]. Also, if the fast forward button is not pressed, step [43]
You can proceed to At this step [43], press the rewind button (R
It is determined whether or not EW) has been pressed, and if it has been pressed, ■TR5 is put into the rewind state in step [44], and the top flag F? is set to 1 and returns to step [6]. Also, if the rewind button is not pressed, step [45
]. At this step [45], press the drive button (PL).
It is determined whether or not AY) has been pressed, and if it has been pressed, the VTR 5 is put into a running state in step [46], the top flag F7 is set to O, and the process returns to step [6]. Also, if the run button is not pressed, step [6]
]. The above programs are stored in the ROM12. Therefore, in this device, when the switch is turned on, the device is brought to an initial state in steps [2] to [5]. Usually, 3→8, 8→0 in Figure 3. ．． 0 → [F],
The program is being executed on the main route of [F]-4.
Then, when the stop button, fast forward button, rewind button, and run button are pressed, steps [39], [41), [43], [45]
] are detected in steps [40], [42],
At [44] and [46], the VTR 5 is brought into its respective operating state. Also, when the pause button is pressed, it is detected in step [27], and the pause flag Fl6 is set to 1 in step [29].
be made into When the lower flag 6=1 is detected in step [28], the VTR 5 is put into a pause state in step [500]. Note that in step [500], step [5
01) and [503], the stopped state or running state of the VTR 5 is detected, and only in these cases, step [502] is performed.
is put into a pause state. In addition, in a fast forward state or a rewind state other than these, the pause flag Fl6 is set to 0 in step [505] to prevent a pause state. Further, in step [504], the search or repeat mode is detected, and at that time, the pause flag Fl6 is kept at 1 even in the fast forward or rewind state, and is set in the pause state when the machine next stops or moves. Furthermore, reproduction using segment data is performed as follows. First, when the program button is pressed, it is detected in step [24], and the program flag F is pressed in step [26].
l4 is set to 1. Then, when the lower flag 4=1 is detected in step [25], a program is set in step [400]. That is, in step [400], when a segment number is pressed with the number button, it is detected in step [401], and in step [403], the number of the pressed button is temporarily set and the number in flag Fl5 is set. is set to 1. Furthermore, when the enter button is pressed, it is detected in step [402], and the data in the segment memory 51 at the address corresponding to the number temporarily set in step [410] is stored in the program memory 52, and the number input Below the flag, 5 is set to 0. Then, when the number button is pressed again, the data of that segment is stored in the program memory 52 in the same manner, and up to eight segment data are stored in the program memory 52. Furthermore, when the end button is pressed after necessary segment data has been stored, this is detected in step [404], and the program flag Fl4 is set to O in step [412].
When the search button is pressed in this state, step [1]
It is detected in step 1) and placed under the search flag in step [15]. is set to 1, and the search play flag lower is set to 0. When the repeat button is pressed, it is detected in step [12], and the repeat flag lower is set to 1 and the search play flag F9 is set to 0 in step [19]. And step [8
], when flag F3=1 or flag F3=1 is detected, reproduction according to the program memory 52 is performed in step [200]. That is, in step [200], in the initial state, the top flag lower is set to 1, the search stop flag lower is set to 0, and the content of the program pointer 54 is set to O. Then, in step [213], flag LOW=1 is detected, and in step [214], the data at the start end of the segment stored at the first address of the program memory 52 is temporarily moved. Further, in step [202], CTL
The value of the counter 58 is moved to register z, and in step [216] the contents of the CTL counter 58 are compared with the data at the start of the first segment. If they do not match, the magnitude relationship between them is detected in step [219], and TR5 is rewound or fast-forwarded in the direction of matching in step [220] or [221]. Further step [23
2], the search stop flag F5=0 is detected and the route is returned to the main route. When these match, top flag F7=1 is detected in step [222], top flag F7 is set to 0 and search play flag F9 is set to 1 in step [224], and ■TR is set in step [227].
5 is put into play and the first segment is played back to the main route. In this state, the top flag F7 is set to O, so flag F7=O is detected in step [213], the data at the end of the first segment is temporarily moved in step [215], and the data at the end of the first segment is moved temporarily in step [216]. It is compared with the meat volume on the counter 58. If they do not match, search play flag NI 1 is detected in step [217] and the route is returned to the main route. And when these match, step [
222], the top flag F7=0 is detected, the search play flag F9 is set to 0 using the steno knob [229], and the search stop flag F5 is set to 1 at step [231]. Furthermore, flag F5=1 is detected in step [232], the VTR 5 is stopped in step [23.411], top flag F7 is set to 1 and search stop flag F5 is set to O in step [235], and step [239] ], the contents of the program pointer 54 are incremented by one. Then, in step [232], search stop F5=0 is detected and the process is returned to the main route. This program is repeated, and now that the contents of program pointer 54 have been incremented by one, the segment at the next address in program memory 52 is played. Furthermore, when this program is executed 8 times, step [
239], the content of the program pointer 54 becomes 8, which is detected in step [240], and step [2
41'), the contents of the program pointer 54 are set to 0. In the repeat mode, this is detected in step [242] and the program is repeated from the beginning. In the search mode, the operation is cleared in step [310]. Note that in step [310], step [31
4], the search flag F3 and the repeat flag lower are set to 0, and in step [316], the contents of the temporary and register Z are set to 0. Furthermore, in this device, when performing a timer record, first step [400]
The segment data is stored in the timer memory 53 at . That is, when a desired recording start time (timer data) is pressed with the numeric button, it is temporarily set in step [403]. When the enter button is further pressed, the timer mode is detected in step [405], and the timer data temporarily set in step [407] is set to the timer mode. - stored in the first address of memory 53; Next, when the desired recording end time is pressed again using the numeric button, the timer data is stored in the second address of the timer memory 53 in the same manner. In this way, eight sets of timer data are stored at each address in the timer memory, with a maximum of one timer and one set of start and end. Furthermore, when the end button is pressed after necessary timer data has been stored, the program setting is ended. When the timer record button is pressed in this state, it is detected in step 31, and the timer record flag is set to F in step 4 step 30.
is set to 1. Then, in step [33], flag Fl3
If =1 is detected, the process proceeds to step [600]. In this step [600], first, in the initial state, the contents of the timer pointer 55 are set to 01, and the timer top flag Fl7 is set to 1. and step [601
．． ), the timer data stored in the first address of the timer memory 53 is temporarily moved, and step [6]
In step [02], the contents of the timer counter 59 are moved to register z, and in step [603], the timer data and the contents of the timer counter 59 are compared. If there is no match, the route is returned to the main route and this comparison is repeated each time. And if these match, step [60
4], the contents of the timer pointer 55 are incremented by 1.
Further, in step [608], the timer record flag 3=1 is detected, and in step [609], the contents of the CTL counter 58 at that time are changed to the part corresponding to the beginning of the segment at the first address of the program memory 52. The timer top flag 7 is set to O, and in step [610] the VTR 5 is put into the recording state and returned to the main route. Furthermore, since the timer record flag Fl3 remains at 1, the process proceeds to step [600] again. This time, the contents of the timer pointer 55 are incremented by 1, so in step [601], the timer memory 55 is incremented by 1.
The timer data stored at the second address of No. 3 is temporarily moved and compared with the contents of the timer counter in step [603]. And if these match,
In step [604], the contents of the timer pointer 55 are incremented by one. Further, in step [607], the timer top flag Fl7=O is detected, and in step [611]
The contents of the CTL counter 58 at that time are stored in the portion of the program memory 52 corresponding to the end of the segment at the first address, and the timer start flag 7 is set to 1. Then, in step [612], the VTR 5 is stopped, and in steps [613] to [615], the tape is run without recording for 2 seconds and returned to the main route.
This program is repeated to record and store the CTL count values at the beginning and end. Furthermore, when this program is executed 8 times, step [
604], the content of the timer pointer 55 becomes 15, this is detected in step [605], and step [604] is detected.
06], the VTR 5 is stopped, and step [310]
], and in step [315], the lower timer record flag 3 is set to 0. Thus, according to the present invention, recording is performed at a desired time, and the count values of CTL pulses at the beginning and end of this recording are recorded.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of the present invention, FIG. 2 is a diagram showing the address structure of a random access memory, and FIGS. 3 to 13 are flowcharts showing programs stored in the read-only memory. 1 is a control device, 2 is a time base generator, 3 is a keyboard, 4 is a display device, 5 is a central processing circuit, 12 is a read-only memory, 13 is a random access memory, and 14 is an input/output circuit.

Claims (1)

[Claims] 1. A VTR control device that counts the number of CTL pulses from the leading edge of a tape and performs control based on this count value, which has a central processing circuit, a read-only memory, and a random access memory, and has a central processing circuit, a read-only memory, and a random access memory. Divide the recorded content into a plurality of segments, store count value data of the CTL pulses at the start and end of each segment at each address of the random access memory, and specify the address of the random access memory. As a result, an arbitrary segment is cued and played back, a desired recording start time and end time are set, and when the start time is reached, recording is performed, and the count value of the CTL pulse at this time is set to the random value. The program for these operations is recorded as start data in the access memory, and recording is stopped when the end time is reached, and the count value of the CTL pulse at this time is stored in the random access memory as end data. A VTR control device that stores data in read-only memory.