JPS6043548B2 - Digital output circuit operation confirmation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for checking the operation of a driver in a digital output circuit of a remote monitoring control device or the like.

Generally, in digital output circuits, independent power supplies are used for the power supply voltage of the logic circuit section and the power supply voltage of the power output section consisting of the driver and power output elements, and the voltage value of the latter is higher than that of the former. It's getting expensive.

This is because by separating the power supply, external noise can escape to the power output side of the power supply and eliminate its influence on the logic circuit. Also, when a relay is used as the power output element of the power output section, the relay coil In order to release the surge caused by the switching of the inductance to the power output unit power supply side, and since the supplied power is constant, when the voltage is high, the drive current to turn on and off the power output unit consisting of the driver and power output element is small. Therefore, a driver with a small opening/closing ability can be used to turn on and off the power output section. In this way, the power supply voltage of the power output section is a different voltage that is independent of the power supply voltage of the logic circuit section, so it is difficult to check the operating status of the logic circuit section and include the driver. It was hot.

That is, one of the conventional methods is to check the operation of the entire digital output circuit by directly reading back the digital output signal using the digital input circuit, for example. However, this method requires an independent output signal separate from the original output signal for operation confirmation, and requires the same number of digital input circuits as the number of outputs, resulting in a heavy economic burden. Moreover, there were problems such as requiring a large amount of physical space. FIG. 1 is a diagram showing another conventional example, in which a signal from a register storing output data is read back and compared with data written to the register.

In FIG. 1, DO-D3 is a data bus, WP is a write signal line, RP is a read signal line, RG is a register, ! ~
L is the register output line, DRO-DR3 is the driver, R
YO-RY3 is a power output element consisting of a relay, and CO
-C, is its contact, GO-G2 gate, SKO-SK3
is the spark killer and E is the power source.

Data bus D. The data on -D3 is read into register RG by a write signal. Output line L of register RG. The top 3 are gate G. - connected to one input of G3 and also gate G; - Since the other input of G3 is commonly connected to the read signal line RP, the data written in the register RG is transferred to the data bus D by applying a read signal. ~ Can be read on D3. Therefore, the data written to register RG and gate G. The operation of register RG can be checked by comparing and verifying the data read from register RG via -G3. However, this method merely checks the operation of the register, and cannot check the driver that is most likely to become defective due to the influence of external noise.

Therefore, the present invention eliminates the above-mentioned drawbacks and
A driver that constitutes a digital output circuit. The purpose of this system is to reliably perform checks using simple circuits, inexpensive and easily available parts. According to the present invention, such an object includes: a register that stores digital data for driving a power output element; a plurality of drivers that are turned on or off in accordance with digital outputs from the register; In a digital output circuit formed by cascading power output elements provided in one-to-one correspondence and driven by a driver, a resistive voltage divider circuit connected to the drive power source of the power output element is provided for each driver. By connecting the first voltage dividing point to the connection point between the corresponding driver and power output element, and comparing the output taken from the second voltage dividing point with the output of the register, it is possible to determine whether the driver is good or bad. This is achieved by making it possible to check.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 shows a digital output circuit according to the invention.

In the figure, NCO is a mismatch detection circuit consisting of an OR circuit 0R and an exclusive OR circuit EORO and 0R3;
INVO-1N■3 is inverter, RO-R3, RlO
~Rl3 and R2O-R23 are resistors, and BDO-D3 is a diode, which are newly added according to the present invention.

Note that the other parts are the same as those in FIG. 1 and will therefore be omitted. Also, the resistance R.

-R3 is when the driver DRO-DR3 is in the on state,
In order to prevent the potential at points PO-P from becoming higher than the input threshold level of inverters INVO-INV3, a voltage divider circuit is formed with RlO-Rl3, and inverter I
In order to make the input side of NVO-1NV3 low potential, that is, low level, R2O to R23 are connected to the driver D.
When RO-DR3 is off, the potential at points PO-P is set to high potential, that is, high level, that is, inverter 1NV
This is provided to bring the input side of 0-1NV3 to a high level. Diode BDO-BD3 is connected to power supply E → relay RYO-RY3 → resistor R so that when driver DRO-DR3 is off, the potential at point PO-P3 does not change due to the influence of relays RYO-RY3. -R3→
This is to block the current flowing through RlO-Rl3. That is, relay RYO-RY is connected by diode BDO-BD3.
Even if a different resistance value is used as the resistor R3, the resistor R is used when the driver DRO-DR3 is off. -R3
, RlO~Rl3, P depending on the resistance value of R2O-R23
. The potential at point -P3 is set to a constant value. Therefore, if the resistance value of relay RYO-RY3 is fixed, diode BDO-BD3 is unnecessary. The operation will be explained below. First, when the drivers DRO-DR3 are normal, the output line L of the register RG.

Among the above three, for example, L. When is at a high level (hereinafter also referred to as H or P1), the driver DRO is turned on and the P1 point is grounded via the diode BDO. , L or "0").Therefore, since the output of the inverter INVO becomes H, the output of the exclusive OR circuit EORO becomes L, and no abnormality notification is performed.On the other hand, the output If the line ! is L, the driver DRO is off and the PO point is H.

Therefore, since the output of the inverter INVO becomes L, the output of the exclusive OR circuit EORO also becomes L, and no abnormality notification is given as above. Here, for example, if the driver DRO is defective, the output line L.

Even if becomes L (or H), driver DRO does not turn off (on) and remains on (off), so the output of inverter INVO is H (L), and therefore,
The output of the exclusive OR circuit EORO becomes H, and a mismatch is detected. This mismatch signal is read out by the read signal RP and becomes an abnormality notification via an AND circuit AND.

FIG. 3 shows a time chart for explaining the operation of FIG. 2.

First, in the left half of the figure, data bus D is connected at time t1.

~Data on D3 (DO) ~(D3) are 1, 1, 0 respectively
, 1 are written to the register RG by the write signal WP, and the signals 1, 1, 0, 1 are output to the output lines ~L as shown by (LO) ~ (L3), respectively. It is shown. This output signal controls the driver DRO.
-DR3 is driven, and when driver DRO-DR3 is normal, it turns on, off and on, respectively, thereby P.

-The potentials (PO) to (P3) at point P3 are H, H, and L, respectively.
,H. Therefore, the read signal (RP
), no output is obtained from the AND circuit AND.

This allows it to be detected that it is normal. Next, in the right half of the figure, when data 0, 0, 1, and 1 are written to drive drivers DRO-DR3, driver DR
This shows the case where O and DR3 are defective. In this case, the potential P? at time TO at points PO and P2? and P21C should change to H and L, respectively, but will remain at L and H, respectively.

Therefore, at time Tn+1, the read signal (RP)
When given, the exclusive OR circuits EORO and EOR2 of the mismatch detection circuit NCO are established, so the AND circuit A
A signal (ER) is obtained from the ND, and the occurrence of an abnormality is reported.

The above operations are summarized as shown in Table 1.

In Table 1, the states L, DR, and RY of each part indicate the state of each part, such as the output line of the register, the driver and relay coil, or the disconnection of the line, and the state of the signal 1N.
V and EOR indicate the output states of the inverter and exclusive OR circuit, respectively.

Further, a logic 0 indicates a low potential L, and a logic 1 indicates a high potential H, and an output of 1 from the exclusive OR circuit EOR indicates an abnormality. Therefore, in the present invention, the first to fourth items can be detected, but the fifth and sixth items, which are disconnections in relay RY, cannot be detected.

Furthermore, if both driver DR and relay RY are defective, the results will be as shown in the seventh and eighth positions in the table. In addition,
In the above explanation, the high level H is defined as logic 64r9.

cormorant. /<, L/L are respectively made to correspond to the logic 66099, but this may be reversed. Also, inverters INVO to INV3 are used to detect the potential at the point PO-P3, but this Any device that can simply detect the potential may be used, and in some cases, this may be omitted and a coincidence circuit or comparison circuit may be used instead of the mismatch detection circuit, and the comparison may be performed by software. It is also possible to omit the mismatch detection circuit and comparison circuit. Furthermore, by replacing the mismatch detection circuit with a code detection circuit, it is possible to check the code signal instead of the digital signal, and furthermore, it is possible to check m out of n.

Further, although the power output element is a relay in the embodiment of the present invention, it can be similarly applied to a power transistor with photocoupler insulation, a power transistor with transformer insulation, a triac, etc. instead of the relay.

As described above, according to the present invention, a defective driver in a digital output circuit can be detected using inexpensive and easily available components such as resistors, diodes, inverters, and exclusive OR circuits, and with a simple circuit configuration. Furthermore, in some cases, it is also possible to perform total failure detection including registers and drivers.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a conventional example of a digital output circuit, FIG. 2 is a diagram showing an embodiment of the digital output circuit according to the present invention, and FIG. 3 is a time chart for explaining the operation of FIG. 2. It is. Code explanation, RG... register, DRO-DR3...
Driver, DYO-DY3...Power output element consisting of relay, INVO-1NV3...Inverter, N
CO...Discrepancy detection circuit, BDO-BD3...Diode.

Claims (1)

[Claims] 1. A register that stores digital data for driving a power output element, and a driver that is provided corresponding to the output line of the register and that is turned on or off in accordance with the digital output from the register. , in a digital output circuit formed by cascade-connecting a power output element provided corresponding to the driver and driven by the driver, a resistive voltage divider circuit connected to a drive power source of the power output element is provided for each driver. , the first voltage dividing point is connected to the connection point between the corresponding driver and the power output element, and the output taken from the second voltage dividing point is compared with the output of the register to determine whether the driver is good or bad. An operation confirmation method for a digital output circuit, which is characterized by: 2. In the digital output circuit operation confirmation method set forth in claim 1, the first voltage dividing point and the connection point between the driver and the power output element are set in a direction opposite to the current flowing through the power output element. An operation confirmation method for a digital output circuit characterized by connection via a polarized diode.