JPS60257152A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS60257152A JPS60257152A JP59112513A JP11251384A JPS60257152A JP S60257152 A JPS60257152 A JP S60257152A JP 59112513 A JP59112513 A JP 59112513A JP 11251384 A JP11251384 A JP 11251384A JP S60257152 A JPS60257152 A JP S60257152A
- Authority
- JP
- Japan
- Prior art keywords
- flange
- holes
- stem
- semiconductor device
- glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 239000011521 glass Substances 0.000 claims abstract description 34
- 229910000480 nickel oxide Inorganic materials 0.000 claims description 3
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 claims description 3
- 238000010304 firing Methods 0.000 claims 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 abstract description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052802 copper Inorganic materials 0.000 abstract description 6
- 239000010949 copper Substances 0.000 abstract description 6
- 229910052742 iron Inorganic materials 0.000 abstract description 5
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 abstract description 3
- 230000006866 deterioration Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract 2
- 230000032683 aging Effects 0.000 abstract 1
- 239000012299 nitrogen atmosphere Substances 0.000 abstract 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 14
- 229910052759 nickel Inorganic materials 0.000 description 7
- 238000007747 plating Methods 0.000 description 7
- 230000001590 oxidative effect Effects 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000005452 bending Methods 0.000 description 4
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 2
- 238000005219 brazing Methods 0.000 description 2
- 230000002542 deteriorative effect Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910021586 Nickel(II) chloride Inorganic materials 0.000 description 1
- KGBXLFKZBHKPEV-UHFFFAOYSA-N boric acid Chemical compound OB(O)O KGBXLFKZBHKPEV-UHFFFAOYSA-N 0.000 description 1
- 239000004327 boric acid Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009661 fatigue test Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- QMMRZOWCJAIUJA-UHFFFAOYSA-L nickel dichloride Chemical compound Cl[Ni]Cl QMMRZOWCJAIUJA-UHFFFAOYSA-L 0.000 description 1
- LGQLOGILCSXPEA-UHFFFAOYSA-L nickel sulfate Chemical compound [Ni+2].[O-]S([O-])(=O)=O LGQLOGILCSXPEA-UHFFFAOYSA-L 0.000 description 1
- 229910000363 nickel(II) sulfate Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/045—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads having an insulating passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の技術分野］
この発明は、特にステム構造を改良した、中電力用およ
び大電力用パワートランジスタを構成する半導体装置に
関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device constituting a power transistor for medium power and high power, particularly with an improved stem structure.
［発明の背景技術ど問題点］
電力用パワー］・ランジスタのステムを形成するフラン
ジには、銅製のピー１ヘシンクおよびガラスタブレット
を介してリードビンが、それぞれ気密に封着されている
。[Background Art and Problems of the Invention] Power for Electric Power] A lead bin is hermetically sealed to a flange forming a stem of a transistor through a copper P1 sink and a glass tablet.
上記ステムの製造は、まずたとえばシャーシに固定する
ためのボルト貫通孔を形成した所定の形状のフランジを
、鉄製の薄板によって構成する。To manufacture the above-mentioned stem, first, for example, a flange of a predetermined shape with bolt through holes for fixing it to the chassis is formed using a thin iron plate.
このフランジの全面に対して、腐蝕を防ぐために２〜４
μｍの厚さで銅めっきを施す。また、半導体素子を取付
ける銅製のヒートシンクの側面には１５〜２０μｍのＳ
電解ニッケルめっきを施し、このヒートシンクを上記フ
ランジのほぼ中央に設けられた貫通孔にプレスによりか
しめる。2 to 4 times on the entire surface of this flange to prevent corrosion.
Copper plating is applied to a thickness of μm. In addition, a 15-20 μm S
Electrolytic nickel plating is applied, and the heat sink is pressed into a through hole provided approximately in the center of the flange.
フランジに形成′したり−ドビン挿入通孔にはリング状
のガラスタブレット・を挿入し、ガラスタブレットに設
けた穴に電極取出し用のリードビンを挿入する。ここで
、ガラスタブレツ１−は、ソーダ系の軟質ガラスを用い
て作る。また、リードビンは、ガラスタブレットのガラ
ス材料と熱膨張係数の近似するニッケルー鉄合金を用い
て作り、予め約８５０℃で５分間熱処理し、鉄の酸化膜
を形成させておく。A ring-shaped glass tablet is inserted into the dobbin insertion hole formed in the flange, and a lead vial for taking out the electrode is inserted into the hole provided in the glass tablet. Here, the glass tablet 1- is made using soda-based soft glass. Further, the lead bin is made using a nickel-iron alloy having a thermal expansion coefficient similar to that of the glass material of the glass tablet, and is heat-treated in advance at about 850° C. for 5 minutes to form an iron oxide film.
そして、ヒートシンク、ガラスタブレットおよびリード
ピンを挿入したフランジを、窒素のような非酸化性雰囲
気下約１０００℃で焼成し、各部品の接触面を封着する
。さらに全面にニッケルめっきを施すことによりステム
が形成される。Then, the heat sink, glass tablet, and flange into which the lead pins are inserted are fired at about 1000° C. in a non-oxidizing atmosphere such as nitrogen to seal the contact surfaces of each component. Furthermore, the stem is formed by applying nickel plating to the entire surface.
このようにして構成されたステムにおいて、使用された
リードビンは酸化膜を有しているので、リードビンとガ
ラスタブレットとの間の接着性は非常に良好である。し
たがって、組立て中および製品になってからリードビン
に外力が加わっても、リードビンとガラスタブレットど
の間ではニアリークは生じないが、封着強度が弱いガラ
スタブレットとフランジとの間ではニアリークが生じる
。In the stem constructed in this way, since the lead bottle used has an oxide film, the adhesion between the lead bottle and the glass tablet is very good. Therefore, even if an external force is applied to the lead bin during assembly or after the product is manufactured, near leakage will not occur between the lead bin and the glass tablet, but near leakage will occur between the glass tablet and the flange, where the sealing strength is weak.
そして、上記のようにして構成されたステムのヒートシ
ンク部に対して、半導体素子を取付け、この半導体素子
の特性劣化を防止するために、このステムを不活性ガス
雰囲気中に設定し上記ステム上をキャップを用いて気密
封止する。Then, a semiconductor element is attached to the heat sink part of the stem configured as described above, and in order to prevent the characteristics of this semiconductor element from deteriorating, this stem is set in an inert gas atmosphere and the above-mentioned stem is heated. Seal tightly using a cap.
しかし、ニアリークが生じる半導体Ｈａ用ステムでは、
外部の空気が徐々にステム内に入り、半導体素子を固定
している接着剤つまり一般にはろう材中の金属成分が次
第に酸化される。このため、半導体素子の特性はこの接
着材の経時変化とともに劣化してしまう。However, in the stem for semiconductor Ha where near leakage occurs,
External air gradually enters the stem, gradually oxidizing the adhesive fixing the semiconductor element, generally the metal component in the brazing filler metal. Therefore, the characteristics of the semiconductor element deteriorate as the adhesive changes over time.
［発明の目的１
この発明は上記問題点を鑑みなされたもので、その目的
は、ニアリークが生じないようにフランジとガラスタフ
レッ１〜どの接合部の接着強度を高めた半導体装置を提
供することである。[Objective of the Invention 1 This invention was made in view of the above-mentioned problems, and its object is to provide a semiconductor device in which the bonding strength between the flange and the glass flange 1 is increased to prevent near leakage. .
［発明の概要］
ずなわら、本弁明に係る半導体装置は、所定の形状に形
成された鉄製のフランジに、側面をニッケルーリンめっ
きした銅製のピー１−シンクをかしめ、フランジとガラ
スタブレツ］・の挿入孔およびビー１−シン９表面を含
めてフランジの全面に電解ニッケルめつぎを施し、その
ニッケル膜を酸化した酸化膜を形成し、上記酸化の終わ
った部品にガラスタブレットを挿入設定し、このタブレ
ッ１へに対して表面に鉄の酸化膜を有するリードビンを
組立て、非酸化＋！ｌ雰囲気下で焼成し、各部品間の接
触面をＩＪＷしＵ ＩＮ成される。[Summary of the Invention] The semiconductor device according to the present invention is made by caulking a copper P1-sink whose side surface is plated with nickel-phosphorus to an iron flange formed in a predetermined shape, and then attaching the flange and a glass tablet]. Apply electrolytic nickel to the entire surface of the flange, including the insertion hole and the surface of the beam 1-9, form an oxide film by oxidizing the nickel film, insert a glass tablet into the oxidized part, and set this. Assemble a lead bottle with an iron oxide film on the surface to the tablet 1, and make it non-oxidized! The product is fired in a l atmosphere, and the contact surfaces between each part are IJW-formed.
［発明の実施例］
以下に図面を参照して本発明の一実施例を説明する。第
１図はステム部分を取出して示した図である。厚さ１．
５ｍｍの鉄製薄板をプレスにより所定の形状に打ち抜き
、フランジ１１を形成する。[Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing the stem portion taken out. Thickness 1.
A flange 11 is formed by punching a 5 mm thin iron plate into a predetermined shape using a press.
このフランジ１１の両端部分にはステムをシャーシに固
定するためのボルト貫通孔１２および１３、また、半導
体素子取付は部となる貫通孔１４がそれぞれ設けられて
いる。この半導体素子取付は部となる貫通孔１４対して
銅製のピー１−シンク１５をプレスによりにかしめる。Bolt through holes 12 and 13 for fixing the stem to the chassis and a through hole 14 for mounting a semiconductor element are provided at both ends of the flange 11, respectively. To attach the semiconductor element, a copper plate 1-sink 15 is pressed against the through hole 14 by pressing.
この場合、このヒートシンク１５の側面にはニッケルー
リンめっきが施されている。In this case, the side surface of the heat sink 15 is plated with nickel-phosphorus.
次にヒートシンク１５を含めてフランジ１１の全面に電
解ニッケルめっきを施す。このめっきの厚さは、４〜７
μｍである。このめっきに用いる溶液はたとえば、溶液
１６ｍ３中に硫酸ニッケルと塩化ニッケルとホウ酸とを
それぞれ２００〜３５０ｑ、３８〜５０Ｇ、３０〜４５
０含み、ｐＨを２゜５〜４．８に調整したものである。Next, electrolytic nickel plating is applied to the entire surface of the flange 11 including the heat sink 15. The thickness of this plating is 4 to 7
It is μm. The solution used for this plating is, for example, 200-350q, 38-50G, and 30-45g of nickel sulfate, nickel chloride, and boric acid in 16m3 of solution.
0, and the pH was adjusted to 2.5 to 4.8.
そして濃度は５−
５０〜６０℃、電流密度は０ 、５〜３ Ａ ／ ｄ
ｍ ２にそれぞれ設定する。このようにしてめっきを施
したフランジ１１を、６００〜６５０℃に設定された酸
化性雰囲気中で２０〜４０分間熱処理しニッケル膜を酸
化する。And the concentration is 5-50~60℃, the current density is 0, 5~3 A/d
m 2 respectively. The flange 11 plated in this manner is heat treated in an oxidizing atmosphere set at 600 to 650° C. for 20 to 40 minutes to oxidize the nickel film.
次いてカーボン冶・具申で、上記ニッケルの酸化膜を形
成したフランジ１１に設けられたリードピン挿入通孔１
６および１７に、リング状のガラスタブレット１８およ
び１９を挿入する。次いで、このガラスタブレット１８
および１９に形成したガラス穴に、電極取出し用のリー
ドビン２０および２１を挿入する。Next, using a carbon jig, the lead pin insertion hole 1 was formed in the flange 11 on which the nickel oxide film was formed.
Ring-shaped glass tablets 18 and 19 are inserted into holes 6 and 17. Next, this glass tablet 18
Lead bins 20 and 21 for taking out the electrodes are inserted into the glass holes formed in holes 19 and 19.
ここで、カラスタブレツ１−１８および１９は、ソーダ
系の軟質ガラスを用いて作る。また、リードビン２０お
よび２１は、ガラスタブレット１８および１９を形成す
るガラス材料と熱膨張係歓が近叙するニッケルー鉄合金
を用いて作り、予め約８５０℃で５分間熱処理し、酸化
膜を形成させておく。Here, the glass tablets 1-18 and 19 are made using soda-based soft glass. Further, the lead bins 20 and 21 are made using the glass material forming the glass tablets 18 and 19 and a nickel-iron alloy whose thermal expansion properties are close to each other, and are heat-treated in advance at about 850°C for 5 minutes to form an oxide film. I'll keep it.
そして、ヒートシンク１５、ガラスタブレット１８およ
び１９、リードビン２０および２１を挿入したフランジ
１１を、窒素のような非酸化性雰囲気下約１０６一
００℃で焼成し、各部品の接触面を到着する。さらに全
面にニッケルめっきを施すことによりステムを形成する
。The flange 11 into which the heat sink 15, glass tablets 18 and 19, and lead bins 20 and 21 are inserted is then fired at about 106-00° C. in a non-oxidizing atmosphere such as nitrogen to reach the contact surfaces of each part. Furthermore, the stem is formed by applying nickel plating to the entire surface.
このようにして構成されたステムのヒートシンク１５に
対して、半導体素子２２を、ろう材２３を接着材として
取付ける。そしてボンディングワイヤ２４を取付けた後
、半導体素子２２の特性劣化を防止するために、ステム
を不活性雰囲気中に設定してステム上をキャップ２５を
用いて気密封止する。The semiconductor element 22 is attached to the heat sink 15 of the stem constructed in this manner using a brazing material 23 as an adhesive. After the bonding wire 24 is attached, the stem is set in an inert atmosphere and the top of the stem is hermetically sealed using a cap 25 in order to prevent the characteristics of the semiconductor element 22 from deteriorating.
上記ステムでは、フランジ１１に形成した酸化ニッケル
の膜が、フランジ１１とガラスタブレッ１−１８および
１９との間の接着性を向上させるのであるが、この酸化
膜量が０．１ｍｏ／ｃｍ２以下の場合には、ガラスタブ
レッ１へ１８および１９とフランジ１１との間の接着強
度が低く、気密性が充分ではない。In the above stem, the nickel oxide film formed on the flange 11 improves the adhesion between the flange 11 and the glass tablets 1-18 and 19. In this case, the adhesive strength between the glass tablet 1 18 and 19 and the flange 11 is low, and airtightness is not sufficient.
また酸化膜量が０．２５ｍ ｇ ／ ｃ ｍ２以上に達
すると、封着後ガラスタブレッ］・１８および１９中に
気泡が生じるため、フランジ１１とリードビン２０およ
び２１との間の絶縁電圧が低下し製品の保証ができない
。Furthermore, if the amount of oxide film reaches 0.25 mg/cm2 or more, air bubbles will be generated in the glass tablets 18 and 19 after sealing, which will reduce the insulation voltage between the flange 11 and the lead bins 20 and 21. We cannot guarantee the product.
また、このようにガラスタブレット１８および１９中に
気泡が生じると、充分なガラス強度が得られず衝撃に対
してガラスクラックが生じやすくなるので信頼性が低下
する。したがって上記酸化膜の適当な形成量は、０．１
〜Ｏ−２５ｍ Ｑ 、、／ Ｃｍ２である。Further, when air bubbles are generated in the glass tablets 18 and 19 in this way, sufficient glass strength cannot be obtained and glass cracks are likely to occur due to impact, resulting in a decrease in reliability. Therefore, the appropriate amount of the oxide film to be formed is 0.1
~O-25mQ,,/Cm2.
このように構成された半導体装置のステムおよび従来の
半導体用ステムそれぞれについて、ニアリーク試験を次
のように行なってみた。A near-leak test was conducted on the semiconductor device stem constructed in this way and the conventional semiconductor stem as follows.
まず、ステムを炉中で室温から４２０’０まで昇温速度
８０’Ｃ／ｍ ｉ ｎで昇温加熱し、次いで５分間４２
０℃に保ち、続いて４０℃／ｍｉｎの冷却速度で室）易
まで冷却する。その後、リードビンを第２図の点線に示
すように、六方向へ４５°強制的に折曲げ元に戻す。こ
れを折曲げ１回とし、２回目はＢ方向へ４５°折曲げ、
この機械的折曲げを所定回数繰返した後、ヘリウムディ
テクタによってニアリークの有無を測定する。この試験
は両ステムそれぞれ１０個ずつについて行ない、各試験
における折曲げ回数は、１回から６回まで行った。First, the stem was heated in a furnace from room temperature to 420'0 at a heating rate of 80'C/min, and then heated at 420' for 5 minutes.
The temperature is maintained at 0° C. and then cooled to room temperature at a cooling rate of 40° C./min. Thereafter, the lead bin is forcibly bent by 45 degrees in six directions as shown by the dotted line in FIG. 2 and returned to its original position. This is one bend, and the second bend is 45 degrees in the B direction.
After repeating this mechanical bending a predetermined number of times, the presence or absence of near leakage is measured using a helium detector. This test was conducted on 10 stems each, and the number of bends in each test ranged from 1 to 6 times.
その結果、従来のステムは、折曲げ１回では１０個のサ
ンプルはいずれもニアリークを生じなかったが、折曲げ
２回で５個にニアリークが生じ、折曲げ３回以上では全
てのステムにニアリークが生じた。一方、上記実施例に
示したステムの場合は、４回の折曲げまではニアリーク
を生じたサンプルは全くなく、折曲げ５回目で５個にニ
アリークが生じ、折曲げ６回目で初めて全てのステムに
ニアリークが生じた。As a result, when the conventional stem was bent once, none of the 10 samples had a near leak, but when the stem was bent twice, five samples had a near leak, and when the stem was bent three or more times, all stems had a near leak. occurred. On the other hand, in the case of the stem shown in the above example, there were no samples with near leakage until the 4th bending, near leakage occurred in 5 samples at the 5th bending, and it was not until the 6th bending that all the stems showed near leakage. A near leak occurred.
また、従来のステムおよび上記実施例に示したステムそ
れぞれ３０個について熱疲労試験を行った結果、ニアリ
ークが生じたサンプルは従来のステムでは１個〜２個、
上記実施例に示したステムでは０個であった。In addition, as a result of conducting thermal fatigue tests on 30 conventional stems and 30 stems shown in the above example, the number of samples in which near leakage occurred was 1 to 2 samples with conventional stems;
In the stem shown in the above example, the number was 0.
［発明の効果コ
以上のように、本発明に係る半導体装置は、フランジと
ガラスタブレットとの間の接着性が著しく改善されてい
る。その結果、従来問題であったフランジとガラスタブ
レッ１〜との間に生ずるニアリークに起因する半導体装
置の経時的特性劣化を９−
防止することができる。[Effects of the Invention] As described above, in the semiconductor device according to the present invention, the adhesion between the flange and the glass tablet is significantly improved. As a result, it is possible to prevent deterioration of the characteristics of the semiconductor device over time due to near leakage occurring between the flange and the glass tablet 1, which has been a problem in the past.
第１図は本発明の一実施例に係る半導体装置のステムを
示す平面図、第２図は、上記半導体装置の第１図におけ
る■−■に対応する断面図である。
１１・・・フランジ、１８．１９・・・ガラスタブレッ
］・、２０．２１−リードビン。
出願人代理人 弁理士 鈴江武彦
１０−FIG. 1 is a plan view showing a stem of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view of the semiconductor device taken along line 1--2 in FIG. 1. 11...Flange, 18.19...Glass tablet], 20.21-Lead bin. Applicant's agent Patent attorney Takehiko Suzue 10-
Claims (1)
は設定されたフランジに対して、リードピン取付は用の
貫通孔を形成し、この貫通孔を含むフランジ全面に対し
てニッケル酸化膜を形成し、この酸化膜層を有する上記
リードビン取付は用貫通孔に対して、リードビンを保持
するガラスタブレットを挿入して焼成固定させるように
したことを特徴とする半導体装置。A through hole is formed on the flange for attaching the lead pin to the flange where the heat sink for attaching the semiconductor element is set, and a nickel oxide film is formed on the entire surface of the flange including this through hole. A semiconductor device characterized in that a glass tablet holding the lead bottle is inserted into the lead bottle mounting through hole having an oxide film layer and fixed by firing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59112513A JPS60257152A (en) | 1984-06-01 | 1984-06-01 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59112513A JPS60257152A (en) | 1984-06-01 | 1984-06-01 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60257152A true JPS60257152A (en) | 1985-12-18 |
Family
ID=14588527
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59112513A Pending JPS60257152A (en) | 1984-06-01 | 1984-06-01 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60257152A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5230353A (en) * | 1975-09-04 | 1977-03-08 | Nippon Telegr & Teleph Corp <Ntt> | Micro program control method |
| JPS5510137A (en) * | 1978-07-04 | 1980-01-24 | Daikin Ind Ltd | Hydraulic circuit |
-
1984
- 1984-06-01 JP JP59112513A patent/JPS60257152A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5230353A (en) * | 1975-09-04 | 1977-03-08 | Nippon Telegr & Teleph Corp <Ntt> | Micro program control method |
| JPS5510137A (en) * | 1978-07-04 | 1980-01-24 | Daikin Ind Ltd | Hydraulic circuit |
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