JPS60241269A - Manufacture of thin film transistor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a 4' film transistor (hereinafter referred to as TPT), and in particular to a method for manufacturing a TPT which has high mutual conductance and excellent stability in a low temperature process.

TPT is easy to form a switching array over a large area, and therefore research is progressing for the purpose of switching arrays for image sensors or display devices. The TPT used for this purpose needs to have a high phase XD transconductance fm (=, , , ) in order to have a high on-off ratio and be driven at as low an operating voltage as possible. The region where the drain current is saturated is expressed as 2m. Here, W is the channel width, L is the channel length, μ is carrier mobility in the channel portion, CI is the capacitance of the gate insulating film, vG is the gate applied voltage, and vT is the threshold voltage. There are various methods to make a 2m area into an island, and one effective method is to increase the capacitance of the gate insulating film. Conventionally, gate insulating film was made of silicon dioxide (
SiO□) is most often used, but since it is necessary to use an inexpensive glass substrate to fabricate large-area transistor arrays, it is necessary to form SiO4 thin films at low temperatures using chemical vapor deposition (CvD) methods, etc. was there. However, the 5i02 film formed in this way has a high defect density and a low dielectric breakdown voltage, so in order to increase the capacitance of the gate insulating film,
There is a limit to reducing the thickness of a Sin film. There is also a method to increase the dielectric constant of the gate insulation film, which is silicon nitride (S
Using a material with a relatively high dielectric constant, such as a t, N, ) film, has excellent stability against the environment, but it is easy to form interface states with the semiconductor layer, causing problems with the stability of TPT. be. In addition, the 5i02 film formed at low temperature has a high defect density inside, which acts as a carrier trap and causes the TP
There was a problem with the stability of operating characteristics such as the threshold voltage and drain current of T.

The present invention has been made in view of such circumstances, and provides a gate insulating film with a lower defect density than conventional ones, and as a result, a method for manufacturing thin film transistors having high mutual conductance and excellent stability. This is what we provide.

The present invention will be specifically explained below with reference to the drawings. FIGS. 1(a) to 1(e) show the manufacturing process of a thin film transistor according to the present invention. FIG. 1 (-) shows super hard glass (1) as an insulating substrate. It is possible to manufacture a transistor even if ordinary glass with a low softening point is used as the substrate. FIG. 1(b) shows a state in which a polycrystalline Noricon thin film is deposited on a substrate by the CVD method.

show. Polycrystalline silicon thin film (2) 1000~50QQ
It is formed with a film thickness of A. FIG. 1(c) shows a gate insulating film deposited on the polycrystalline silicon thin film by low pressure CVD. The thickness of the gel insulating film is 100~1ooo
Make it X. After that, the above substrate is placed inside a parallel plate type high frequency plasma generator. FIG. 2 shows an outline of the high frequency plasma generator.

The substrate is placed in the substrate holter (11) in the vacuum chamber (10) and evacuated to vacuum through the exhaust pulp (18).

After that, the gas introduction pulp (15) is opened and nitrogen (N2) gas using ammonia (NHs) gas or hydrogen (H2) gas as a carrier gas is introduced into the vacuum chamber. 12) Apply four high-frequency pressures to decompose the introduced gas and induce a plasma state between the electrodes.

In this case, the substrate is heated by a heater (13). Nitrogen ions/i generated in this way enter into the S + 02 of the above-mentioned Gut's perfect model, and the other 02 film is gradually nitrogenized while removing defects.

The conditions for the plasma nitriding in this example are NH.

The internal pressure of the gas was set to 1.0 Torr, and the high frequency (frequency 15
．． 56MHz) Power is 20W, wood board temperature is 550C
Nitriding was carried out for 60 minutes at a low temperature of . Thus 5i01
After the plasma nitridation of the film is completed, an aluminum gate (4) is formed as shown in FIG. 1(d), and phosphorus ions are implanted using the aluminum gate (4) as a mask (5).
A source region (6) and a drain region (C) were formed using a self-imbursement method. FIG. 2(a) shows the formation of aluminum contacts to the source and drain regions.

After depositing the film SIO, (9) between eyebrows, contact holes are formed, and source and drain electrode wirings (8) of predetermined dimensions are formed. Withstand voltage Sin of gate insulating film of N-channel type crystalline silicon TPT according to the present invention
, the defects in the film were compensated by nitrogen ions, which resulted in an increase of more than twice that of the conventional method.As a result, there was no problem even if the gate insulating film was made thinner, and conventional plasma nitridation was not required. The mutual conductance was improved by about 10 times compared to the conventional device. Also, is it true that the train current and threshold voltage change over time in the device according to the present invention? However, it was possible to produce stable TPT.

According to the book @Akira, it is possible to manufacture thin film transistors with high mutual conductance and high reliability using a low-temperature process.
A fitting element with a large area planar display gray can be provided.

[Brief explanation of the drawing]

FIGS. 1(,) to (,) show cross-sectional views of the manufacturing process of TF'l' according to the present invention. FIG. 2 is a block diagram of a plasma nitriding apparatus according to the present invention. 1... Insulating substrate 2... Semiconductor layer 3... Gate insulating film 4... Gate electrode 6.7... Source, drain part 8... Source, drain electrode 9... Insulation between parts Membrane 10... Vacuum chamber 11... Substrate holder 1
2... High frequency polarization 13... Substrate heating heater 14
...High frequency 1 [source 15...gas 4-person valve 16...
・Mass flow controller 17...Gas cylinder. Applicant Suwa Seikosha Co., Ltd. Agent Tsutomu Mogami j ↓ ↓ j ↓～5 Figure 1

Claims (3)

[Claims] (1) Manufacturing a thin film transistor characterized by comprising the steps of depositing a silicon thin film on an insulating substrate and holding the substrate in a plasma atmosphere after depositing the insulating thin film on the silicon thin film. Method. (2) The insulating/4 film on the silicon thin film has a thickness of 10
2. The method for manufacturing a thin film transistor according to claim 1, wherein the thin film transistor is silicon dioxide having an OA of 0 to 100 OA. (3) The method for manufacturing a thin film transistor according to claim 1, wherein the plasma atmosphere is a plasma atmosphere containing nitrogen and hydrogen.