JPS60227444A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enable high current to flow in the device without increasing the area occupied by connecting portions, by providing a plurality of connecting holes in the connecting portions in an interlayer insulation film. CONSTITUTION:A plurality of holes 4-1...4-6 are provided in an insulation film 3 for connecting an upper wire 2 to a lower wire 1. The current density in the stepped portions depends on the peripheral length of the holes in the interlayer insulation film. According to this construction, in which the peripheral length of the stepped portions can be increased, the current density in those portions can be decreased and therefore the device can be highly integrated and miniaturized.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a semiconductor device, and particularly to a multilayer wiring structure in a semiconductor integrated circuit device.

<Background of the Invention> Semiconductor devices are becoming increasingly highly integrated and miniaturized. As an effective technique for this purpose, multilayering of wiring within a semiconductor device is widely practiced. At this time, it is important to ensure reliability of wiring connections between each layer.

It is generally known that the energization life of conductor wiring depends on the current density. In addition, in the connection part of a semiconductor device in which conductor wiring is formed in multiple layers, the current density at the upper and lower conductor connection surfaces (hereinafter referred to as contact parts) and the step part of the upper conductor wiring (hereinafter referred to as the contact part) are The current density at the step (depending on the thickness) greatly depends on the reliability of the wiring connection.

ing. Particularly in the connection portion where a large current flows, the current density at the one step portion becomes dominant. Therefore, in the past, the hole in the interlayer insulating film at the interconnection portion was enlarged to increase the wiring area at the stepped portion, thereby ensuring reliability when applying a large current.

However, in this conventional method, the area occupied by the connecting portion becomes large, impairing high integration and miniaturization.

<Object of the Invention> An object of the present invention is to provide a connection part that allows a large current to flow without increasing the area occupied by the connection part.

<Structure and operation of the invention> In the present invention, the current density in the step portion can be reduced by increasing the circumference of the step portion by providing a plurality of connection holes in the interlayer insulating film at the connection portion.

Therefore, it becomes possible to flow a large current without increasing the area occupied by the connection portion.

Next, embodiments of the present invention will be described in more detail together with the prior art with reference to the drawings.

<Prior Art> FIG. 1 is an example of a cross-sectional view of a conventional connection part. Conventionally, as shown in FIG. 1, one hole was provided in the interlayer insulating film 3 to connect the upper conductor wiring 2 and the lower conductor wiring 1. In this method, the current density in the contact part is determined by the area of the connection surface between the upper conductor wiring 2 and the lower conductor wiring 1, but the current density in the step part is determined by the circumference of the hole in the interlayer insulating film 3. be done.

Therefore, even if the area of the contact part is doubled, the area of the step part will only increase by a factor of VΣ, and when applying a large current, it is necessary to make the hole in the interlayer insulating film 3 very large to reduce the current density especially in the step part. There is.

<Embodiment> FIG. 2 shows an embodiment of the present invention, in which the insulating film is removed at the contact portions of the upper and lower conductor wirings 2 and 1, instead of removing all the glabella insulating film 3 as in the conventional method. 3 is provided with a plurality of holes 4-1 to 4-6. With this configuration, the circumferential length of the stepped portion can be increased, and the current density in one stepped portion can be reduced. The wirings 1 and 2 are made of a metal such as aluminum or a semiconductor such as polycrystalline silicon, and the insulating film 3 is made of an inorganic or organic material such as an oxide or nitride.

As described above, the present invention enables higher integration and miniaturization of semiconductor devices. Note that the present invention is applicable to all semiconductor devices having a multilayer wiring structure.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a conventional example, and FIG. 2 is a sectional view of an embodiment of the present invention.

Claims (1)

[Claims] 1. A semiconductor device having a multilayer wiring structure, wherein upper and lower wiring layers are brought into contact through a plurality of holes provided in an insulating film between the eyebrows.