JPS60198864A - thin film transistor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to thin film transistors, and particularly relates to thin film transistors using amorphous silicon with high KOFF resistance. (Prior Art and Problems) Recently, personal computers and various There is a desire to downsize information processing equipment, and one of the items that is difficult to downsize is a display. Currently, most displays are CRTs, but in a CRT, an electron beam is controlled by an electric field in a vacuum and illuminates a phosphor to emit light, so the device that scans the electron beam has to be large. υIt becomes difficult to downsize.

In order to reduce the size of these displays, thin displays using liquid crystals are attracting attention. This liquid crystal display has a thickness of about 10 μm between two glass plates with electrodes.
A thin display is made possible by sandwiching the liquid crystal and applying an electric field to the liquid crystal using electrodes attached to these two glass plates to control the movement of the liquid crystal. However, when this liquid crystal is operated, for example, when the voltage averaging method is used, there is a problem that when the number of picture elements increases in a simple XY matrix operation, the contrast etc. decrease.

As a method to solve this decrease in contrast, active matrix operation methods using thin film transistors are being researched, and some of these thin films use polycrystalline Sl, tellurium, and amorphous silicon, but they can be Amorphous silicon is most suitable because it can use inexpensive substrates, is stable, and is easy to mass produce.

When applying a thin film transistor using this amorphous silicon to such a flat display, it is necessary to uniformly form thin film transistor elements over a large area with a sufficiently high ratio of ON resistance to OFF resistance in order to obtain a display without pixel defects. Is required.

As shown in the cross-sectional view of FIG. 1, a conventional thin film transistor has a gate metal 2 on an insulating substrate 1 such as glass.
Using a plasma CVD method, for example, silicon nitride 3. n
-Amorphous silicon layer 4. An n+ amorphous silicon layer 6 doped with #) etc. to a concentration of about 0.1 to 1 is sequentially formed, and then source 7 and drain 8 electrodes are formed, and the upper n+ amorphous silicon layer 6 corresponding to the gate metal part is formed. Thin film transistors were constructed by etching crystalline silicon. Further, in order to stabilize the surface of this thin film transistor, an insulating layer 9 made of silicon nitride or the like is provided.

However, there is a process of etching the n+ amorphous silicon (6), and a process of etching the n+ amorphous silicon (4)
When completely formed, the resistance value of the surface of the n-amorphous silicon layer 4 decreases, the OFF resistance of the thin film transistor decreases, and when used in a flat display, image defects occur and the yield decreases.

For example, when using conventional thin film transistors, the average O
N current 3.4xlO'A, average OFF current 2.3XIO
“A, and although the average 0NOFF ratio is sufficient,
A total of four devices had an OFF current of 10-10A or more.

(Object of the Invention) The object of the present invention is to eliminate such conventional drawbacks and to
An object of the present invention is to provide a thin film transistor that has high resistance and can be manufactured stably.

(Structure of the Invention) The structure of the present invention is such that a gate insulating film and a semiconductor layer based on amorphous silicon are laminated on an insulating substrate having a gate metal layer on the top surface, and an ohmic layer and a source layer are formed on this laminated layer. In a thin film transistor in which an electrode and a drain electrode are provided, the semiconductor layer contains 9.11) Pm or more of 11,000 ppp or more.
It is characterized by containing an amorphous silicon layer containing boron at the following concentration and containing nitrogen or oxygen.

(Example) The present invention will be explained in detail below with reference to the drawings.

FIG. 2 is a sectional view showing an embodiment of the present invention.

In this example, first, a molybdenum electrode 2, which is a gate metal, is vacuum-deposited by 1000 people on a glass substrate 1, and then processed into a width of 15 μm by photolithography.

Next, a mixed gas of silane gas, ammonia, and nitrogen gas is decomposed by glow discharge using a plasma CVD device.
iN, 5000 people formed the insulating layer 3. Next, υn-
1,500 layers of amorphous silicon layer 4 were formed, and 50 ppm of diborane was added to a gas containing a 1:1 mixture of nitrogen and silane.
The doped mixed gas was decomposed by glow discharge to form an amorphous silicon layer of 5i800m, and phosphine f2000 was added to the silane.
A 1800 ppm doped n+ amorphous silicon layer 6' is formed. Next, source electrode 7. 2000 molybdenum layers were formed to become the drain electrode 8, and the gate length was 40μ.
m1 Dry etching is performed so that the gate width is 10 μm to form source and drain electrodes 7 and 8 and an n+ amorphous silicon layer 6 to complete the transistor.

Silicon oxide, which will become the SaraniPudgeon film 9, is formed by sputtering.

Note that in this ζ, amorphous Si Nx is used to form high-resistance amorphous silicon, but silane and oxygen, silane and NO2, silane and N20, silane and CO2
A high-resistance amorphous silicon layer formed by a mixed gas such as the like may also be used.

The reason for the decrease in OFF resistance of conventional thin film transistors is that the resistivity of the n-amorphous silicon layer 4, which has a resistivity of 108 to 109 Ω-α, decreases by about one to two orders of magnitude due to plasma damage and dirt during dry etching. It is thought that this has happened. Therefore, in the present invention, the amorphous silicon layer (4, 6) contains boron and one element of nitrogen or oxygen, which increases the resistivity of n-amorphous silicon.
High resistance amorphous S with an order of magnitude higher 109~1014Ω
By providing the layer (5), a sufficient resistivity can be maintained even if the resistivity decreases by one to two orders of magnitude due to dry etching, dirt, etc.

Normally, when amorphous silicon doped with boron is used in a thin film transistor, electron mobility may be inhibited, but in the present invention, the amorphous silicon that is in contact with the gate insulating film 3 and forms the channel portion n with good electron transportability
- Since an amorphous silicon layer (generally an undoped amorphous silicon layer) 4 is used, and an n+ amorphous silicon layer 6 is used for ohmic contact with the source and drain electrodes, the electron trajectory is A thin film transistor with low ON resistance and high ON/OFF ratio without being inhibited can be obtained.

Furthermore, the inclusion of oxygen or nitrogen in the amorphous silicon layer has the effect of restoring the electron transport properties that have been reduced by doping with boron, thereby improving its properties.

Using the thin film transistor formed in this way,
A prototype thin film transistor array for driving a liquid crystal with 128×64 elements was fabricated and its static characteristics were evaluated.

As a result, when the gate voltage is 15v1 and the source-drain voltage is 15V, the average ON current is 2.2x10'A.

The average OFF current is 1. IX10"A, and the elements that flow an OFF current of 1X10-"A or more, which may cause image defects, must be less than 0.1 inch of the total, compared to the proportion of conventional thin film transistors (4%). Yield has been significantly improved.

(Effects of the Invention) As described above, according to the present invention, thin film transistors with small OFF current can be stably manufactured, and the yield of display devices using a large number of these thin film transistors can be increased.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a conventional thin film transistor, and FIG. 2 is a sectional view of an embodiment of the present invention. In the figure, ■...Insulating substrate, 2...Gate electrode, 3...Insulator layer, 4...N-amorphous silicon semiconductor layer , 5...Amorphous silicon semiconductor layer containing boron and oxygen or nitrogen, 6...n
+Amorphous silicon semiconductor layer, 7...source electrode, 8...drain electrode, 96.101. It is a cypation membrane.゛gu-, 7' graduation 1 gourd

Claims (1)

[Claims] In a thin film transistor, a gate insulating film and a semiconductor layer based on amorphous silicon are laminated on an insulating substrate having a gate metal layer on the top surface, and an ohmic layer, a source electrode, and a drain electrode are disposed on this laminated layer. 0.0 within the semiconductor layer. A thin film transistor defined by Irfg to include an amorphous silicon layer containing 1 ppm to 11000 ppm of boron and nitrogen or oxygen.